Home
last modified time | relevance | path

Searched +full:0 +full:x220000 (Results 1 – 23 of 23) sorted by relevance

/freebsd/sys/contrib/device-tree/src/powerpc/fsl/
H A Dqoriq-sata2-0.dtsi2 * QorIQ SATAv2 device tree stub [ controller @ offset 0x220000 ]
37 reg = <0x220000 0x1000>;
38 interrupts = <68 0x2 0 0>;
/freebsd/sys/contrib/device-tree/Bindings/net/
H A Ddavinci_emac.txt32 reg = <0x220000 0x4000>;
33 ti,davinci-ctrl-reg-offset = <0x3000>;
34 ti,davinci-ctrl-mod-reg-offset = <0x2000>;
35 ti,davinci-ctrl-ram-offset = <0>;
36 ti,davinci-ctrl-ram-size = <0x2000>;
H A Dmarvell-pp2.txt50 "hifX", with X in [0..8], and "link". The names "tx-cpu0",
60 reg = <0xf0000 0xa000>,
61 <0xc0000 0x3060>,
62 <0xc4000 0x100>,
63 <0xc5000 0x100>;
69 port-id = <0>;
84 cpm_ethernet: ethernet@0 {
86 reg = <0x0 0x100000>, <0x129000 0xb000>, <0x220000 0x800>;
104 port-id = <0>;
105 gop-port-id = <0>;
H A Dmarvell,pp2.yaml32 const: 0
59 '^(ethernet-)?port@[0-2]$':
92 "hifX", with X in [0..8], and "link". The names "tx-cpu0",
165 '^(ethernet-)?port@[0-2]$':
187 '^(ethernet-)?port@[0-1]$':
204 #size-cells = <0>;
206 reg = <0xf0000 0xa000>,
207 <0xc0000 0x3060>,
208 <0xc4000 0x100>,
209 <0xc5000 0x100>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm/marvell/
H A Darmada-385-linksys-rango.dts20 wan_amber@0 {
22 reg = <0x0>;
27 reg = <0x1>;
32 reg = <0x5>;
37 reg = <0x6>;
42 reg = <0x7>;
47 reg = <0x8>;
52 reg = <0x9>;
89 partition@0 {
91 reg = <0x0000000 0x200000>; /* 2MiB */
[all …]
/freebsd/sys/contrib/device-tree/src/arm/ti/keystone/
H A Dkeystone-k2g-netcp.dtsi13 power-domains = <&k2g_pds 0x0018>;
14 clocks = <&k2g_clks 0x0018 0>;
17 queue-range = <0 0x80>;
18 linkram0 = <0x4020000 0x7ff>;
26 managed-queues = <0 0x80>;
27 reg = <0x410000
[all...]
H A Dkeystone-k2e-netcp.dtsi15 queue-range = <0 0x2000>;
16 linkram0 = <0x100000 0x4000>;
17 linkram1 = <0 0x10000>;
24 managed-queues = <0 0x2000>;
25 reg = <0x2a40000 0x2000
[all...]
H A Dkeystone-k2l-netcp.dtsi15 queue-range = <0 0x2000>;
16 linkram0 = <0x100000 0x4000>;
17 linkram1 = <0x70000000 0x10000>; /* 1MB OSR mem */
24 managed-queues = <0 0x2000>;
25 reg = <0x2a40000 0x2000
[all...]
/freebsd/sys/dev/vnic/
H A Dnic_reg.h35 #define NIC_PF_CFG (0x0000)
36 #define NIC_PF_STATUS (0x0010)
37 #define NIC_PF_INTR_TIMER_CFG (0x0030)
38 #define NIC_PF_BIST_STATUS (0x0040)
39 #define NIC_PF_SOFT_RESET (0x0050)
40 #define NIC_PF_TCP_TIMER (0x0060)
41 #define NIC_PF_BP_CFG (0x0080)
42 #define NIC_PF_RRM_CFG (0x0088)
43 #define NIC_PF_CQM_CF (0x00A0)
44 #define NIC_PF_CNM_CF (0x00A8)
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/marvell/
H A Darmada-ap80x.dtsi41 reg = <0x0 0x4000000 0x0 0x200000>;
46 reg = <0 0x4400000 0 0x1000000>;
62 ranges = <0x0 0x
[all...]
H A Darmada-cp11x.dtsi29 polling-delay-passive = <0>; /* Interrupt driven */
30 polling-delay = <0>; /* Interrupt driven */
32 thermal-sensors = <&CP11X_LABEL(thermal) 0>;
58 ranges = <0x0 0x0 ADDRESSIFY(CP11X_BASE) 0x2000000>;
60 CP11X_LABEL(ethernet): ethernet@0 {
62 #size-cells = <0>;
64 reg = <0x0 0x100000>, <0x129000 0xb000>, <0x220000 0x800>;
74 CP11X_LABEL(eth0): ethernet-port@0 {
88 reg = <0>;
89 port-id = <0>; /* For backward compatibility. */
[all …]
/freebsd/sys/dev/ipw/
H A Dif_ipw.c84 #define DPRINTF(x) do { if (ipw_debug > 0) printf x; } while (0)
85 #define DPRINTFN(n, x) do { if (ipw_debug >= (n)) printf x; } while (0)
86 int ipw_debug = 0;
87 SYSCTL_INT(_debug, OID_AUTO, ipw, CTLFLAG_RW, &ipw_debug, 0, "ipw debug level");
104 { 0x8086, 0x1043, "Intel(R) PRO/Wireless 2100 MiniPCI" },
106 { 0, 0, NULL }
157 #if 0
235 TASK_INIT(&sc->sc_init_task, 0, ipw_init_task, sc); in ipw_attach()
236 callout_init_mtx(&sc->sc_wdtimer, &sc->sc_mtx, 0); in ipw_attach()
238 pci_write_config(dev, 0x41, 0, 1); in ipw_attach()
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/apm/
H A Dapm-shadowcat.dtsi16 #size-cells = <0>;
18 cpu@0 {
21 reg = <0x0 0x000>;
23 cpu-release-addr = <0x1 0x0000fff8>;
26 clocks = <&pmd0clk 0>;
31 reg = <0x0 0x001>;
33 cpu-release-addr = <0x
[all...]
/freebsd/sys/contrib/device-tree/src/arm/ti/davinci/
H A Dda850.dtsi16 reg = <0xc0000000 0x0>;
21 #size-cells = <0>;
23 cpu: cpu@0 {
26 reg = <0>;
78 reg = <0xfffee000 0x2000>;
84 #clock-cells = <0>;
89 #clock-cells = <0>;
95 #clock-cells = <0>;
[all...]
/freebsd/sys/dts/powerpc/
H A Dp3041si.dtsi103 #size-cells = <0>;
105 cpu0: PowerPC,e500mc@0 {
107 reg = <0>;
145 dcsr-epu@0 {
147 interrupts = <52 2 0 0
148 84 2 0 0
149 85 2 0 0>;
151 reg = <0x0 0x1000>;
155 reg = <0x1000 0x1000 0x1000000 0x8000>;
159 reg = <0x2000 0x1000>;
[all …]
H A Dp2041si.dtsi102 #size-cells = <0>;
104 cpu0: PowerPC,e500mc@0 {
106 reg = <0>;
144 dcsr-epu@0 {
146 interrupts = <52 2 0 0
147 84 2 0 0
148 85 2 0 0>;
150 reg = <0x0 0x1000>;
154 reg = <0x1000 0x1000 0x1000000 0x8000>;
158 reg = <0x2000 0x1000>;
[all …]
H A Dp5020si.dtsi109 #size-cells = <0>;
111 cpu0: PowerPC,e5500@0 {
113 reg = <0>;
135 dcsr-epu@0 {
137 interrupts = <52 2 0 0
138 84 2 0 0
139 85 2 0 0>;
141 reg = <0x0 0x1000>;
145 reg = <0x1000 0x1000 0x1000000 0x8000>;
149 reg = <0x2000 0x1000>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/qcom/
H A Dsdm630.dtsi34 #clock-cells = <0>;
41 #clock-cells = <0>;
49 #size-cells = <0>;
54 reg = <0x0 0x100>;
74 reg = <0x0 0x101>;
89 reg = <0x0 0x102>;
104 reg = <0x
[all...]
H A Dmsm8998.dtsi16 qcom,msm-id = <292 0x0>;
26 reg = <0x0 0x80000000 0x0 0x0>;
35 reg = <0x0 0x85800000 0x0 0x600000>;
40 reg = <0x
[all...]
/freebsd/sys/dev/bxe/
H A Dbxe_dump.h33 #define DRV_DUMP_XSTORM_WAITP_ADDRESS 0x2b8a80
34 #define DRV_DUMP_TSTORM_WAITP_ADDRESS 0x1b8a80
35 #define DRV_DUMP_USTORM_WAITP_ADDRESS 0x338a80
36 #define DRV_DUMP_CSTORM_WAITP_ADDRESS 0x238a80
56 #define BNX2X_DUMP_VERSION 0x61111111
76 static const uint32_t page_vals_e2[] = {0, 128};
79 {0x58000, 4608, DUMP_CHIP_E2, 0x30}
85 static const uint32_t page_vals_e3[] = {0, 128};
88 {0x58000, 4608, DUMP_CHIP_E3A0 | DUMP_CHIP_E3B0, 0x30}
92 { 0x2000, 1, 0x1f, 0xfff},
[all …]
H A D57711_init_values.c55 {OP_WR, 0x600dc, 0x1},
56 {OP_SW, 0x61000, 0x2000000},
57 {OP_RD, 0x600d8, 0x0},
58 {OP_SW, 0x60200, 0x30200},
59 {OP_WR, 0x600dc, 0x0},
62 {OP_RD, 0x600b8, 0x0},
63 {OP_RD, 0x600c8, 0x0},
64 {OP_WR, 0x6016c, 0x0},
67 {OP_RD, 0x600bc, 0x0},
68 {OP_RD, 0x600cc, 0x0},
[all …]
H A D57710_init_values.c55 {OP_WR, 0x600dc, 0x1},
56 {OP_SW, 0x61000, 0x2000000},
57 {OP_RD, 0x600d8, 0x0},
58 {OP_SW, 0x60200, 0x30200},
59 {OP_WR, 0x600dc, 0x0},
62 {OP_WR, 0x60068, 0xb8},
63 {OP_WR, 0x60078, 0x114},
64 {OP_RD, 0x600b8, 0x0},
65 {OP_RD, 0x600c8, 0x0},
68 {OP_WR, 0x6006c, 0xb8},
[all …]
H A D57712_init_values.c54 /* #define ATC_COMMON_START 0 */
55 {OP_WR, 0x1100b8, 0x1},
58 {OP_WR, 0x600dc, 0x1},
59 {OP_WR, 0x60050, 0x180},
60 {OP_SW, 0x61000, 0x1ff0000},
61 {OP_IF_MODE_AND, 1, 0x8}, /* e2 */
62 {OP_WR, 0x617fc, 0x3fe001},
63 {OP_IF_MODE_AND, 1, 0x10}, /* e3 */
64 {OP_SW, 0x617fc, 0x20101ff},
65 {OP_IF_MODE_AND, 1, 0x8}, /* e2 */
[all …]