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/freebsd/sys/contrib/device-tree/src/arm/st/
H A Dstm32mp153.dtsi36 reg = <0x4400e000 0x400>, <0x44011000 0x1400>;
43 bosch,mram-cfg = <0x0 0 0 32 0 0 2 2>;
50 reg = <0x4400f000 0x400>, <0x44011000 0x2800>;
57 bosch,mram-cfg = <0x1400 0 0 32 0 0 2 2>;
H A Dstm32mp133.dtsi13 reg = <0x4400e000 0x400>, <0x44011000 0x1400>;
20 bosch,mram-cfg = <0x0 0 0 32 0 0 2 2>;
26 reg = <0x4400f000 0x400>, <0x44011000 0x2800>;
33 bosch,mram-cfg = <0x1400 0 0 32 0 0 2 2>;
42 reg = <0x48003000 0x400>;
49 #size-cells = <0>;
53 adc1: adc@0 {
57 #size-cells = <0>;
58 reg = <0x0>;
60 interrupts = <0>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/freescale/
H A Dimx93-tqma9352-mba93xxla.dts37 pwms = <&tpm5 0 5000000 0>;
38 brightness-levels = <0 4 8 16 32 64 128 255>;
47 #clock-cells = <0>;
90 io-channels = <&adc1 0>, <&adc1 1>, <&adc1 2>, <&adc1 3>;
105 gpio = <&expander0 0 GPIO_ACTIVE_HIGH>;
134 pinctrl-0 = <&pinctrl_eqos>;
142 #size-cells = <0>;
144 ethphy_eqos: ethernet-phy@0 {
146 reg = <0>;
148 pinctrl-0 = <&pinctrl_eqos_phy>;
[all …]
H A Dimx93-tqma9352-mba93xxca.dts37 pwms = <&tpm5 0 5000000 0>;
38 brightness-levels = <0 4 8 16 32 64 128 255>;
48 pinctrl-0 = <&pinctrl_pwmfan>;
52 pwms = <&tpm6 0 40000 PWM_POLARITY_INVERTED>;
53 cooling-levels = <0 32 64 128 196 240>;
99 io-channels = <&adc1 0>, <&adc1 1>, <&adc1 2>, <&adc1 3>;
148 gpio = <&expander0 0 GPIO_ACTIVE_HIGH>;
201 pinctrl-0 = <&pinctrl_eqos>;
209 #size-cells = <0>;
211 ethphy_eqos: ethernet-phy@0 {
[all …]
/freebsd/sys/contrib/device-tree/Bindings/cpufreq/
H A Dcpufreq-qcom-hw.txt40 phandle to a cpufreq_hw followed by the Domain ID(0/1) in the CPU DT node.
51 #size-cells = <0>;
53 CPU0: cpu@0 {
56 reg = <0x0 0x0>;
59 qcom,freq-domain = <&cpufreq_hw 0>;
72 reg = <0x0 0x100>;
75 qcom,freq-domain = <&cpufreq_hw 0>;
85 reg = <0x0 0x200>;
88 qcom,freq-domain = <&cpufreq_hw 0>;
98 reg = <0x0 0x300>;
[all …]
H A Dcpufreq-qcom-hw.yaml53 - description: Frequency domain 0 register region
83 - const: dcvsh-irq-0
219 #size-cells = <0>;
221 CPU0: cpu@0 {
224 reg = <0x0 0x0>;
227 qcom,freq-domain = <&cpufreq_hw 0>;
228 clocks = <&cpufreq_hw 0>;
245 reg = <0x0 0x100>;
248 qcom,freq-domain = <&cpufreq_hw 0>;
249 clocks = <&cpufreq_hw 0>;
[all …]
/freebsd/sys/contrib/device-tree/Bindings/memory-controllers/
H A Dmvebu-sdram-controller.txt20 reg = <0x1400 0x500>;
H A Dmarvell,mvebu-sdram-controller.yaml30 reg = <0x1400 0x500>;
/freebsd/sys/contrib/device-tree/src/arm/ti/omap/
H A Ddm816x-clocks.dtsi7 reg = <0x400 0x40>;
23 reg = <0x440 0x30>;
35 reg = <0x470 0x30>;
46 reg = <0x4a0 0x30>;
59 #clock-cells = <0>;
65 #clock-cells = <0>;
71 #clock-cells = <0>;
77 #clock-cells = <0>;
83 /* 0x48180000 */
86 #clock-cells = <0>;
[all …]
H A Domap36xx-am35xx-omap3430es2plus-clocks.dtsi9 #clock-cells = <0>;
17 #clock-cells = <0>;
26 #clock-cells = <0>;
29 reg = <0x0d04>, <0x0d24>, <0x0d4c>, <0x0d34>;
35 #clock-cells = <0>;
39 reg = <0x0d50>;
44 #clock-cells = <0>;
48 reg = <0x0b00>;
52 #clock-cells = <0>;
60 #clock-cells = <0>;
[all …]
H A Ddm814x-clocks.dtsi12 reg = <0x40 0x40>;
24 reg = <0x80 0x30>;
35 reg = <0xb0 0x30>;
46 reg = <0xe0 0x30>;
57 reg = <0x110 0x30>;
68 reg = <0x140 0x30>;
79 reg = <0x170 0x30>;
90 reg = <0x1a0 0x30>;
101 reg = <0x1d0 0x30>;
112 reg = <0x200 0x30>;
[all …]
/freebsd/sys/contrib/dev/mediatek/mt76/mt7996/
H A Deeprom.h12 MT_EE_CHIP_ID = 0x000,
13 MT_EE_VERSION = 0x002,
14 MT_EE_MAC_ADDR = 0x004,
15 MT_EE_MAC_ADDR2 = 0x00a,
16 MT_EE_WIFI_CONF = 0x190,
17 MT_EE_MAC_ADDR3 = 0x2c0,
18 MT_EE_RATE_DELTA_2G = 0x1400,
19 MT_EE_RATE_DELTA_5G = 0x147d,
20 MT_EE_RATE_DELTA_6G = 0x154a,
21 MT_EE_TX0_POWER_2G = 0x1300,
[all …]
/freebsd/sys/contrib/device-tree/Bindings/soc/fsl/cpm_qe/qe/
H A Dpar_io.txt18 #size-cells = <0>;
41 reg = <0x1400 0x18>;
49 reg = <0x1460 0x18>;
/freebsd/sys/contrib/device-tree/Bindings/interconnect/
H A Dqcom,osm-l3.yaml67 #define RPMH_CXO_CLK 0
71 reg = <0x17d41000 0x1400>;
/freebsd/contrib/xz/src/liblzma/check/
H A Dcrc32_x86.S1 /* SPDX-License-Identifier: 0BSD */
25 static const uint32_t poly32 = UINT32_C(0xEDB88320);
28 // static const uint32_t poly32 = UINT32_C(0x82F63B78);
31 // static const uint32_t poly32 = UINT32_C(0xEB31D82E);
33 for (size_t s = 0; s < 8; ++s) {
34 for (size_t b = 0; b < 256; ++b) {
35 uint32_t r = s == 0 ? b : lzma_crc32_table[s - 1][b];
37 for (size_t i = 0; i < 8; ++i) {
111 movl 0x14(%esp), %esi /* buf */
112 movl 0x18(%esp), %edi /* size */
[all …]
/freebsd/sys/powerpc/powermac/
H A Dviareg.h32 #define vBufB 0x0000 /* register B */
33 #define vDirB 0x0400 /* data direction register */
34 #define vDirA 0x0600 /* data direction register */
35 #define vT1C 0x0800 /* Timer 1 counter Lo */
36 #define vT1CH 0x0a00 /* Timer 1 counter Hi */
37 #define vSR 0x1400 /* shift register */
38 #define vACR 0x1600 /* aux control register */
39 #define vPCR 0x1800 /* peripheral control register */
40 #define vIFR 0x1a00 /* interrupt flag register */
41 #define vIER 0x1c00 /* interrupt enable register */
[all …]
/freebsd/sys/contrib/device-tree/Bindings/phy/
H A Dqcom,msm8996-qmp-pcie-phy.yaml57 "^phy@[0-9a-f]+$":
92 const: 0
98 const: 0
130 reg = <0x34000 0x488>;
133 ranges = <0x0 0x34000 0x4000>;
149 reg = <0x1000 0x130>,
150 <0x1200 0x200>,
151 <0x1400 0x1dc>;
156 #clock-cells = <0>;
159 #phy-cells = <0>;
[all …]
H A Dphy-mtk-tphy.txt5 controllers on MediaTek SoCs, such as, USB2.0, USB3.0, PCIe, and SATA.
23 the child's base address to 0, the physical address
72 reg = <0 0x11290000 0 0x800>;
78 reg = <0 0x11290800 0 0x100>;
85 reg = <0 0x11290800 0 0x700>;
92 reg = <0 0x11291000 0 0x100>;
113 phy-names = "usb2-0", "usb3-0";
122 shared 0x0000 SPLLC
123 0x0100 FMREG
124 u2 port0 0x0800 U2PHY_COM
[all …]
/freebsd/contrib/file/magic/Magdir/
H A Dmodem9 >29 byte 0 \b, normal resolution
17 0 short 0x0100
18 # 16 0-bits near beginning like True Type fonts *.ttf, Postscript PrinterFontMetric *.pfm, FTYPE.HY…
19 >2 search/9 \0\0
20 # maximal 7 0-bits for pixel sequences or 11 0-bits for EOL in G3
23 >>0 belong !0x0001a364
25 >>>2 beshort !0x0008
34 >>>>>>8 ubequad !0x2e01010454010203
36 >>>>>>>8 ubequad !0x5dee74ad1aa56394
39 >>>>>>>>-0 offset !32034 raw G3 (Group 3) FAX, byte-padded
[all …]
/freebsd/sys/contrib/device-tree/Bindings/pci/
H A Dqcom,pcie-x1e80100.yaml91 reg = <0 0x01c08000 0 0x3000>,
92 <0 0x7c000000 0 0xf1d>,
93 <0 0x7c000f40 0 0xa8>,
94 <0 0x7c001000 0 0x1000>,
95 <0 0x7c100000 0 0x100000>,
96 <0 0x01c0b000 0 0x1000>;
98 ranges = <0x01000000 0x0 0x00000000 0x0 0x60200000 0x0 0x100000>,
99 <0x02000000 0x0 0x60300000 0x0 0x60300000 0x0 0x3d00000>;
101 bus-range = <0x00 0xff>;
103 linux,pci-domain = <0>;
[all …]
H A Dqcom,pcie-sm8550.yaml99 reg = <0 0x01c00000 0 0x3000>,
100 <0 0x60000000 0 0xf1d>,
101 <0 0x60000f20 0 0xa8>,
102 <0 0x60001000 0 0x1000>,
103 <0 0x60100000 0 0x100000>;
105 ranges = <0x01000000 0x0 0x00000000 0x0 0x60200000 0x0 0x100000>,
106 <0x02000000 0x0 0x60300000 0x0 0x60300000 0x0 0x3d00000>;
108 bus-range = <0x00 0xff>;
110 linux,pci-domain = <0>;
144 interrupt-map-mask = <0 0 0 0x7>;
[all …]
/freebsd/sys/libkern/
H A Dcrc16.c32 /* CRC table for the CRC-16. The poly is 0x8005 (x16 + x15 + x2 + 1). */
34 0x0000, 0xC0C1, 0xC181, 0x0140, 0xC301, 0x03C0, 0x0280, 0xC241,
35 0xC601, 0x06C0, 0x0780, 0xC741, 0x0500, 0xC5C1, 0xC481, 0x0440,
36 0xCC01, 0x0CC0, 0x0D80, 0xCD41, 0x0F00, 0xCFC1, 0xCE81, 0x0E40,
37 0x0A00, 0xCAC1, 0xCB81, 0x0B40, 0xC901, 0x09C0, 0x0880, 0xC841,
38 0xD801, 0x18C0, 0x1980, 0xD941, 0x1B00, 0xDBC1, 0xDA81, 0x1A40,
39 0x1E00, 0xDEC1, 0xDF81, 0x1F40, 0xDD01, 0x1DC0, 0x1C80, 0xDC41,
40 0x1400, 0xD4C1, 0xD581, 0x1540, 0xD701, 0x17C0, 0x1680, 0xD641,
41 0xD201, 0x12C0, 0x1380, 0xD341, 0x1100, 0xD1C1, 0xD081, 0x1040,
42 0xF001, 0x30C0, 0x3180, 0xF141, 0x3300, 0xF3C1, 0xF281, 0x3240,
[all …]
/freebsd/tools/diag/dumpvfscache/
H A Ddumpvfscache.c16 0x0000, 0xCC01, 0xD801, 0x1400,
17 0xF001, 0x3C00, 0x2800, 0xE401,
18 0xA001, 0x6C00, 0x7800, 0xB401,
19 0x5000, 0x9C01, 0x8801, 0x4400
31 char nc_name[0];
37 u_short crc = 0; in wlpsacrc()
40 for (i = 0; i < len; i++, buf++) { in wlpsacrc()
42 r1 = crc16_table[crc & 0xF]; in wlpsacrc()
43 crc = (crc >> 4) & 0x0FFF; in wlpsacrc()
44 crc = crc ^ r1 ^ crc16_table[*buf & 0xF]; in wlpsacrc()
[all …]
/freebsd/sys/contrib/device-tree/src/powerpc/
H A Dmpc836x_mds.dts31 #size-cells = <0>;
33 PowerPC,8360@0 {
35 reg = <0x0>;
48 reg = <0x00000000 0x10000000>;
56 reg = <0xe0005000 0xd8>;
57 ranges = <0 0 0xfe000000 0x02000000
58 1 0 0xf8000000 0x00008000>;
60 flash@0,0 {
62 reg = <0 0 0x2000000>;
67 bcsr@1,0 {
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/amd/
H A Delba.dtsi20 #clock-cells = <0>;
25 #clock-cells = <0>;
30 #clock-cells = <0>;
35 #clock-cells = <0>;
64 reg = <0x0 0x400 0x0 0x100>;
67 #size-cells = <0>;
75 reg = <0x0 0x1400 0x0 0x100>;
83 reg = <0x0 0x2400 0x0 0x400>,
84 <0x0 0x7fff0000 0x0 0x1000>;
86 #size-cells = <0>;
[all …]

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