xref: /freebsd/sys/powerpc/powermac/viareg.h (revision 95ee2897e98f5d444f26ed2334cc7c439f9c16c6)
1b4dbc599SNathan Whitehorn /*-
2*4d846d26SWarner Losh  * SPDX-License-Identifier: BSD-2-Clause
371e3c308SPedro F. Giffuni  *
4b4dbc599SNathan Whitehorn  * Copyright (C) 2008 Nathan Whitehorn
5b4dbc599SNathan Whitehorn  * All rights reserved.
6b4dbc599SNathan Whitehorn  *
7b4dbc599SNathan Whitehorn  * Redistribution and use in source and binary forms, with or without
8b4dbc599SNathan Whitehorn  * modification, are permitted provided that the following conditions
9b4dbc599SNathan Whitehorn  * are met:
10b4dbc599SNathan Whitehorn  * 1. Redistributions of source code must retain the above copyright
11b4dbc599SNathan Whitehorn  *    notice, this list of conditions and the following disclaimer.
12b4dbc599SNathan Whitehorn  * 2. Redistributions in binary form must reproduce the above copyright
13b4dbc599SNathan Whitehorn  *    notice, this list of conditions and the following disclaimer in the
14b4dbc599SNathan Whitehorn  *    documentation and/or other materials provided with the distribution.
15b4dbc599SNathan Whitehorn  *
16b4dbc599SNathan Whitehorn  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17b4dbc599SNathan Whitehorn  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18b4dbc599SNathan Whitehorn  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19b4dbc599SNathan Whitehorn  * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
20b4dbc599SNathan Whitehorn  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
21b4dbc599SNathan Whitehorn  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
22b4dbc599SNathan Whitehorn  * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
23b4dbc599SNathan Whitehorn  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
24b4dbc599SNathan Whitehorn  * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
25b4dbc599SNathan Whitehorn  * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26b4dbc599SNathan Whitehorn  */
27b4dbc599SNathan Whitehorn 
28b4dbc599SNathan Whitehorn #ifndef	_POWERPC_VIAREG_H_
29b4dbc599SNathan Whitehorn #define	_POWERPC_VIAREG_H_
30b4dbc599SNathan Whitehorn 
31b4dbc599SNathan Whitehorn /* VIA interface registers */
32b4dbc599SNathan Whitehorn #define vBufB		0x0000	/* register B */
33b4dbc599SNathan Whitehorn #define vDirB		0x0400	/* data direction register */
34b4dbc599SNathan Whitehorn #define vDirA		0x0600	/* data direction register */
354702d987SJustin Hibbits #define vT1C		0x0800	/* Timer 1 counter Lo */
364702d987SJustin Hibbits #define vT1CH		0x0a00	/* Timer 1 counter Hi */
37b4dbc599SNathan Whitehorn #define vSR		0x1400	/* shift register */
38b4dbc599SNathan Whitehorn #define vACR		0x1600	/* aux control register */
39b4dbc599SNathan Whitehorn #define vPCR		0x1800	/* peripheral control register */
40b4dbc599SNathan Whitehorn #define vIFR		0x1a00	/* interrupt flag register */
41b4dbc599SNathan Whitehorn #define vIER		0x1c00	/* interrupt enable register */
424702d987SJustin Hibbits #define vBufA		0x1e00	/* register A */
43b4dbc599SNathan Whitehorn 
44b4dbc599SNathan Whitehorn #define vPB		0x0000
45b4dbc599SNathan Whitehorn #define vPB3		0x08
46b4dbc599SNathan Whitehorn #define vPB4		0x10
47b4dbc599SNathan Whitehorn #define vPB5		0x20
48b4dbc599SNathan Whitehorn #define vSR_INT		0x04
49b4dbc599SNathan Whitehorn #define vSR_OUT		0x10
50b4dbc599SNathan Whitehorn 
51b4dbc599SNathan Whitehorn #endif /* _POWERPC_VIAREG_H_ */
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