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/freebsd/sys/contrib/device-tree/src/arm64/amd/
H A Damd-seattle-soc.dtsi20 reg = <0x0 0xe1110000 0 0x1000>,
21 <0x0 0xe112f000 0 0x2000>,
22 <0x0 0xe1140000 0 0x2000>,
23 <0x0 0xe1160000 0 0x2000>;
24 interrupts = <1 9 0xf04>;
25 ranges = <0 0 0 0xe1100000 0 0x100000>;
29 reg = <0x0 0x00080000 0 0x1000>;
35 interrupts = <1 13 0xff04>,
36 <1 14 0xff04>,
37 <1 11 0xff04>,
[all …]
/freebsd/sys/contrib/device-tree/Bindings/phy/
H A Dphy-mtk-tphy.txt5 controllers on MediaTek SoCs, such as, USB2.0, USB3.0, PCIe, and SATA.
23 the child's base address to 0, the physical address
72 reg = <0 0x11290000 0 0x800>;
78 reg = <0 0x11290800 0 0x100>;
85 reg = <0 0x11290800 0 0x700>;
92 reg = <0 0x11291000 0 0x100>;
113 phy-names = "usb2-0", "usb3-0";
122 shared 0x0000 SPLLC
123 0x0100 FMREG
124 u2 port0 0x0800 U2PHY_COM
[all …]
H A Dmediatek,tphy.yaml15 controllers on MediaTek SoCs, includes USB2.0, USB3.0, PCIe and SATA.
22 shared 0x0000 SPLLC
23 0x0100 FMREG
24 u2 port0 0x0800 U2PHY_COM
25 u3 port0 0x0900 U3PHYD
26 0x0a00 U3PHYD_BANK2
27 0x0b00 U3PHYA
28 0x0c00 U3PHYA_DA
29 u2 port1 0x1000 U2PHY_COM
30 u3 port1 0x1100 U3PHYD
[all …]
H A Dphy-mtk-xsphy.txt59 u2 port0 0x0000 MISC
60 0x0100 FMREG
61 0x0300 U2PHY_COM
62 u2 port1 0x1000 MISC
63 0x1100 FMREG
64 0x1300 U2PHY_COM
65 u2 port2 0x2000 MISC
67 u31 common 0x3000 DIG_GLB
68 0x3100 PHYA_GLB
69 u31 port0 0x3400 DIG_LN_TOP
[all …]
H A Dmediatek,xsphy.yaml20 u2 port0 0x0000 MISC
21 0x0100 FMREG
22 0x0300 U2PHY_COM
23 u2 port1 0x1000 MISC
24 0x1100 FMREG
25 0x1300 U2PHY_COM
26 u2 port2 0x2000 MISC
28 u31 common 0x3000 DIG_GLB
29 0x3100 PHYA_GLB
30 u31 port0 0x3400 DIG_LN_TOP
[all …]
/freebsd/sys/powerpc/include/
H A Dtrap.h39 #define EXC_RSVD 0x0000 /* Reserved */
40 #define EXC_RST 0x0100 /* Reset; all but IBM4xx */
41 #define EXC_MCHK 0x0200 /* Machine Check */
42 #define EXC_DSI 0x0300 /* Data Storage Interrupt */
43 #define EXC_DSE 0x0380 /* Data Segment Interrupt */
44 #define EXC_ISI 0x0400 /* Instruction Storage Interrupt */
45 #define EXC_ISE 0x0480 /* Instruction Segment Interrupt */
46 #define EXC_EXI 0x0500 /* External Interrupt */
47 #define EXC_ALI 0x0600 /* Alignment Interrupt */
48 #define EXC_PGM 0x0700 /* Program Interrupt */
[all …]
/freebsd/sys/dev/drm2/
H A Ddrm_pciids.h14 {0, 0, 0, NULL}
17 {0x3D3D, 0x0008, 0, "3DLabs GLINT Gamma G1"}, \
18 {0, 0, 0, NULL}
21 {0x8086, 0x1132, 0, "Intel i815 GMCH"}, \
22 {0x8086, 0x7121, 0, "Intel i810 GMCH"}, \
23 {0x8086, 0x7123, 0, "Intel i810-DC100 GMCH"}, \
24 {0x8086, 0x7125, 0, "Intel i810E GMCH"}, \
25 {0, 0, 0, NULL}
28 {0x8086, 0x2562, 0, "Intel i845G GMCH"}, \
29 {0x8086, 0x2572, 0, "Intel i865G GMCH"}, \
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/qcom/
H A Dpm8916.dtsi17 hysteresis = <0>;
23 hysteresis = <0>;
29 hysteresis = <0>;
38 pm8916_0: pmic@0 {
40 reg = <0x0 SPMI_USID>;
42 #size-cells = <0>;
46 reg = <0x800>;
47 mode-bootloader = <0x2>;
48 mode-recovery = <0x1>;
52 interrupts = <0x0 0x8 0 IRQ_TYPE_EDGE_BOTH>;
[all …]
H A Dpmk8550.dtsi16 mode-recovery = <0x01>;
17 mode-bootloader = <0x02>;
22 pmk8550: pmic@0 {
24 reg = <0x0 SPMI_USID>;
26 #size-cells = <0>;
30 reg = <0x1300>, <0x800>;
35 interrupts = <0x0 0x13 0x7 IRQ_TYPE_EDGE_BOTH>;
42 interrupts = <0x0 0x13 0x6 IRQ_TYPE_EDGE_BOTH>;
49 reg = <0x6100>, <0x6200>;
51 interrupts = <0x0 0x62 0x1 IRQ_TYPE_EDGE_RISING>;
[all …]
H A Dpmk8350.dtsi13 #define PMK8350_SID 0
21 mode-recovery = <0x01>;
22 mode-bootloader = <0x02>;
31 #size-cells = <0>;
35 reg = <0x1300>, <0x800>;
40 interrupts = <PMK8350_SID 0x13 0x7 IRQ_TYPE_EDGE_BOTH>;
47 interrupts = <PMK8350_SID 0x1
[all...]
H A Dsc8280xp-pmics.dtsi23 hysteresis = <0>;
29 hysteresis = <0>;
43 hysteresis = <0>;
49 hysteresis = <0>;
58 pmk8280: pmic@0 {
60 reg = <0x0 SPMI_USID>;
62 #size-cells = <0>;
66 reg = <0x1300>, <0x800>;
71 interrupts-extended = <&spmi_bus 0x0 0x13 0x7 IRQ_TYPE_EDGE_BOTH>;
78 interrupts-extended = <&spmi_bus 0x0 0x13 0x6 IRQ_TYPE_EDGE_BOTH>;
[all …]
H A Dx1e80100-pmics.dtsi21 hysteresis = <0>;
27 hysteresis = <0>;
41 hysteresis = <0>;
47 hysteresis = <0>;
61 hysteresis = <0>;
67 hysteresis = <0>;
81 hysteresis = <0>;
87 hysteresis = <0>;
101 hysteresis = <0>;
107 hysteresis = <0>;
[all …]
/freebsd/sys/contrib/dev/mediatek/mt76/mt7996/
H A Deeprom.h12 MT_EE_CHIP_ID = 0x000,
13 MT_EE_VERSION = 0x002,
14 MT_EE_MAC_ADDR = 0x004,
15 MT_EE_MAC_ADDR2 = 0x00a,
16 MT_EE_WIFI_CONF = 0x190,
17 MT_EE_MAC_ADDR3 = 0x2c0,
18 MT_EE_RATE_DELTA_2G = 0x1400,
19 MT_EE_RATE_DELTA_5G = 0x147d,
20 MT_EE_RATE_DELTA_6G = 0x154a,
21 MT_EE_TX0_POWER_2G = 0x1300,
[all …]
/freebsd/sys/contrib/device-tree/Bindings/net/can/
H A Dmpc5xxx-mscan.txt41 interrupts = <12 0x8>;
43 reg = <0x1300 0x80>;
48 interrupts = <13 0x8>;
50 reg = <0x1380 0x80>;
/freebsd/sys/contrib/device-tree/Bindings/power/reset/
H A Dqcom,pon.yaml116 reg = <0x0c440000 0x1100>;
118 #size-cells = <0>;
120 pmic@0 {
121 reg = <0x0 SPMI_USID>;
123 #size-cells = <0>;
127 reg = <0x800>;
131 interrupts = <0x0 0x8 0 IRQ_TYPE_EDGE_BOT
[all...]
/freebsd/sys/contrib/device-tree/Bindings/net/
H A Dmediatek-dwmac.txt24 - mediatek,tx-delay-ps: TX clock delay macro value. Default is 0.
27 - mediatek,rx-delay-ps: RX clock delay macro value. Default is 0.
31 or will round down. Range 0~31*170.
33 or will round down. Range 0~31*550.
59 reg = <0 0x1101c000 0 0x1300>;
H A Dmediatek-dwmac.yaml80 or will round down. Range 0~31*170.
82 or will round down. Range 0~31*550.
84 or will round down. Range 0~31*290.
90 or will round down. Range 0~31*170.
92 or will round down. Range 0~31*550.
94 of 290, or will round down. Range 0~31*290.
156 reg = <0x1101c000 0x1300>;
183 snps,reset-delays-us = <0 1000
[all...]
/freebsd/contrib/file/magic/Magdir/
H A Dmodem9 >29 byte 0 \b, normal resolution
17 0 short 0x0100
18 # 16 0-bits near beginning like True Type fonts *.ttf, Postscript PrinterFontMetric *.pfm, FTYPE.HY…
19 >2 search/9 \0\0
20 # maximal 7 0-bits for pixel sequences or 11 0-bits for EOL in G3
23 >>0 belong !0x0001a364
25 >>>2 beshort !0x0008
34 >>>>>>8 ubequad !0x2e01010454010203
36 >>>>>>>8 ubequad !0x5dee74ad1aa56394
39 >>>>>>>>-0 offset !32034 raw G3 (Group 3) FAX, byte-padded
[all …]
/freebsd/sys/contrib/device-tree/Bindings/display/tegra/
H A Dnvidia,tegra20-vi.yaml15 pattern: "^vi@[0-9a-f]+$"
83 port@0:
89 "^csi@[0-9a-f]+$":
125 #size-cells = <0>;
128 reg = <0x48>;
141 reg = <0x54080000 0x00040000>;
151 #size-cells = <0>;
152 port@0 {
153 reg = <0>;
169 #size-cells = <0>;
[all …]
H A Dnvidia,tegra20-host1x.yaml175 use. Should be a mapping of IDs 0..n to IOMMU entries corresponding to
211 - description: host1x syncpoint interrupt 0
235 use. Should be a mapping of IDs 0..n to IOMMU entries corresponding to
251 reg = <0x50000000 0x00024000>;
252 interrupts = <0 65 0x04>, /* mpcore syncpt */
253 <0 67 0x04>; /* mpcore general */
263 ranges = <0x54000000 0x54000000 0x04000000>;
267 reg = <0x54040000 0x00040000>;
268 interrupts = <0 68 0x04>;
276 reg = <0x54080000 0x00040000>;
[all …]
/freebsd/sys/contrib/device-tree/src/powerpc/
H A Dmpc5125twr.dts30 #size-cells = <0>;
32 PowerPC,5125@0 {
34 reg = <0>;
35 d-cache-line-size = <0x20>; // 32 bytes
36 i-cache-line-size = <0x20>; // 32 bytes
37 d-cache-size = <0x8000>; // L1, 32K
38 i-cache-size = <0x8000>; // L1, 32K
47 reg = <0x00000000 0x10000000>; // 256MB at 0
[all...]
H A Dmpc5121.dtsi26 #size-cells = <0>;
28 PowerPC,5121@0 {
30 reg = <0>;
31 d-cache-line-size = <0x20>; /* 32 bytes */
32 i-cache-line-size = <0x20>; /* 32 bytes */
33 d-cache-size = <0x8000>; /* L1, 32K */
34 i-cache-size = <0x8000>; /* L1, 32K */
43 reg = <0x00000000 0x10000000>; /* 256MB at 0 */
[all...]
/freebsd/sys/contrib/openzfs/include/os/freebsd/spl/sys/
H A Dsysmacros.h64 #define ABS(a) ((a) < 0 ? -(a) : (a))
67 #define SIGNOF(a) ((a) < 0 ? -1 : (a) > 0)
70 #define ARRAY_SIZE(a) (sizeof (a) / sizeof (a[0]))
85 #define is_system_labeled() 0
92 #define BYTE_TO_BCD(x) byte_to_bcd[(x) & 0xff]
93 #define BCD_TO_BYTE(x) bcd_to_byte[(x) & 0xff]
109 #define O_MAXMAJ 0x7f /* SVR3 max major value */
110 #define O_MAXMIN 0xff /* SVR3 max minor value */
115 #define L_MAXMAJ32 0x3fff /* SVR4 max major value */
116 #define L_MAXMIN32 0x3ffff /* MAX minor for 3b2 software drivers. */
[all …]
/freebsd/sys/contrib/dev/mediatek/mt76/
H A Dmt76x02_regs.h9 #define MT_ASIC_VERSION 0x0000
11 #define MT76XX_REV_E3 0x22
12 #define MT76XX_REV_E4 0x33
14 #define MT_CMB_CTRL 0x0020
18 #define MT_EFUSE_CTRL 0x0024
19 #define MT_EFUSE_CTRL_AOUT GENMASK(5, 0)
27 #define MT_EFUSE_DATA_BASE 0x0028
30 #define MT_COEXCFG0 0x0040
31 #define MT_COEXCFG0_COEX_EN BIT(0)
33 #define MT_WLAN_FUN_CTRL 0x0080
[all …]
/freebsd/sys/contrib/device-tree/src/arm/ti/keystone/
H A Dkeystone-k2g-evm.dts17 reg = <0x00000008 0x00000000 0x00000000 0x80000000>;
27 reg = <0x00000008 0x1f800000 0x00000000 0x800000>;
72 #clock-cells = <0>;
76 sound0: sound@0 {
88 simple-audio-card,dai-link@0 {
94 clocks = <&k2g_clks 0x6 1>;
110 clocks = <&k2g_clks 0x6 1>;
125 K2G_CORE_IOPAD(0x11cc) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* uart0_rxd.uart0_rxd */
126 K2G_CORE_IOPAD(0x11d0) (BUFFER_CLASS_B | PIN_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
132 K2G_CORE_IOPAD(0x1300) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE2) /* mmc0_dat3.mmc0_dat3 */
[all …]

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