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/freebsd/sys/contrib/zstd/zlibWrapper/
H A DREADME.md49 zlib version 1.2.8 = 0x1280, compile flags = 0x65
63 zlib version 1.2.8 = 0x1280, compile flags = 0x65
119 | zstd 1.1.0 using ZSTD_CCtx | 68.35 MB/s | 430.9 MB/s | 6868521 | 3.43…
120 | zstd 1.1.0 using ZSTD_CStream | 66.63 MB/s | 422.3 MB/s | 6868521 | 3.43…
121 | zstd 1.1.0 with zlibWrapper and reusing a context | 54.01 MB/s | 403.2 MB/s | 6763482 | 3.48…
122 | zstd 1.1.0 with zlibWrapper not reusing a context | 51.59 MB/s | 383.7 MB/s | 6763482 | 3.48…
H A Dzstd_zlibwrapper.c14 #define ZWRAP_USE_ZSTD 0
52 return one.c[0]; in ZWRAP_isLittleEndian()
56 # define __has_builtin(x) 0
67 return ((in << 24) & 0xff000000 ) | in ZWRAP_swap32()
68 ((in << 8) & 0x00ff0000 ) | in ZWRAP_swap32()
69 ((in >> 8) & 0x0000ff00 ) | in ZWRAP_swap32()
70 ((in >> 24) & 0x000000ff ); in ZWRAP_swap32()
86 static int g_ZWRAP_useZSTDcompression = ZWRAP_USE_ZSTD; /* 0 = don't use ZSTD */
134 memset(ptr, 0, size); in ZWRAP_customCalloc()
174 if (zwc==NULL) return 0; /* support free on NULL */ in ZWRAP_freeCCtx()
[all …]
/freebsd/sys/contrib/device-tree/Bindings/display/panel/
H A Dleadtek,ltk050h3146w.yaml7 title: Leadtek LTK050H3146W 5.0in 720x1280 DSI panel
45 #size-cells = <0>;
46 panel@0 {
48 reg = <0>;
H A Dleadtek,ltk500hd1829.yaml7 title: Leadtek LTK500HD1829 5.0in 720x1280 DSI panel
44 #size-cells = <0>;
46 panel@0 {
48 reg = <0>;
H A Draydium,rm68200.yaml13 The Raydium Semiconductor Corporation RM68200 is a 5.5" 720x1280 TFT LCD
47 #size-cells = <0>;
48 panel@0 {
50 reg = <0>;
51 reset-gpios = <&gpiof 15 0>;
H A Dxinpeng,xpp055c272.yaml7 title: Xinpeng XPP055C272 5.5in 720x1280 DSI panel
44 #size-cells = <0>;
46 panel@0 {
48 reg = <0>;
H A Drocktech,jh057n00900.yaml27 # Powkiddy RGB10MAX3 5.0" 720x1280 TFT LCD panel
67 #size-cells = <0>;
68 panel@0 {
70 reg = <0>;
H A Dpanel-edp-legacy.yaml61 # LG 12.0" (1920x1280 pixels) TFT LCD panel
104 hsync-active = <0>;
109 vsync-active = <0>;
/freebsd/sys/dev/vnic/
H A Dnic_reg.h35 #define NIC_PF_CFG (0x0000)
36 #define NIC_PF_STATUS (0x0010)
37 #define NIC_PF_INTR_TIMER_CFG (0x0030)
38 #define NIC_PF_BIST_STATUS (0x0040)
39 #define NIC_PF_SOFT_RESET (0x0050)
40 #define NIC_PF_TCP_TIMER (0x0060)
41 #define NIC_PF_BP_CFG (0x0080)
42 #define NIC_PF_RRM_CFG (0x0088)
43 #define NIC_PF_CQM_CF (0x00A0)
44 #define NIC_PF_CNM_CF (0x00A8)
[all …]
/freebsd/sys/dev/qlxge/
H A Dqls_hw.h39 #define BIT_0 (0x1 << 0)
40 #define BIT_1 (0x1 << 1)
41 #define BIT_2 (0x1 << 2)
42 #define BIT_3 (0x1 << 3)
43 #define BIT_4 (0x1 << 4)
44 #define BIT_5 (0x1 << 5)
45 #define BIT_6 (0x1 << 6)
46 #define BIT_7 (0x1 << 7)
47 #define BIT_8 (0x1 << 8)
48 #define BIT_9 (0x1 << 9)
[all …]
/freebsd/sys/dev/smartpqi/
H A Dsmartpqi_main.c48 {0x9005, 0x028f, 0x103c, 0x600, PQI_HWIF_SRCV, "P408i-p SR Gen10"},
49 {0x9005, 0x028f, 0x103c, 0x601, PQI_HWIF_SRCV, "P408e-p SR Gen10"},
50 {0x9005, 0x028f, 0x103c, 0x602, PQI_HWIF_SRCV, "P408i-a SR Gen10"},
51 {0x9005, 0x028f, 0x103c, 0x603, PQI_HWIF_SRCV, "P408i-c SR Gen10"},
52 {0x9005, 0x028f, 0x1028, 0x1FE0, PQI_HWIF_SRCV, "SmartRAID 3162-8i/eDell"},
53 {0x9005, 0x028f, 0x9005, 0x608, PQI_HWIF_SRCV, "SmartRAID 3162-8i/e"},
54 {0x9005, 0x028f, 0x103c, 0x609, PQI_HWIF_SRCV, "P408i-sb SR G10"},
57 {0x9005, 0x028f, 0x103c, 0x650, PQI_HWIF_SRCV, "E208i-p SR Gen10"},
58 {0x9005, 0x028f, 0x103c, 0x651, PQI_HWIF_SRCV, "E208e-p SR Gen10"},
59 {0x9005, 0x028f, 0x103c, 0x652, PQI_HWIF_SRCV, "E208i-c SR Gen10"},
[all …]
/freebsd/sys/contrib/dev/rtw89/
H A Dpci.h10 #define MDIO_PG0_G1 0
14 #define RAC_CTRL_PPR 0x00
15 #define RAC_ANA03 0x03
17 #define RAC_ANA09 0x09
19 #define RAC_ANA0A 0x0A
21 #define RAC_ANA0B 0x0B
23 #define RAC_ANA0C 0x0C
25 #define RAC_ANA0D 0x0D
28 #define RAC_ANA10 0x10
30 #define ADDR_SEL_VAL 0x3C
[all …]
/freebsd/sys/contrib/device-tree/src/arm/qcom/
H A Dqcom-msm8974.dtsi22 #clock-cells = <0>;
28 #clock-cells = <0>;
35 #size-cells = <0>;
38 CPU0: cpu@0 {
42 reg = <0>;
108 memory@0 {
110 reg = <0x0 0x0>;
135 mboxes = <&apcs 0>;
158 reg = <0x08000000 0x5100000>;
163 reg = <0x0d100000 0x100000>;
[all …]
/freebsd/sys/dev/cxgbe/common/
H A Dt4_hw.c45 } while (0)
59 * at the time it indicated completion is stored there. Returns 0 if the
71 return 0; in t4_wait_op_done_val()
73 if (--attempts == 0) in t4_wait_op_done_val()
98 * and stores the value in @valp if it is not NULL. Returns 0 if the
111 return 0; in t7_wait_sram_done()
114 if (--attempts == 0) in t7_wait_sram_done()
213 * Reset F_ENABLE to 0 so reads of PCIE_CFG_SPACE_DATA won't cause a in t4_hw_pci_read_cfg4()
215 * F_ENABLE is 0 so a simple register write is easier than a in t4_hw_pci_read_cfg4()
218 t4_write_reg(adap, A_PCIE_CFG_SPACE_REQ, 0); in t4_hw_pci_read_cfg4()
[all …]
H A Dt4_regs.h34 /* Directory name: t7_sw_reg.txt, Changeset: 5946:0b60ff298e7d */
36 #define MYPF_BASE 0x1b000
39 #define PF0_BASE 0x1e000
42 #define PF1_BASE 0x1e400
45 #define PF2_BASE 0x1e800
48 #define PF3_BASE 0x1ec00
51 #define PF4_BASE 0x1f000
54 #define PF5_BASE 0x1f400
57 #define PF6_BASE 0x1f800
60 #define PF7_BASE 0x1fc00
[all …]
/freebsd/share/i18n/csmapper/CNS/
H A DCNS11643-5%UCS@SIP.src5 SRC_ZONE 0x21-0x7E / 0x21-0x7E / 8
7 DST_ILSEQ 0xFFFE
13 # Unicode version: 5.0.0
47 0x2121 = 0x00D1
48 0x2122 = 0x00CB
49 0x2123 = 0x00C9
50 0x2124 = 0x010C
51 0x2125 = 0x0000
52 0x2126 = 0x0087
53 0x2127 = 0x010D
[all …]
H A DUCS@SIP%CNS11643-5.src5 SRC_ZONE 0x0000 - 0xFA1A
7 DST_INVALID 0xFFFF
13 # Unicode version: 5.0.0
47 0x0000 = 0x2125
48 0x0009 = 0x2133
49 0x0014 = 0x214D
50 0x0022 = 0x232F
51 0x0041 = 0x3072
52 0x0043 = 0x3323
53 0x006B = 0x2521
[all …]
/freebsd/sys/dev/arcmsr/
H A Darcmsr.h64 #define FALSE 0
67 # define INTR_ENTROPY 0
71 #define offsetof(type, member) ((size_t)(&((type *)0)->member))
87 #define PCI_VENDOR_ID_ARECA 0x17D3 /* Vendor ID */
88 #define PCI_DEVICE_ID_ARECA_1110 0x1110 /* Device ID */
89 #define PCI_DEVICE_ID_ARECA_1120 0x1120 /* Device ID */
90 #define PCI_DEVICE_ID_ARECA_1130 0x1130 /* Device ID */
91 #define PCI_DEVICE_ID_ARECA_1160 0x1160 /* Device ID */
92 #define PCI_DEVICE_ID_ARECA_1170 0x1170 /* Device ID */
93 #define PCI_DEVICE_ID_ARECA_1200 0x1200 /* Device ID */
[all …]
/freebsd/tools/test/iconv/ref/
H A DUTF-16BE-rev1 0x00 = 0x0000
2 0x01 = 0x0100
3 0x02 = 0x0200
4 0x03 = 0x0300
5 0x04 = 0x0400
6 0x05 = 0x0500
7 0x06 = 0x0600
8 0x07 = 0x0700
9 0x08 = 0x0800
10 0x09 = 0x0900
[all …]
H A DUTF-16LE-rev1 0x00 = 0x0000
2 0x01 = 0x0001
3 0x02 = 0x0002
4 0x03 = 0x0003
5 0x04 = 0x0004
6 0x05 = 0x0005
7 0x06 = 0x0006
8 0x07 = 0x0007
9 0x08 = 0x0008
10 0x09 = 0x0009
[all …]
H A DBIG5HKSCS-rev1 0x00 = 0x00
2 0x01 = 0x01
3 0x02 = 0x02
4 0x03 = 0x03
5 0x04 = 0x04
6 0x05 = 0x05
7 0x06 = 0x06
8 0x07 = 0x07
9 0x08 = 0x08
10 0x09 = 0x09
[all …]
/freebsd/share/i18n/csmapper/GB/
H A DGB18030%UCS@BMP.src30 SRC_ZONE 0x81-0x84 / 0x30-0x39 / 0x81-0xFE / 0x30-0x39 / 8
32 DST_ILSEQ 0xFFFE
71 # for (i = 0; i < ncharset; ++i) {
74 # charsets[i], charsets[i + off], 0, &norm);
75 # if (ret != 0)
86 # for (i = 0; i < ncharset; ++i)
96 # for (i = 0; i < ncharset; i += 2) {
98 # if (ret == 0) {
101 # if (ret == 0 && tmp == src)
105 # return 0;
[all …]
H A DUCS@BMP%GB18030.src30 SRC_ZONE 0x0080-0xFFFD
32 DST_INVALID 0xFFFFFFFF
36 0x0080 = 0x81308130
37 0x0081 = 0x81308131
38 0x0082 = 0x81308132
39 0x0083 = 0x81308133
40 0x0084 = 0x81308134
41 0x0085 = 0x81308135
42 0x0086 = 0x81308136
43 0x0087 = 0x81308137
[all …]
/freebsd/usr.sbin/cxgbetool/
H A Dreg_defs_t7.c3 /* Directory name: t7_sw_reg.txt, Changeset: 5946:0b60ff298e7d */
6 { "SGE_PF_KDOORBELL", 0x1e000, 0 },
10 { "PIDX", 0, 13 },
11 { "SGE_PF_GTS", 0x1e004, 0 },
15 { "CIDXInc", 0, 12 },
16 { "SGE_PF_KTIMESTAMP_LO", 0x1e008, 0 },
17 { "SGE_PF_KTIMESTAMP_HI", 0x1e00c, 0 },
18 { "SGE_PF_KDOORBELL", 0x1e400, 0 },
22 { "PIDX", 0, 13 },
23 { "SGE_PF_GTS", 0x1e404, 0 },
[all …]
/freebsd/tools/tools/locale/etc/charmaps/
H A DGB18030.TXT5 0x03 0x0003
6 0x04 0x0004
7 0x05 0x0005
8 0x06 0x0006
9 0x07 0x0007
10 0x08 0x0008
11 0x09 0x0009
12 0x0A 0x000A
13 0x0B 0x000B
14 0x0C 0x000C
[all …]

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