Searched +full:0 +full:x11e30000 (Results 1 – 7 of 7) sorted by relevance
| /linux/Documentation/devicetree/bindings/pinctrl/ |
| H A D | mediatek,mt6878-pinctrl.yaml | 165 #define PINMUX_GPIO0__FUNC_GPIO0 (MTK_PIN_NO(0) | 0) 171 reg = <0x10005000 0x1000>, 172 <0x11d10000 0x1000>, 173 <0x11d30000 0x1000>, 174 <0x11d40000 0x1000>, 175 <0x11d50000 0x1000>, 176 <0x11d60000 0x1000>, 177 <0x11e20000 0x1000>, 178 <0x11e30000 0x1000>, 179 <0x11eb0000 0x1000>, [all …]
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| H A D | mediatek,mt8189-pinctrl.yaml | 181 reg = <0x10005000 0x1000>, 182 <0x11b50000 0x1000>, 183 <0x11c50000 0x1000>, 184 <0x11c60000 0x1000>, 185 <0x11d20000 0x1000>, 186 <0x11d30000 0x1000>, 187 <0x11d40000 0x1000>, 188 <0x11e20000 0x1000>, 189 <0x11e30000 0x1000>, 190 <0x11f20000 0x1000>, [all …]
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| H A D | mediatek,mt7986-pinctrl.yaml | 86 "watchdog" "watchdog" 0 334 Valid arguments for 'mediatek,pull-up-adv' are '0', '1', '2', '3' 337 0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled. 338 1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled. 339 2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled. 342 enum: [0, 1, 2, 3] 346 Valid arguments for 'mediatek,pull-up-adv' are '0', '1', '2', '3' 349 0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled. 350 1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled. 351 2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled. [all …]
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| /linux/arch/arm64/boot/dts/mediatek/ |
| H A D | mt7986a.dtsi | 21 #size-cells = <0>; 22 cpu0: cpu@0 { 24 reg = <0x0>; 32 reg = <0x1>; 40 reg = <0x2>; 48 reg = <0x3>; 58 #clock-cells = <0>; 73 reg = <0 0x43000000 0 0x30000>; 79 reg = <0 0x4fc00000 0 0x00100000>; 83 reg = <0 0x4fd00000 0 0x40000>; [all …]
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| H A D | mt8195.dtsi | 51 #size-cells = <0>; 53 cpu0: cpu@0 { 56 reg = <0x000>; 58 performance-domains = <&performance 0>; 75 reg = <0x100>; 77 performance-domains = <&performance 0>; 94 reg = <0x200>; 96 performance-domains = <&performance 0>; 113 reg = <0x300>; 115 performance-domains = <&performance 0>; [all …]
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| /linux/arch/arm64/boot/dts/renesas/ |
| H A D | r9a08g045.dtsi | 20 #clock-cells = <0>; 22 clock-frequency = <0>; 27 #clock-cells = <0>; 29 clock-frequency = <0>; 32 cluster0_opp: opp-table-0 { 61 #size-cells = <0>; 63 cpu0: cpu@0 { 65 reg = <0>; 74 L3_CA55: cache-controller-0 { 78 cache-size = <0x40000>; [all …]
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| /linux/drivers/pinctrl/mediatek/ |
| H A D | pinctrl-mt6878.c | 14 * GPIO_BASE: 0x10005000 15 * IOCFG_BL_BASE: 0x11D10000 16 * IOCFG_BM_BASE: 0x11D30000 17 * IOCFG_BR_BASE: 0x11D40000 18 * IOCFG_BL1_BASE: 0x11D50000 19 * IOCFG_BR1_BASE: 0x11D60000 20 * IOCFG_LM_BASE: 0x11E20000 21 * IOCFG_LT_BASE: 0x11E30000 22 * IOCFG_RM_BASE: 0x11EB0000 23 * IOCFG_RT_BASE: 0x11EC0000 [all …]
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