Searched +full:0 +full:x10120000 (Results 1 – 12 of 12) sorted by relevance
17 #define NOMADIK_FSMC_BASE 0x10100000 /* FSMC registers */18 #define NOMADIK_SDRAMC_BASE 0x10110000 /* SDRAM Controller */19 #define NOMADIK_CLCDC_BASE 0x10120000 /* CLCD Controller */20 #define NOMADIK_MDIF_BASE 0x10120000 /* MDIF */21 #define NOMADIK_DMA0_BASE 0x10130000 /* DMA0 Controller */22 #define NOMADIK_IC_BASE 0x10140000 /* Vectored Irq Controller */23 #define NOMADIK_DMA1_BASE 0x10150000 /* DMA1 Controller */24 #define NOMADIK_USB_BASE 0x10170000 /* USB-OTG conf reg base */25 #define NOMADIK_CRYP_BASE 0x10180000 /* Crypto processor */26 #define NOMADIK_SHA1_BASE 0x10190000 /* SHA-1 Processor */[all …]
23 const: 066 reg = <0x10120000 0x1000>;67 #phy-cells = <0>;
10 #size-cells = <0>;12 cpu@0 {15 reg = <0>;25 #address-cells = <0>;33 reg = <0x10000000 0x200000>;34 ranges = <0x0 0x10000000 0x1FFFFF>;39 sysc: system-controller@0 {41 reg = <0x0 0x60>;46 reg = <0x60 0x8>;48 #size-cells = <0>;[all …]
24 reg = <0x0 0x08000000>;28 #clock-cells = <0>;38 #size-cells = <0>;40 port@0 {41 reg = <0>;71 reg = <0x10000000 0x200>;72 ranges = <0x0 0x10000000 0x200>;76 led@8,0 {78 reg = <0x08 0x04>;79 offset = <0x08>;[all …]
45 /* 128 MiB memory @ 0x0 */46 reg = <0x00000000 0x08000000>;67 #clock-cells = <0>;73 #clock-cells = <0>;82 #clock-cells = <0>;84 clock-frequency = <0>;89 reg = <0x30000000 0x4000000>;98 reg = <0x38000000 0x800000>;113 reg = <0x3c000000 0x4000000>;121 reg = <0x3a000000 0x10000>;[all …]
29 // base address: 0x030 …BIF_BX0_PCIE_INDEX 0x000c31 …e regBIF_BX0_PCIE_INDEX_BASE_IDX 032 …BIF_BX0_PCIE_DATA 0x000d33 …e regBIF_BX0_PCIE_DATA_BASE_IDX 034 …BIF_BX0_PCIE_INDEX2 0x000e35 …e regBIF_BX0_PCIE_INDEX2_BASE_IDX 036 …BIF_BX0_PCIE_DATA2 0x000f37 …e regBIF_BX0_PCIE_DATA2_BASE_IDX 038 …BIF_BX0_PCIE_INDEX_HI 0x0010[all …]
26 // base address: 0x027 …BIF_CFG_DEV0_RC_VENDOR_ID 0x000028 …BIF_CFG_DEV0_RC_DEVICE_ID 0x000229 …BIF_CFG_DEV0_RC_COMMAND 0x000430 …BIF_CFG_DEV0_RC_STATUS 0x000631 …BIF_CFG_DEV0_RC_REVISION_ID 0x000832 …BIF_CFG_DEV0_RC_PROG_INTERFACE 0x000933 …BIF_CFG_DEV0_RC_SUB_CLASS 0x000a34 …BIF_CFG_DEV0_RC_BASE_CLASS 0x000b35 …BIF_CFG_DEV0_RC_CACHE_LINE 0x000c[all …]
29 // base address: 0x030 …NBCFG_SCRATCH_4 0x007834 // base address: 0x035 …BIF_CFG_DEV0_RC_VENDOR_ID 0x000036 …BIF_CFG_DEV0_RC_DEVICE_ID 0x000237 …BIF_CFG_DEV0_RC_COMMAND 0x000438 …BIF_CFG_DEV0_RC_STATUS 0x000639 …BIF_CFG_DEV0_RC_REVISION_ID 0x000840 …BIF_CFG_DEV0_RC_PROG_INTERFACE 0x000941 …BIF_CFG_DEV0_RC_SUB_CLASS 0x000a[all …]
28 // base address: 0x029 …IRQ_BRIDGE_CNTL 0x003e33 // base address: 0x034 …BIF_CFG_DEV0_EPF0_VENDOR_ID 0x000035 …BIF_CFG_DEV0_EPF0_DEVICE_ID 0x000236 …BIF_CFG_DEV0_EPF0_COMMAND 0x000437 …BIF_CFG_DEV0_EPF0_STATUS 0x000638 …BIF_CFG_DEV0_EPF0_REVISION_ID 0x000839 …BIF_CFG_DEV0_EPF0_PROG_INTERFACE 0x000940 …BIF_CFG_DEV0_EPF0_SUB_CLASS 0x000a[all …]
14 reg = <0x00000000 0x04000000>,15 <0x08000000 0x04000000>;20 reg = <0x10210000 0x1000>;37 reg = <0x101e2000 0x1000>;46 reg = <0x101e3000 0x1000>;55 reg = <0x101e4000 0x80>;62 gpio-bank = <0>;63 gpio-ranges = <&pinctrl 0 0 32>;69 reg = <0x101e5000 0x80>;77 gpio-ranges = <&pinctrl 0 32 32>;[all …]
17 #define FW_ENCODE_32BIT_PATTERN 0x1e1e1e1e23 #define BNX2X_MAX_ISCSI_TRGT_CONN_MASK 0xFFFF24 #define BNX2X_MAX_ISCSI_TRGT_CONN_SHIFT 025 #define BNX2X_MAX_ISCSI_INIT_CONN_MASK 0xFFFF000031 #define BNX2X_MAX_FCOE_TRGT_CONN_MASK 0xFFFF32 #define BNX2X_MAX_FCOE_TRGT_CONN_SHIFT 033 #define BNX2X_MAX_FCOE_INIT_CONN_MASK 0xFFFF000042 #define PIN_CFG_NA 0x0000000043 #define PIN_CFG_GPIO0_P0 0x0000000144 #define PIN_CFG_GPIO1_P0 0x00000002[all …]