/linux/arch/arm/boot/dts/arm/ |
H A D | integratorap.dts | 17 #size-cells = <0>; 19 cpu@0 { 28 reg = <0>; 37 operating-points = <71000 0 38 66000 0 39 60000 0 40 48000 0 41 36000 0 42 24000 0 43 12000 0>; [all …]
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/linux/drivers/of/unittest-data/ |
H A D | tests-address.dtsi | 17 ranges = <0x70000000 0x70000000 0x50000000>, 18 <0x00000000 0xd0000000 0x20000000>; 19 dma-ranges = <0x0 0x20000000 0x40000000>; 22 reg = <0x70000000 0x1000>; 28 ranges = <0x0 0x0 0x80000000 0x0 0x100000>; 29 dma-ranges = <0x1 0x0 0x0 0x20 0x0>; 32 reg = <0x0 0x1000 0x0 0x1000>; 40 reg = <0x90000000 0x1000>; 41 ranges = <0x42000000 0x0 0x40000000 0x40000000 0x0 0x10000000>; 42 dma-ranges = <0x42000000 0x0 0x80000000 0x00000000 0x0 0x10000000>, [all …]
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/linux/Documentation/devicetree/bindings/mtd/ |
H A D | atmel-nand.txt | 38 device (always 0) 39 3rd entry: the memory region size (always 0x800000) 67 reg = <0x70000000 0x8000000>; 72 reg = <0xffffc070 0x490>, 73 <0xffffc500 0x100>; 81 reg = <0x10000000 0x10000000 82 0x40000000 0x30000000>; 83 ranges = <0x0 0x0 0x10000000 0x10000000 84 0x1 0x0 0x40000000 0x10000000 85 0x2 0x0 0x50000000 0x10000000 [all …]
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/linux/arch/powerpc/boot/dts/fsl/ |
H A D | t104xd4rdb.dtsi | 42 size = <0 0x1000000>; 43 alignment = <0 0x1000000>; 46 size = <0 0x400000>; 47 alignment = <0 0x400000>; 50 size = <0 0x2000000>; 51 alignment = <0 0x2000000>; 56 reg = <0xf 0xfe124000 0 0x2000>; 57 ranges = <0 0 0xf 0xe8000000 0x08000000 58 2 0 0xf 0xff800000 0x00010000 59 3 0 0xf 0xffdf0000 0x00008000>; [all …]
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H A D | t104xrdb.dtsi | 48 size = <0 0x1000000>; 49 alignment = <0 0x1000000>; 52 size = <0 0x400000>; 53 alignment = <0 0x400000>; 56 size = <0 0x2000000>; 57 alignment = <0 0x2000000>; 62 reg = <0xf 0xfe124000 0 0x2000>; 63 ranges = <0 0 0xf 0xe8000000 0x08000000 64 2 0 0xf 0xff800000 0x00010000 65 3 0 0xf 0xffdf0000 0x00008000>; [all …]
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H A D | t1023rdb.dts | 50 size = <0 0x1000000>; 51 alignment = <0 0x1000000>; 55 size = <0 0x400000>; 56 alignment = <0 0x400000>; 60 size = <0 0x2000000>; 61 alignment = <0 0x2000000>; 66 reg = <0xf 0xfe124000 0 0x2000>; 67 ranges = <0 0 0xf 0xe8000000 0x08000000 68 1 0 0xf 0xff800000 0x00010000>; 70 nor@0,0 { [all …]
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H A D | t1024rdb.dts | 54 size = <0 0x1000000>; 55 alignment = <0 0x1000000>; 59 size = <0 0x400000>; 60 alignment = <0 0x400000>; 64 size = <0 0x2000000>; 65 alignment = <0 0x2000000>; 70 reg = <0xf 0xfe124000 0 0x2000>; 71 ranges = <0 0 0xf 0xe8000000 0x08000000 72 2 0 0xf 0xff800000 0x00010000 73 3 0 0xf 0xffdf0000 0x00008000>; [all …]
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H A D | kmcent2.dts | 27 size = <0 0x1000000>; 28 alignment = <0 0x1000000>; 31 size = <0 0x400000>; 32 alignment = <0 0x400000>; 35 size = <0 0x2000000>; 36 alignment = <0 0x2000000>; 41 reg = <0xf 0xfe124000 0 0x2000>; 42 ranges = <0 0 0xf 0xe8000000 0x04000000 43 1 0 0xf 0xfa000000 0x00010000 44 2 0 0xf 0xfb000000 0x00010000 [all …]
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H A D | t1024qds.dts | 50 size = <0 0x1000000>; 51 alignment = <0 0x1000000>; 55 size = <0 0x400000>; 56 alignment = <0 0x400000>; 60 size = <0 0x2000000>; 61 alignment = <0 0x2000000>; 66 reg = <0xf 0xfe124000 0 0x2000>; 67 ranges = <0 0 0xf 0xe8000000 0x08000000 68 2 0 0xf 0xff800000 0x00010000 69 3 0 0xf 0xffdf0000 0x00008000>; [all …]
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H A D | t104xqds.dtsi | 74 size = <0 0x1000000>; 75 alignment = <0 0x1000000>; 78 size = <0 0x400000>; 79 alignment = <0 0x400000>; 82 size = <0 0x2000000>; 83 alignment = <0 0x2000000>; 88 reg = <0xf 0xfe124000 0 0x2000>; 89 ranges = <0 0 0xf 0xe8000000 0x08000000 90 2 0 0xf 0xff800000 0x00010000 91 3 0 0xf 0xffdf0000 0x00008000>; [all …]
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/linux/Documentation/devicetree/bindings/memory-controllers/ |
H A D | atmel,ebi.txt | 103 reg = <0x10000000 0x10000000 104 0x40000000 0x30000000>; 105 ranges = <0x0 0x0 0x10000000 0x10000000 106 0x1 0x0 0x40000000 0x10000000 107 0x2 0x0 0x50000000 0x10000000 108 0x3 0x0 0x60000000 0x10000000>; 112 pinctrl-0 = <&pinctrl_ebi_addr>; 114 nor: flash@0,0 { 118 reg = <0x0 0x0 0x1000000>; 124 atmel,smc-ncs-rd-setup-ns = <0>; [all …]
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/linux/arch/arm/boot/dts/cirrus/ |
H A D | ep7209.dtsi | 28 #address-cells = <0>; 29 #size-cells = <0>; 47 reg = <0x80000000 0xc000>; 53 reg = <0x80000000 0x4000>; 60 reg = <0x80000000 0x1 0x80000040 0x1>; 67 reg = <0x80000001 0x1 0x80000041 0x1>; 74 reg = <0x80000003 0x1 0x80000043 0x1>; 81 reg = <0x80000083 0x1 0x800000c3 0x1>; 88 reg = <0x80000100 0x80>; 96 reg = <0x80000180 0x80>; [all …]
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/linux/drivers/gpu/drm/etnaviv/ |
H A D | common.xml.h | 7 http://0x04.net/cgit/index.cgi/rules-ng-ng 8 git clone git://0x04.net/rules-ng-ng 43 #define PIPE_ID_PIPE_3D 0x00000000 44 #define PIPE_ID_PIPE_2D 0x00000001 45 #define SYNC_RECIPIENT_FE 0x00000001 46 #define SYNC_RECIPIENT_RA 0x00000005 47 #define SYNC_RECIPIENT_PE 0x00000007 48 #define SYNC_RECIPIENT_DE 0x0000000b 49 #define SYNC_RECIPIENT_BLT 0x00000010 50 #define ENDIAN_MODE_NO_SWAP 0x00000000 [all …]
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/linux/arch/xtensa/include/asm/ |
H A D | kmem_layout.h | 23 #define XCHAL_PAGE_TABLE_VADDR __XTENSA_UL_CONST(0x80000000) 24 #define XCHAL_PAGE_TABLE_SIZE __XTENSA_UL_CONST(0x00400000) 28 #define XCHAL_KSEG_CACHED_VADDR __XTENSA_UL_CONST(0xd0000000) 29 #define XCHAL_KSEG_BYPASS_VADDR __XTENSA_UL_CONST(0xd8000000) 30 #define XCHAL_KSEG_SIZE __XTENSA_UL_CONST(0x08000000) 31 #define XCHAL_KSEG_ALIGNMENT __XTENSA_UL_CONST(0x08000000) 37 #define XCHAL_KSEG_CACHED_VADDR __XTENSA_UL_CONST(0xb0000000) 38 #define XCHAL_KSEG_BYPASS_VADDR __XTENSA_UL_CONST(0xc0000000) 39 #define XCHAL_KSEG_SIZE __XTENSA_UL_CONST(0x10000000) 40 #define XCHAL_KSEG_ALIGNMENT __XTENSA_UL_CONST(0x10000000) [all …]
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H A D | initialize_mmu.h | 34 #define CA_WRITEBACK (0x4) 49 movi a3, 0x25 /* For SMP/MX -- internal for writeback, 53 movi a3, 0x29 /* non-MX -- Most cores use Std Memory 71 movi a1, 0 78 #if CONFIG_KERNEL_LOAD_ADDRESS < 0x40000000ul 79 #define TEMP_MAPPING_VADDR 0x40000000 81 #define TEMP_MAPPING_VADDR 0x00000000 84 /* Step 1: invalidate mapping at 0x40000000..0x5FFFFFFF. */ 91 /* Step 2: map 0x40000000..0x47FFFFFF to paddr containing this code 110 * Start at 0x60000000, wrap around, and end with 0x20000000 [all …]
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/linux/arch/mips/boot/dts/loongson/ |
H A D | loongson64v_4core_virtio.dts | 12 #address-cells = <0>; 22 ranges = <0 0x1fe00000 0 0x1fe00000 0x100000 23 0 0x3ff00000 0 0x3ff00000 0x100000 24 0xefd 0xfb000000 0xefd 0xfb000000 0x10000000>; 28 reg = <0 0x3ff01400 0x64>; 37 loongson,parent_int_map = <0x00000001>, /* int0 */ 38 <0xfffffffe>, /* int1 */ 39 <0x00000000>, /* int2 */ 40 <0x00000000>; /* int3 */ 46 reg = <0 0x1fe001e0 0x8>; [all …]
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H A D | rs780e-pch.dtsi | 8 ranges = <0 0x10000000 0 0x10000000 0 0x10000000 9 0 0x40000000 0 0x40000000 0 0x40000000 10 0xfd 0xfe000000 0xfd 0xfe000000 0 0x2000000 /* PCI Config Space */>; 18 reg = <0 0x1a000000 0 0x02000000>; 20 ranges = <0x01000000 0 0x00004000 0 0x18004000 0 0x0000c000>, 21 <0x02000000 0 0x40000000 0 0x40000000 0 0x40000000>; 28 ranges = <1 0 0 0x18000000 0x4000>; 32 reg = <1 0x70 0x8>; 39 reg = <1 0x800 0x100>;
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/linux/drivers/net/wireless/broadcom/b43/ |
H A D | dma.h | 19 #define B43_DMA32_TXCTL 0x00 20 #define B43_DMA32_TXENABLE 0x00000001 21 #define B43_DMA32_TXSUSPEND 0x00000002 22 #define B43_DMA32_TXLOOPBACK 0x00000004 23 #define B43_DMA32_TXFLUSH 0x00000010 24 #define B43_DMA32_TXPARITYDISABLE 0x00000800 25 #define B43_DMA32_TXADDREXT_MASK 0x00030000 27 #define B43_DMA32_TXRING 0x04 28 #define B43_DMA32_TXINDEX 0x08 29 #define B43_DMA32_TXSTATUS 0x0C [all …]
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/linux/arch/mips/boot/dts/brcm/ |
H A D | bcm97435svmb.dts | 11 memory@0 { 13 reg = <0x00000000 0x10000000>, 14 <0x20000000 0x30000000>, 15 <0x90000000 0x40000000>; 135 brcm,scb-sizes = <0 0x40000000 0 0x40000000>; 136 dma-ranges = <0x43000000 0x00000000 0x00000000 0x00000000 0x0 0x10000000 137 0x43000000 0x00000000 0x10000000 0x20000000 0x0 0x30000000 138 0x43000000 0x00000000 0x40000000 0x90000000 0x0 0x40000000>;
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H A D | bcm97425svmb.dts | 11 memory@0 { 13 reg = <0x00000000 0x10000000>, 14 <0x20000000 0x30000000>, 15 <0x90000000 0x40000000>; 119 flash@0 { 121 reg = <0>; 133 flash0.cfe@0 { 134 reg = <0x0 0x200000>; 138 reg = <0x200000 0x40000>; 142 reg = <0x240000 0x10000>; [all …]
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/linux/arch/arm/include/debug/ |
H A D | icedcc.S | 16 mcr p14, 0, \rd, c0, c5, 0 21 mrc p14, 0, \rx, c0, c1, 0 22 tst \rx, #0x20000000 30 mov \rd, #0x2000000 34 mrc p14, 0, \rx, c0, c1, 0 35 tst \rx, #0x20000000 43 mcr p14, 0, \rd, c8, c0, 0 48 mrc p14, 0, \rx, c14, c0, 0 49 tst \rx, #0x10000000 57 mov \rd, #0x10000000 [all …]
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/linux/drivers/net/ethernet/sis/ |
H A D | sis900.h | 19 #define SIS900_TOTAL_SIZE 0x100 23 cr=0x0, //Command Register 24 cfg=0x4, //Configuration Register 25 mear=0x8, //EEPROM Access Register 26 ptscr=0xc, //PCI Test Control Register 27 isr=0x10, //Interrupt Status Register 28 imr=0x14, //Interrupt Mask Register 29 ier=0x18, //Interrupt Enable Register 30 epar=0x18, //Enhanced PHY Access Register 31 txdp=0x20, //Transmit Descriptor Pointer Register [all …]
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/linux/Documentation/devicetree/bindings/leds/ |
H A D | register-bit-led.yaml | 26 pattern: '^led@[0-9a-f]+,[0-9a-f]{1,2}$' 41 [ 0x1, 0x2, 0x4, 0x8, 0x10, 0x20, 0x40, 0x80, 0x100, 0x200, 0x400, 0x800, 42 0x1000, 0x2000, 0x4000, 0x8000, 0x10000, 0x20000, 0x40000, 0x80000, 43 0x100000, 0x200000, 0x400000, 0x800000, 0x1000000, 0x2000000, 0x4000000, 44 0x8000000, 0x10000000, 0x20000000, 0x40000000, 0x80000000 ] 64 reg = <0x10000000 0x1000>; 67 ranges = <0x0 0x10000000 0x1000>; 69 led@8,0 { 71 reg = <0x08 0x04>; 72 offset = <0x08>; [all …]
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/linux/Documentation/devicetree/bindings/pci/ |
H A D | nvidia,tegra20-pcie.txt | 27 - cell 0 specifies the bus and device numbers of the root port: 30 - cell 1 denotes the upper 32 address bits and should be 0 45 - 0x81000000: I/O memory region 46 - 0x82000000: non-prefetchable memory region 47 - 0xc2000000: prefetchable memory region 73 - pinctrl-0: phandle for the default/active state of pin configurations. 104 - If lanes 0 to 3 are used: 150 - Root port 0 uses 4 lanes, root port 1 is unused. 158 "pcie-N": where N ranges from 0 to the value specified in nvidia,num-lanes. 171 reg = <0x80003000 0x00000800 /* PADS registers */ [all …]
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/linux/arch/arm/boot/dts/st/ |
H A D | spear13xx.dtsi | 15 #size-cells = <0>; 17 cpu@0 { 20 reg = <0>; 36 reg = < 0xec801000 0x1000 >, 37 < 0xec800100 0x0100 >; 42 interrupts = <0 6 0x04>, 43 <0 7 0x04>; 48 reg = <0xed000000 0x1000>; 56 reg = <0 0x40000000>; 79 ranges = <0x50000000 0x50000000 0x10000000 [all …]
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