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/linux/arch/arm/include/uapi/asm/
H A Dunistd.h17 #define __NR_OABI_SYSCALL_BASE 0x900000
18 #define __NR_SYSCALL_MASK 0x0fffff
21 #define __NR_SYSCALL_BASE 0
33 #define __ARM_NR_BASE (__NR_SYSCALL_BASE+0x0f0000)
/linux/Documentation/devicetree/bindings/bus/
H A Dpalmbus.yaml19 pattern: "^palmbus(@[0-9a-f]+)?$"
37 "@[0-9a-f]+$":
62 reg = <0x1e000000 0x100000>;
65 ranges = <0x0 0x1e000000 0x0fffff>;
72 gpio-ranges = <&pinctrl 0 0 95>;
74 reg = <0x600 0x100>;
/linux/drivers/net/wireless/realtek/rtlwifi/rtl8192cu/
H A Dhw.c107 for (rf_path = 0; rf_path < 2; rf_path++) { in _rtl92cu_read_txpower_info_from_hwpg()
108 for (i = 0; i < 3; i++) { in _rtl92cu_read_txpower_info_from_hwpg()
127 for (i = 0; i < 3; i++) { in _rtl92cu_read_txpower_info_from_hwpg()
133 (tempval & 0xf); in _rtl92cu_read_txpower_info_from_hwpg()
135 ((tempval & 0xf0) >> 4); in _rtl92cu_read_txpower_info_from_hwpg()
137 for (rf_path = 0; rf_path < 2; rf_path++) in _rtl92cu_read_txpower_info_from_hwpg()
138 for (i = 0; i < 3; i++) in _rtl92cu_read_txpower_info_from_hwpg()
140 "RF(%d) EEPROM CCK Area(%d) = 0x%x\n", in _rtl92cu_read_txpower_info_from_hwpg()
144 for (rf_path = 0; rf_path < 2; rf_path++) in _rtl92cu_read_txpower_info_from_hwpg()
145 for (i = 0; i < 3; i++) in _rtl92cu_read_txpower_info_from_hwpg()
[all …]
/linux/arch/mips/include/asm/sn/sn0/
H A Dhubpi.h24 #define PI_BASE 0x000000
28 #define PI_CPU_PROTECT 0x000000 /* CPU Protection */
29 #define PI_PROT_OVERRD 0x000008 /* Clear CPU Protection bit */
30 #define PI_IO_PROTECT 0x000010 /* Interrupt Pending Protection */
31 #define PI_REGION_PRESENT 0x000018 /* Indicates whether region exists */
32 #define PI_CPU_NUM 0x000020 /* CPU Number ID */
33 #define PI_CALIAS_SIZE 0x000028 /* Cached Alias Size */
34 #define PI_MAX_CRB_TIMEOUT 0x000030 /* Maximum Timeout for CRB */
35 #define PI_CRB_SFACTOR 0x000038 /* Scale factor for CRB timeout */
38 #define PI_CALIAS_SIZE_0 0
[all …]
/linux/lib/xz/
H A Dxz_dec_bcj.c1 // SPDX-License-Identifier: 0BSD
69 * PowerPC 4 0
70 * IA-64 16 0
71 * ARM 4 0
73 * SPARC 4 0
86 return b == 0x00 || b == 0xFF; in bcj_x86_test_msbyte()
94 static const uint8_t mask_to_bit_num[8] = { 0, 1, 2, 2, 3, 3, 3, 3 }; in bcj_x86()
105 return 0; in bcj_x86()
108 for (i = 0; i < size; ++i) { in bcj_x86()
109 if ((buf[i] & 0xFE) != 0xE8) in bcj_x86()
[all …]
/linux/drivers/media/dvb-frontends/
H A Dcxd2820r_c.c14 struct i2c_client *client = priv->client[0]; in cxd2820r_set_frontend_c()
21 { 0x00080, 0x01, 0xff }, in cxd2820r_set_frontend_c()
22 { 0x00081, 0x05, 0xff }, in cxd2820r_set_frontend_c()
23 { 0x00085, 0x07, 0xff }, in cxd2820r_set_frontend_c()
24 { 0x00088, 0x01, 0xff }, in cxd2820r_set_frontend_c()
26 { 0x00082, 0x20, 0x60 }, in cxd2820r_set_frontend_c()
27 { 0x1016a, 0x48, 0xff }, in cxd2820r_set_frontend_c()
28 { 0x100a5, 0x00, 0x01 }, in cxd2820r_set_frontend_c()
29 { 0x10020, 0x06, 0x07 }, in cxd2820r_set_frontend_c()
30 { 0x10059, 0x50, 0xff }, in cxd2820r_set_frontend_c()
[all …]
H A Dcxd2820r_t.c14 struct i2c_client *client = priv->client[0]; in cxd2820r_set_frontend_t()
21 { 0x17, 0xea, 0xaa, 0xaa, 0xaa }, /* 6 MHz */ in cxd2820r_set_frontend_t()
22 { 0x14, 0x80, 0x00, 0x00, 0x00 }, /* 7 MHz */ in cxd2820r_set_frontend_t()
23 { 0x11, 0xf0, 0x00, 0x00, 0x00 }, /* 8 MHz */ in cxd2820r_set_frontend_t()
26 { 0x1f, 0xdc }, /* 6 MHz */ in cxd2820r_set_frontend_t()
27 { 0x12, 0xf8 }, /* 7 MHz */ in cxd2820r_set_frontend_t()
28 { 0x01, 0xe0 }, /* 8 MHz */ in cxd2820r_set_frontend_t()
31 { 0x00080, 0x00, 0xff }, in cxd2820r_set_frontend_t()
32 { 0x00081, 0x03, 0xff }, in cxd2820r_set_frontend_t()
33 { 0x00085, 0x07, 0xff }, in cxd2820r_set_frontend_t()
[all …]
/linux/arch/mips/include/asm/pci/
H A Dbridge.h30 #define BRIDGE_ATE_RAM_SIZE 0x00000400 /* 1kB ATE RAM */
32 #define BRIDGE_CONFIG_BASE 0x20000
33 #define BRIDGE_CONFIG1_BASE 0x28000
34 #define BRIDGE_CONFIG_END 0x30000
35 #define BRIDGE_CONFIG_SLOT_SIZE 0x1000
37 #define BRIDGE_SSRAM_512K 0x00080000 /* 512kB */
38 #define BRIDGE_SSRAM_128K 0x00020000 /* 128kB */
39 #define BRIDGE_SSRAM_64K 0x00010000 /* 64kB */
40 #define BRIDGE_SSRAM_0K 0x00000000 /* 0kB */
48 #define ATE_V 0x01
[all …]
/linux/sound/pci/pcxhr/
H A Dpcxhr_mixer.c25 #define PCXHR_LINE_CAPTURE_LEVEL_MIN 0 /* -112.0 dB */
27 #define PCXHR_LINE_CAPTURE_ZERO_LEVEL 224 /* 0.0 dB ( 0 dBu -> 0 dBFS ) */
29 #define PCXHR_LINE_PLAYBACK_LEVEL_MIN 0 /* -104.0 dB */
31 #define PCXHR_LINE_PLAYBACK_ZERO_LEVEL 104 /* 0.0 dB ( 0 dBFS -> 0 dBu ) */
47 rmh.cmd[0] |= IO_NUM_REG_IN_ANA_LEVEL; in pcxhr_update_analog_audio_level()
50 rmh.cmd[0] |= IO_NUM_REG_OUT_ANA_LEVEL; in pcxhr_update_analog_audio_level()
61 if (err < 0) { in pcxhr_update_analog_audio_level()
68 return 0; in pcxhr_update_analog_audio_level()
81 if (kcontrol->private_value == 0) { /* playback */ in pcxhr_analog_vol_info()
106 return 0; in pcxhr_analog_vol_info()
[all …]
/linux/drivers/scsi/qla2xxx/
H A Dqla_attr.c26 int rval = 0; in qla2x00_sysfs_read_fw_dump()
30 return 0; in qla2x00_sysfs_read_fw_dump()
53 rval = 0; in qla2x00_sysfs_read_fw_dump()
69 if (off != 0) in qla2x00_sysfs_write_fw_dump()
70 return (0); in qla2x00_sysfs_write_fw_dump()
74 case 0: in qla2x00_sysfs_write_fw_dump()
78 ql_log(ql_log_info, vha, 0x705d, in qla2x00_sysfs_write_fw_dump()
85 ha->fw_dump_reading = 0; in qla2x00_sysfs_write_fw_dump()
92 ql_log(ql_log_info, vha, 0x705e, in qla2x00_sysfs_write_fw_dump()
116 ql_dbg(ql_dbg_user, vha, 0x705b, in qla2x00_sysfs_write_fw_dump()
[all …]
/linux/fs/fat/
H A Dinode.c11 * Max Cohan: Fixed invalid FSINFO offset when info_sector is 0
35 #define FAT_DATE_MIN (0<<9 | 1<<5 | 1)
77 .media = 0xFE,
84 .media = 0xFC,
91 .media = 0xFF,
98 .media = 0xFD,
134 return 0; in __fat_get_block()
137 return 0; in __fat_get_block()
179 return 0; in __fat_get_block()
193 return 0; in fat_get_block()
[all …]