14 	struct i2c_client *client = priv->client[0];  in cxd2820r_set_frontend_t()
21 		{ 0x17, 0xea, 0xaa, 0xaa, 0xaa }, /* 6 MHz */  in cxd2820r_set_frontend_t()
22 		{ 0x14, 0x80, 0x00, 0x00, 0x00 }, /* 7 MHz */  in cxd2820r_set_frontend_t()
23 		{ 0x11, 0xf0, 0x00, 0x00, 0x00 }, /* 8 MHz */  in cxd2820r_set_frontend_t()
26 		{ 0x1f, 0xdc }, /* 6 MHz */  in cxd2820r_set_frontend_t()
27 		{ 0x12, 0xf8 }, /* 7 MHz */  in cxd2820r_set_frontend_t()
28 		{ 0x01, 0xe0 }, /* 8 MHz */  in cxd2820r_set_frontend_t()
31 		{ 0x00080, 0x00, 0xff },  in cxd2820r_set_frontend_t()
32 		{ 0x00081, 0x03, 0xff },  in cxd2820r_set_frontend_t()
33 		{ 0x00085, 0x07, 0xff },  in cxd2820r_set_frontend_t()
34 		{ 0x00088, 0x01, 0xff },  in cxd2820r_set_frontend_t()
36 		{ 0x00070, priv->ts_mode, 0xff },  in cxd2820r_set_frontend_t()
37 		{ 0x00071, !priv->ts_clk_inv << 4, 0x10 },  in cxd2820r_set_frontend_t()
38 		{ 0x000cb, priv->if_agc_polarity << 6, 0x40 },  in cxd2820r_set_frontend_t()
39 		{ 0x000a5, 0x00, 0x01 },  in cxd2820r_set_frontend_t()
40 		{ 0x00082, 0x20, 0x60 },  in cxd2820r_set_frontend_t()
41 		{ 0x000c2, 0xc3, 0xff },  in cxd2820r_set_frontend_t()
42 		{ 0x0016a, 0x50, 0xff },  in cxd2820r_set_frontend_t()
43 		{ 0x00427, 0x41, 0xff },  in cxd2820r_set_frontend_t()
53 		bw_i = 0;  in cxd2820r_set_frontend_t()
62 		bw_param = 0;  in cxd2820r_set_frontend_t()
92 	utmp = DIV_ROUND_CLOSEST_ULL((u64)if_frequency * 0x1000000, CXD2820R_CLK);  in cxd2820r_set_frontend_t()
93 	buf[0] = (utmp >> 16) & 0xff;  in cxd2820r_set_frontend_t()
94 	buf[1] = (utmp >>  8) & 0xff;  in cxd2820r_set_frontend_t()
95 	buf[2] = (utmp >>  0) & 0xff;  in cxd2820r_set_frontend_t()
96 	ret = regmap_bulk_write(priv->regmap[0], 0x00b6, buf, 3);  in cxd2820r_set_frontend_t()
100 	ret = regmap_bulk_write(priv->regmap[0], 0x009f, bw_params1[bw_i], 5);  in cxd2820r_set_frontend_t()
104 	ret = regmap_update_bits(priv->regmap[0], 0x00d7, 0xc0, bw_param << 6);  in cxd2820r_set_frontend_t()
108 	ret = regmap_bulk_write(priv->regmap[0], 0x00d9, bw_params2[bw_i], 2);  in cxd2820r_set_frontend_t()
112 	ret = regmap_write(priv->regmap[0], 0x00ff, 0x08);  in cxd2820r_set_frontend_t()
116 	ret = regmap_write(priv->regmap[0], 0x00fe, 0x01);  in cxd2820r_set_frontend_t()
130 	struct i2c_client *client = priv->client[0];  in cxd2820r_get_frontend_t()
137 	ret = regmap_bulk_read(priv->regmap[0], 0x002f, buf, sizeof(buf));  in cxd2820r_get_frontend_t()
141 	switch ((buf[0] >> 6) & 0x03) {  in cxd2820r_get_frontend_t()
142 	case 0:  in cxd2820r_get_frontend_t()
153 	switch ((buf[1] >> 1) & 0x03) {  in cxd2820r_get_frontend_t()
154 	case 0:  in cxd2820r_get_frontend_t()
162 	switch ((buf[1] >> 3) & 0x03) {  in cxd2820r_get_frontend_t()
163 	case 0:  in cxd2820r_get_frontend_t()
177 	switch ((buf[0] >> 3) & 0x07) {  in cxd2820r_get_frontend_t()
178 	case 0:  in cxd2820r_get_frontend_t()
192 	switch ((buf[0] >> 0) & 0x07) {  in cxd2820r_get_frontend_t()
193 	case 0:  in cxd2820r_get_frontend_t()
210 	switch ((buf[1] >> 5) & 0x07) {  in cxd2820r_get_frontend_t()
211 	case 0:  in cxd2820r_get_frontend_t()
228 	ret = regmap_read(priv->regmap[0], 0x07c6, &utmp);  in cxd2820r_get_frontend_t()
232 	switch ((utmp >> 0) & 0x01) {  in cxd2820r_get_frontend_t()
233 	case 0:  in cxd2820r_get_frontend_t()
250 	struct i2c_client *client = priv->client[0];  in cxd2820r_read_status_t()
257 	ret = regmap_bulk_read(priv->regmap[0], 0x0010, &buf[0], 1);  in cxd2820r_read_status_t()
260 	ret = regmap_bulk_read(priv->regmap[0], 0x0073, &buf[1], 1);  in cxd2820r_read_status_t()
264 	utmp1 = (buf[0] >> 0) & 0x07;  in cxd2820r_read_status_t()
265 	utmp2 = (buf[1] >> 3) & 0x01;  in cxd2820r_read_status_t()
274 		*status = 0;  in cxd2820r_read_status_t()
284 		ret = regmap_bulk_read(priv->regmap[0], 0x0026, buf, 2);  in cxd2820r_read_status_t()
288 		utmp = buf[0] << 8 | buf[1] << 0;  in cxd2820r_read_status_t()
289 		utmp = ~utmp & 0x0fff;  in cxd2820r_read_status_t()
290 		/* Scale value to 0x0000-0xffff */  in cxd2820r_read_status_t()
294 		c->strength.stat[0].scale = FE_SCALE_RELATIVE;  in cxd2820r_read_status_t()
295 		c->strength.stat[0].uvalue = strength;  in cxd2820r_read_status_t()
298 		c->strength.stat[0].scale = FE_SCALE_NOT_AVAILABLE;  in cxd2820r_read_status_t()
305 		ret = regmap_bulk_read(priv->regmap[0], 0x002c, buf, 2);  in cxd2820r_read_status_t()
309 		utmp = buf[0] << 8 | buf[1] << 0;  in cxd2820r_read_status_t()
315 			cnr = 0;  in cxd2820r_read_status_t()
318 		c->cnr.stat[0].scale = FE_SCALE_DECIBEL;  in cxd2820r_read_status_t()
319 		c->cnr.stat[0].svalue = cnr;  in cxd2820r_read_status_t()
322 		c->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE;  in cxd2820r_read_status_t()
331 			ret = regmap_bulk_read(priv->regmap[0], 0x0076, buf, 3);  in cxd2820r_read_status_t()
335 			if ((buf[2] >> 7) & 0x01) {  in cxd2820r_read_status_t()
337 						 buf[0] << 0;  in cxd2820r_read_status_t()
338 				post_bit_error &= 0x0fffff;  in cxd2820r_read_status_t()
341 				post_bit_error = 0;  in cxd2820r_read_status_t()
345 			post_bit_error = 0;  in cxd2820r_read_status_t()
350 			ret = regmap_write(priv->regmap[0], 0x0079, 0x01);  in cxd2820r_read_status_t()
359 		c->post_bit_error.stat[0].scale = FE_SCALE_COUNTER;  in cxd2820r_read_status_t()
360 		c->post_bit_error.stat[0].uvalue = priv->post_bit_error;  in cxd2820r_read_status_t()
363 		c->post_bit_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;  in cxd2820r_read_status_t()
375 	struct i2c_client *client = priv->client[0];  in cxd2820r_init_t()
380 	ret = regmap_write(priv->regmap[0], 0x0085, 0x07);  in cxd2820r_init_t()
393 	struct i2c_client *client = priv->client[0];  in cxd2820r_sleep_t()
396 		{ 0x000ff, 0x1f, 0xff },  in cxd2820r_sleep_t()
397 		{ 0x00085, 0x00, 0xff },  in cxd2820r_sleep_t()
398 		{ 0x00088, 0x01, 0xff },  in cxd2820r_sleep_t()
399 		{ 0x00081, 0x00, 0xff },  in cxd2820r_sleep_t()
400 		{ 0x00080, 0x00, 0xff },  in cxd2820r_sleep_t()
424 	return 0;  in cxd2820r_get_tune_settings_t()