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/freebsd/sys/contrib/device-tree/src/arm/broadcom/
H A Dbcm11351.dtsi21 #size-cells = <0>;
23 cpu0: cpu@0 {
26 reg = <0>;
33 secondary-boot-reg = <0x3500417c>;
41 #address-cells = <0>;
43 reg = <0x3ff01000 0x1000>,
44 <0x3ff00100 0x100>;
49 reg = <0x3404c00
[all...]
H A Dbcm2166x-common.dtsi22 ranges = <0 0x34000000 0x102f83ac>;
28 reg = <0x0004e000 0x400>; /* 1 KiB in SRAM */
33 reg = <0x01001f00 0x24>;
38 reg = <0x01003000 0x524>;
51 reg = <0x01006000 0x1c>;
60 ranges = <0 0x3e000000 0x0001c070>;
64 uartb: serial@0 {
66 reg = <0x00000000 0x118>;
76 reg = <0x00001000 0x118>;
86 reg = <0x00002000 0x118>;
[all …]
/freebsd/sys/dev/mii/
H A Djmphyreg.h38 #define JMPHY_SSR 0x11
39 #define JMPHY_SSR_SPEED_1000 0x8000
40 #define JMPHY_SSR_SPEED_100 0x4000
41 #define JMPHY_SSR_SPEED_10 0x0000
42 #define JMPHY_SSR_SPEED_MASK 0xC000
43 #define JMPHY_SSR_DUPLEX 0x2000
44 #define JMPHY_SSR_SPD_DPLX_RESOLVED 0x0800
45 #define JMPHY_SSR_LINK_UP 0x0400
46 #define JMPHY_SSR_MDI_XOVER 0x0040
47 #define JMPHY_SSR_INV_POLARITY 0x0002
[all …]
/freebsd/sys/dev/cyapa/
H A Dcyapa.h43 * if (stat & CYAPA_STAT_RUNNING) is 0.
51 #define CYAPA_BOOT_BUSY 0x80
52 #define CYAPA_BOOT_RUNNING 0x10
53 #define CYAPA_BOOT_DATA_VALID 0x08
54 #define CYAPA_BOOT_CSUM_VALID 0x01
56 #define CYAPA_ERROR_INVALID 0x80
57 #define CYAPA_ERROR_INVALID_KEY 0x40
58 #define CYAPA_ERROR_BOOTLOADER 0x20
59 #define CYAPA_ERROR_CMD_CSUM 0x10
60 #define CYAPA_ERROR_FLASH_PROT 0x08
[all …]
/freebsd/sys/dev/rtwn/rtl8821a/
H A Dr21a_chan.c64 rtwn_bb_setbits(sc, R12A_RFE_INV(0), 0x00100000, 0); in r21a_bypass_ext_lna_2ghz()
65 rtwn_bb_setbits(sc, R12A_RFE_INV(0), 0x00400000, 0); in r21a_bypass_ext_lna_2ghz()
66 rtwn_bb_setbits(sc, R12A_RFE_PINMUX(0), 0, 0x07); in r21a_bypass_ext_lna_2ghz()
67 rtwn_bb_setbits(sc, R12A_RFE_PINMUX(0), 0, 0x0700); in r21a_bypass_ext_lna_2ghz()
77 0, R12A_OFDMCCK_EN_CCK | R12A_OFDMCCK_EN_OFDM); in r21a_set_band_2ghz()
80 rtwn_bb_setbits(sc, R12A_RFE_PINMUX(0), in r21a_set_band_2ghz()
81 R12A_RFE_PINMUX_LNA_MASK, 0x7000); in r21a_set_band_2ghz()
82 rtwn_bb_setbits(sc, R12A_RFE_PINMUX(0), in r21a_set_band_2ghz()
83 R12A_RFE_PINMUX_PA_A_MASK, 0x70); in r21a_set_band_2ghz()
87 rtwn_bb_setbits(sc, R12A_RFE_INV(0), 0, 0x00100000); in r21a_set_band_2ghz()
[all …]
/freebsd/sys/dev/vte/
H A Dif_vtereg.h36 #define VENDORID_RDC 0x17F3
41 #define DEVICEID_RDC_R6040 0x6040 /* PMX-1000 */
43 /* MAC control register 0 */
44 #define VTE_MCR0 0x00
45 #define MCR0_ACCPT_ERR 0x0001
46 #define MCR0_RX_ENB 0x0002
47 #define MCR0_ACCPT_RUNT 0x0004
48 #define MCR0_ACCPT_LONG_PKT 0x0008
49 #define MCR0_ACCPT_DRIBBLE 0x0010
50 #define MCR0_PROMISC 0x0020
[all …]
/freebsd/sys/dev/rtwn/rtl8192c/usb/
H A Dr92cu_reg.h29 #define R92C_USB_SIE_INTF 0x0e0
34 #define R92C_USB_SUSPEND 0xfe10
35 #define R92C_USB_INFO 0xfe17
36 #define R92C_USB_SPECIAL_OPTION 0xfe55
37 #define R92C_USB_HCPWM 0xfe57
38 #define R92C_USB_HRPWM 0xfe58
39 #define R92C_USB_DMA_AGG_TO 0xfe5b
40 #define R92C_USB_AGG_TO 0xfe5c
41 #define R92C_USB_AGG_TH 0xfe5d
42 #define R92C_USB_VID 0xfe60
[all …]
/freebsd/sys/dev/syscons/
H A Dscvgarndr.c54 #define SC_RENDER_DEBUG 0
108 RENDERER(mda, 0, txtrndrsw, vga_set);
109 RENDERER(cga, 0, txtrndrsw, vga_set);
110 RENDERER(ega, 0, txtrndrsw, vga_set);
111 RENDERER(vga, 0, txtrndrsw, vga_set);
161 0xC000, 0xA000, 0x9000, 0x8800, 0x8400, 0x8200, 0x8100, 0x8200,
162 0x8400, 0x8400, 0x8400, 0x9200, 0xB200, 0xA900, 0xC900, 0x8600, }, {
163 0x0000, 0x4000, 0x6000, 0x7000, 0x7800, 0x7C00, 0x7E00, 0x7C00,
164 0x7800, 0x7800, 0x7800, 0x6C00, 0x4C00, 0x4600, 0x0600, 0x0000, },
169 0xC000, 0xA000, 0x9000, 0x8800, 0x8400, 0x8200, 0x8100, 0x8700,
[all …]
/freebsd/sys/netgraph/bluetooth/hci/
H A Dng_hci_misc.c66 int error = 0; in ng_hci_mtap()
73 if (error != 0) in ng_hci_mtap()
117 NG_SEND_MSG_HOOK(error, node, msg, hook, 0); in ng_hci_node_is_up()
121 if (error != 0) in ng_hci_node_is_up()
227 bcmp(&n->bdaddr, bdaddr, sizeof(*bdaddr)) == 0) in ng_hci_get_neighbor()
261 static int fake_con_handle = 0x0f00; in ng_hci_new_con()
273 * Bluetooth specification marks 0x0f00 - 0x0fff connection in ng_hci_new_con()
284 if (fake_con_handle > 0x0fff) in ng_hci_new_con()
285 fake_con_handle = 0x0f00; in ng_hci_new_con()
356 bcmp(&con->bdaddr, bdaddr, sizeof(bdaddr_t)) == 0) in ng_hci_con_by_bdaddr()
[all …]
/freebsd/contrib/file/magic/Magdir/
H A Damigaos9 0 belong 0x000003fa AmigaOS shared library
10 0 belong 0x000003f3 AmigaOS loadseg()ble executable/binary
11 0 belong 0x000003e7 AmigaOS object/library data
13 0 beshort 0xe310 Amiga Workbench
28 0 string FC14 Future Composer 1.4 Module sound file
29 0 string SMOD Future Composer 1.3 Module sound file
30 0 string AON4artofnoise Art Of Noise Module sound file
33 0 string Synth4.0 Synthesis Module sound file
34 0 string ARP. The Holy Noise Module sound file
35 0 string BeEp\0 JamCracker Module sound file
[all …]
H A Dpci_ids9 0 name PCI-vendor
11 #>0 uleshort =0x0f00 fOO
12 >0 uleshort =0x1000 Broadcom
13 >0 uleshort =0x1002 AMD/ATI
14 >0 uleshort =0x1013 Cirrus Logic
15 >0 uleshort =0x1014 IBM
16 >0 uleshort =0x1022 AMD
17 >0 uleshort =0x1050 Winbond
18 >0 uleshort =0x105a Promise
19 >0 uleshort =0x1095 Silicon
[all …]
/freebsd/sys/dev/e1000/
H A De1000_82541.h42 #define IGP01E1000_PHY_AGC_A 0x1172
43 #define IGP01E1000_PHY_AGC_B 0x1272
44 #define IGP01E1000_PHY_AGC_C 0x1472
45 #define IGP01E1000_PHY_AGC_D 0x1872
47 #define IGP01E1000_PHY_AGC_PARAM_A 0x1171
48 #define IGP01E1000_PHY_AGC_PARAM_B 0x1271
49 #define IGP01E1000_PHY_AGC_PARAM_C 0x1471
50 #define IGP01E1000_PHY_AGC_PARAM_D 0x1871
52 #define IGP01E1000_PHY_EDAC_MU_INDEX 0xC000
53 #define IGP01E1000_PHY_EDAC_SIGN_EXT_9_BITS 0x8000
[all …]
/freebsd/sys/netgraph/bluetooth/l2cap/
H A Dng_l2cap_misc.c70 int error = 0; in ng_l2cap_send_hook_info()
79 bcmp(&l2cap->bdaddr, NG_HCI_BDADDR_ANY, sizeof(l2cap->bdaddr)) == 0) in ng_l2cap_send_hook_info()
88 NG_SEND_MSG_HOOK(error, node, msg, hook, 0); in ng_l2cap_send_hook_info()
92 if (error != 0) in ng_l2cap_send_hook_info()
107 static int fake_con_handle = 0x0f00; in ng_l2cap_new_con()
118 con->encryption = 0; in ng_l2cap_new_con()
123 * Bluetooth specification marks 0x0f00 - 0x0fff connection in ng_l2cap_new_con()
134 if (fake_con_handle > 0x0fff) in ng_l2cap_new_con()
135 fake_con_handle = 0x0f00; in ng_l2cap_new_con()
161 (con->flags & NG_L2CAP_CON_OUTGOING) == 0) in ng_l2cap_con_ref()
[all …]
/freebsd/sys/contrib/device-tree/Bindings/clock/
H A Dbrcm,kona-ccu.txt33 reg = <0x3e011000 0x0f00>;
42 #clock-cells = <0>;
49 reg = <0x3e002000 0x1000>;
73 root frac_1m peri 0 BCM281XX_ROOT_CCU_FRAC_1M
75 aon hub_timer peri 0 BCM281XX_AON_CCU_HUB_TIMER
79 hub tmon_1m peri 0 BCM281XX_HUB_CCU_TMON_1M
81 master sdio1 peri 0 BCM281XX_MASTER_CCU_SDIO1
90 slave uartb peri 0 BCM281XX_SLAVE_CCU_UARTB
118 root frac_1m peri 0 BCM21664_ROOT_CCU_FRAC_1M
120 aon hub_timer peri 0 BCM21664_AON_CCU_HUB_TIMER
[all …]
/freebsd/sys/dev/hwpmc/
H A Dhwpmc_amd.h36 #define AMD_PMC_EVSEL_0 0xC0010000
37 #define AMD_PMC_EVSEL_1 0xC0010001
38 #define AMD_PMC_EVSEL_2 0xC0010002
39 #define AMD_PMC_EVSEL_3 0xC0010003
41 #define AMD_PMC_PERFCTR_0 0xC0010004
42 #define AMD_PMC_PERFCTR_1 0xC0010005
43 #define AMD_PMC_PERFCTR_2 0xC0010006
44 #define AMD_PMC_PERFCTR_3 0xC0010007
46 #define AMD_PMC_EVSEL_4 0xC0010208
47 #define AMD_PMC_EVSEL_5 0xC001020A
[all …]
H A Dhwpmc_core.h32 #define IA32_PERF_CAPABILITIES 0x345
33 #define PERFCAP_LBR_FORMAT 0x003f
34 #define PERFCAP_PEBS_TRAP 0x0040
35 #define PERFCAP_PEBS_SAVEARCH 0x0080
36 #define PERFCAP_PEBS_RECFORMAT 0x0f00
37 #define PERFCAP_SMM_FREEZE 0x1000
38 #define PERFCAP_FW_WRITE 0x2000 /* full width write aliases */
40 #define IAF_OS 0x1
41 #define IAF_USR 0x2
42 #define IAF_ANY 0x4
[all …]
/freebsd/sys/libkern/
H A Dcrc16.c32 /* CRC table for the CRC-16. The poly is 0x8005 (x16 + x15 + x2 + 1). */
34 0x0000, 0xC0C1, 0xC181, 0x0140, 0xC301, 0x03C0, 0x0280, 0xC241,
35 0xC601, 0x06C0, 0x0780, 0xC741, 0x0500, 0xC5C1, 0xC481, 0x0440,
36 0xCC01, 0x0CC0, 0x0D80, 0xCD41, 0x0F00, 0xCFC1, 0xCE81, 0x0E40,
37 0x0A00, 0xCAC1, 0xCB81, 0x0B40, 0xC901, 0x09C0, 0x0880, 0xC841,
38 0xD801, 0x18C0, 0x1980, 0xD941, 0x1B00, 0xDBC1, 0xDA81, 0x1A40,
39 0x1E00, 0xDEC1, 0xDF81, 0x1F40, 0xDD01, 0x1DC0, 0x1C80, 0xDC41,
40 0x1400, 0xD4C1, 0xD581, 0x1540, 0xD701, 0x17C0, 0x1680, 0xD641,
41 0xD201, 0x12C0, 0x1380, 0xD341, 0x1100, 0xD1C1, 0xD081, 0x1040,
42 0xF001, 0x30C0, 0x3180, 0xF141, 0x3300, 0xF3C1, 0xF281, 0x3240,
[all …]
/freebsd/sys/arm/arm/
H A Dgic_common.h43 #define GIC_BUS_UNKNOWN 0
53 #define GIC_FIRST_SGI 0 /* Irqs 0-15 are SGIs/IPIs. */
62 #define GICD_CTLR 0x0000 /* v1 ICDDCR */
63 #define GICD_TYPER 0x0004 /* v1 ICDICTR */
64 #define GICD_TYPER_ITLINESNUM_MASK 0x1f
65 #define GICD_TYPER_I_NUM(n) ((((n) & 0x1F) + 1) * 32)
66 #define GICD_IIDR 0x0008 /* v1 ICDIIDR */
68 #define GICD_IIDR_PROD_MASK 0xff000000
72 #define GICD_IIDR_VAR_MASK 0x000f0000
76 #define GICD_IIDR_REV_MASK 0x0000f000
[all …]
/freebsd/sys/net80211/
H A Dieee80211_radiotap.h70 uint8_t it_version; /* Version 0. Only increases
83 * (0x80000000) to extend the
111 * Tx/Rx data rate. If bit 0x80 is set then it represents an
146 * power set at factory calibration. 0 is max power.
152 * set at factory calibration. 0 is max power. Monotonically
170 * The first antenna is antenna 0.
208 IEEE80211_RADIOTAP_TSFT = 0,
247 #define IEEE80211_CHAN_TURBO 0x00000010 /* Turbo channel */
248 #define IEEE80211_CHAN_CCK 0x00000020 /* CCK channel */
249 #define IEEE80211_CHAN_OFDM 0x0000004
[all...]
/freebsd/sys/powerpc/include/
H A Dtrap.h39 #define EXC_RSVD 0x0000 /* Reserved */
40 #define EXC_RST 0x0100 /* Reset; all but IBM4xx */
41 #define EXC_MCHK 0x0200 /* Machine Check */
42 #define EXC_DSI 0x0300 /* Data Storage Interrupt */
43 #define EXC_DSE 0x0380 /* Data Segment Interrupt */
44 #define EXC_ISI 0x0400 /* Instruction Storage Interrupt */
45 #define EXC_ISE 0x0480 /* Instruction Segment Interrupt */
46 #define EXC_EXI 0x0500 /* External Interrupt */
47 #define EXC_ALI 0x0600 /* Alignment Interrupt */
48 #define EXC_PGM 0x0700 /* Program Interrupt */
[all …]
/freebsd/sys/contrib/dev/athk/ath10k/
H A Dsdio.c49 pkt->alloc_len = 0; in ath10k_sdio_mbox_free_rx_pkt()
50 pkt->act_len = 0; in ath10k_sdio_mbox_free_rx_pkt()
69 return 0; in ath10k_sdio_mbox_alloc_rx_pkt()
96 FIELD_PREP(GENMASK(7, 0), val); in ath10k_sdio_set_cmd52_arg()
105 memset(&io_cmd, 0, sizeof(io_cmd)); in ath10k_sdio_func0_cmd52_wr_byte()
106 ath10k_sdio_set_cmd52_arg(&io_cmd.arg, 1, 0, address, byte); in ath10k_sdio_func0_cmd52_wr_byte()
110 return mmc_wait_for_cmd(card->host, &io_cmd, 0); in ath10k_sdio_func0_cmd52_wr_byte()
120 memset(&io_cmd, 0, sizeof(io_cmd)); in ath10k_sdio_func0_cmd52_rd_byte()
121 ath10k_sdio_set_cmd52_arg(&io_cmd.arg, 0, 0, address, 0); in ath10k_sdio_func0_cmd52_rd_byte()
125 ret = mmc_wait_for_cmd(card->host, &io_cmd, 0); in ath10k_sdio_func0_cmd52_rd_byte()
[all …]
/freebsd/sys/arm64/include/
H A Dcmn600_reg.h34 #define CMN600_COMMON_PMU_EVENT_SEL 0x2000 /* rw */
36 #define CMN600_COMMON_PMU_EVENT_SEL_OCC_MASK (0x7UL << 32)
68 #define POR_CFGM_NODE_INFO 0x0000 /* ro */
69 #define POR_CFGM_NODE_INFO_LOGICAL_ID_MASK 0xffff00000000UL
71 #define POR_CFGM_NODE_INFO_NODE_ID_MASK 0xffff0000
73 #define POR_CFGM_NODE_INFO_NODE_TYPE_MASK 0xffff
74 #define POR_CFGM_NODE_INFO_NODE_TYPE_SHIFT 0
76 #define NODE_ID_SUB_MASK 0x3
77 #define NODE_ID_SUB_SHIFT 0
78 #define NODE_ID_PORT_MASK 0x4
[all …]
/freebsd/sys/dev/sound/pci/
H A Dfm801.c38 #define PCI_VENDOR_FORTEMEDIA 0x1319
39 #define PCI_DEVICE_FORTEMEDIA1 0x08011319 /* Audio controller */
40 #define PCI_DEVICE_FORTEMEDIA2 0x08021319 /* Joystick controller */
42 #define FM_PCM_VOLUME 0x00
43 #define FM_FM_VOLUME 0x02
44 #define FM_I2S_VOLUME 0x04
45 #define FM_RECORD_SOURCE 0x06
47 #define FM_PLAY_CTL 0x08
48 #define FM_PLAY_RATE_MASK 0x0f00
49 #define FM_PLAY_BUF1_LAST 0x0001
[all …]
/freebsd/sys/dev/bxe/
H A Decore_reg.h35 (0x1<<0)
37 (0x1<<2)
39 (0x1<<5)
41 (0x1<<3)
43 (0x1<<4)
45 (0x1<<1)
47 0x1100bcUL
49 0x1101c0UL
51 0x1101d8UL
53 0x1101d0UL
[all …]
/freebsd/tools/test/iconv/ref/
H A DISO-2022-CN1 0x0000 = 0x0000
2 0x0001 = 0x0001
3 0x0002 = 0x0002
4 0x0003 = 0x0003
5 0x0004 = 0x0004
6 0x0005 = 0x0005
7 0x0006 = 0x0006
8 0x0007 = 0x0007
9 0x0008 = 0x0008
10 0x0009 = 0x0009
[all …]

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