Searched +full:0 +full:x0ae94400 (Results 1 – 9 of 9) sorted by relevance
| /linux/Documentation/devicetree/bindings/display/msm/ |
| H A D | qcom,sm6350-mdss.yaml | 48 "^display-controller@[0-9a-f]+$":
56 "^displayport-controller@[0-9a-f]+$":
65 "^dsi@[0-9a-f]+$":
75 "^phy@[0-9a-f]+$":
95 reg = <0x0ae00000 0x1000>;
109 iommus = <&apps_smmu 0x800 0x2>;
116 reg = <0x0ae01000 0x8f000>,
117 <0x0aeb0000 0x2008>;
139 interrupts = <0>;
145 #size-cells = <0>;
[all …]
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| H A D | qcom,sm6150-mdss.yaml | 47 "^display-controller@[0-9a-f]+$":
54 "^displayport-controller@[0-9a-f]+$":
62 "^dsi@[0-9a-f]+$":
71 "^phy@[0-9a-f]+$":
92 reg = <0x0ae00000 0x1000>;
111 iommus = <&apps_smmu 0x800 0x0>;
117 reg = <0x0ae01000 0x8f000>,
118 <0x0aeb0000 0x2008>;
134 interrupts = <0>;
138 #size-cells = <0>;
[all …]
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| H A D | qcom,sdm670-mdss.yaml | 42 "^display-controller@[0-9a-f]+$":
50 "^displayport-controller@[0-9a-f]+$":
58 "^dsi@[0-9a-f]+$":
67 "^phy@[0-9a-f]+$":
91 reg = <0x0ae00000 0x1000>;
103 interconnects = <&mmss_noc MASTER_MDP_PORT0 0 &mem_noc SLAVE_EBI_CH0 0>,
104 <&mmss_noc MASTER_MDP_PORT1 0 &mem_noc SLAVE_EBI_CH0 0>;
107 iommus = <&apps_smmu 0x880 0x8>,
108 <&apps_smmu 0xc80 0x8>;
116 reg = <0x0ae01000 0x8f000>,
[all …]
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| H A D | qcom,sdm845-mdss.yaml | 43 "^display-controller@[0-9a-f]+$":
51 "^displayport-controller@[0-9a-f]+$":
59 "^dsi@[0-9a-f]+$":
69 "^phy@[0-9a-f]+$":
94 reg = <0x0ae00000 0x1000>;
106 iommus = <&apps_smmu 0x880 0x8>,
107 <&apps_smmu 0xc80 0x8>;
112 reg = <0x0ae01000 0x8f000>,
113 <0x0aeb0000 0x2008>;
124 interrupts = <0>;
[all …]
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| H A D | qcom,sc7180-mdss.yaml | 49 "^display-controller@[0-9a-f]+$":
57 "^displayport-controller@[0-9a-f]+$":
65 "^dsi@[0-9a-f]+$":
75 "^phy@[0-9a-f]+$":
101 reg = <0xae00000 0x1000>;
118 iommus = <&apps_smmu 0x800 0x2>;
123 reg = <0x0ae01000 0x8f000>,
124 <0x0aeb0000 0x2008>;
138 interrupts = <0>;
144 #size-cells = <0>;
[all …]
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| H A D | qcom,sm8250-mdss.yaml | 47 "^display-controller@[0-9a-f]+$":
55 "^displayport-controller@[0-9a-f]+$":
65 "^dsi@[0-9a-f]+$":
75 "^phy@[0-9a-f]+$":
99 reg = <0x0ae00000 0x1000>;
118 iommus = <&apps_smmu 0x820 0x402>;
126 reg = <0x0ae01000 0x8f000>,
127 <0x0aeb0000 0x2008>;
143 interrupts = <0>;
147 #size-cells = <0>;
[all …]
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| H A D | qcom,sm8150-mdss.yaml | 48 "^display-controller@[0-9a-f]+$":
56 "^displayport-controller@[0-9a-f]+$":
65 "^dsi@[0-9a-f]+$":
75 "^phy@[0-9a-f]+$":
96 reg = <0x0ae00000 0x1000>;
115 iommus = <&apps_smmu 0x800 0x420>;
123 reg = <0x0ae01000 0x8f000>,
124 <0x0aeb0000 0x2008>;
140 interrupts = <0>;
144 #size-cells = <0>;
[all …]
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| H A D | qcom,sm8450-mdss.yaml | 39 "^display-controller@[0-9a-f]+$":
47 "^displayport-controller@[0-9a-f]+$":
57 "^dsi@[0-9a-f]+$":
67 "^phy@[0-9a-f]+$":
91 reg = <0x0ae00000 0x1000>;
115 iommus = <&apps_smmu 0x2800 0x402>;
123 reg = <0x0ae01000 0x8f000>,
124 <0x0aeb0000 0x2008>;
147 interrupts = <0>;
151 #size-cells = <0>;
[all …]
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| /linux/arch/arm64/boot/dts/qcom/ |
| H A D | monaco.dtsi | 35 #clock-cells = <0>;
41 #clock-cells = <0>;
48 #size-cells = <0>;
50 cpu0: cpu@0 {
53 reg = <0x0 0x0>;
61 qcom,freq-domain = <&cpufreq_hw 0>;
79 reg = <0x0 0x100>;
87 qcom,freq-domain = <&cpufreq_hw 0>;
105 reg = <0x0 0x200>;
131 reg = <0x0 0x300>;
[all …]
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