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Searched +full:0 +full:x08400000 (Results 1 – 8 of 8) sorted by relevance

/linux/drivers/mtd/maps/
H A Dsc520cdp.c23 ** 0x8400000. This is a *terrible* place for it because accessing
25 ** (that's what 0x8400000 binary's ought to be). But this is the highest
29 ** 0x880000 which causes the bottom half to be accessed. This splits the
50 #define WINDOW_ADDR_0 0x08800000
51 #define WINDOW_ADDR_1 0x09000000
52 #define WINDOW_ADDR_2 0x09800000
55 #define WINDOW_ADDR_0_BIOS 0x08400000
56 #define WINDOW_ADDR_1_BIOS 0x08c00000
57 #define WINDOW_ADDR_2_BIOS 0x09400000
61 #define WINDOW_ADDR_0 0x08400000
[all …]
/linux/arch/nios2/boot/dts/
H A D3c120_devboard.dts18 #size-cells = <0>;
20 cpu: cpu@0 {
23 reg = <0x00000000>;
38 altr,reset-addr = <0xc2800000>;
39 altr,fast-tlb-miss-addr = <0xc7fff400>;
40 altr,exception-addr = <0xd0000020>;
46 memory@0 {
48 reg = <0x10000000 0x08000000>,
49 <0x07fff400 0x00000400>;
52 sopc@0 {
[all …]
/linux/arch/arm/boot/dts/qcom/
H A Dqcom-msm8226-samsung-matisse-common.dtsi35 reg = <0x03200000 0x800000>;
88 pinctrl-0 = <&backlight_i2c_default_state>;
94 #size-cells = <0>;
98 reg = <0x2c>;
100 dev-ctrl = /bits/ 8 <0x80>;
101 init-brt = /bits/ 8 <0x3f>;
103 pwms = <&backlight_pwm 0 100000>;
107 rom-addr = /bits/ 8 <0xa0>;
108 rom-val = /bits/ 8 <0x44>;
112 rom-addr = /bits/ 8 <0xa1>;
[all …]
H A Dqcom-apq8026-samsung-milletwifi.dts39 reg = <0x03200000 0x800000>;
92 pinctrl-0 = <&backlight_i2c_default_state>;
98 #size-cells = <0>;
102 reg = <0x2c>;
105 dev-ctrl = /bits/ 8 <0x80>;
106 init-brt = /bits/ 8 <0x3f>;
114 rom-addr = /bits/ 8 <0xa3>;
115 rom-val = /bits/ 8 <0x5e>;
120 * (0, 120deg, 240deg, -, -, -),
124 rom-addr = /bits/ 8 <0xa5>;
[all …]
/linux/arch/riscv/boot/dts/sophgo/
H A Dsg2044.dtsi20 reg = <0x00000000 0x80000000 0x00000010 0x00000000>;
26 #clock-cells = <0>;
37 reg = <0x6c 0x00000000 0x0 0x00001000>,
38 <0x6c 0x00300000 0x0 0x00004000>,
39 <0x48 0x00000000 0x0 0x00001000>,
40 <0x6c 0x000c0000 0x0 0x00001000>;
48 interrupt-map-mask = <0 0 0 7>;
49 interrupt-map = <0 0 0 1 &pcie_intc0 0>,
50 <0 0 0 2 &pcie_intc0 1>,
51 <0 0 0 3 &pcie_intc0 2>,
[all …]
/linux/arch/hexagon/kernel/
H A Dvm_init_segtable.S16 * Start with mapping PA=0 to both VA=0x0 and VA=0xc000000 as 16MB large pages.
46 /* VA 0x00000000 */
59 /* VA 0x40000000 */
68 /* VA 0x80000000 */
74 /*0xa8*/.word X,X,X,X
77 /*0xa9*/.word BKPG_IO(0xa9000000),BKPG_IO(0xa9000000),BKPG_IO(0xa9000000),BKPG_IO(0xa9000000)
79 /*0xa9*/.word X,X,X,X
81 /*0xaa*/.word X,X,X,X
82 /*0xab*/.word X,X,X,X
83 /*0xac*/.word X,X,X,X
[all …]
/linux/drivers/net/wireless/ath/ath9k/
H A Dar9485_initvals.h31 {0x00009e00, 0x037216a0},
32 {0x00009e04, 0x00182020},
33 {0x00009e18, 0x00000000},
34 {0x00009e20, 0x000003a8},
35 {0x00009e2c, 0x00004121},
36 {0x00009e44, 0x02282324},
37 {0x0000a000, 0x00060005},
38 {0x0000a004, 0x00810080},
39 {0x0000a008, 0x00830082},
40 {0x0000a00c, 0x00850084},
[all …]
/linux/drivers/net/ethernet/dec/tulip/
H A Dtulip_core.c67 0000 No alignment 0x00000000 unlimited 0800 8 longwords
71 Warning: many older 486 systems are broken and require setting 0x00A04800
77 static int csr0 = 0x01A00000 | 0xE000;
79 static int csr0 = 0x01A00000 | 0x8000;
85 static int csr0 = 0x01A00000 | 0x9000;
87 static int csr0 = 0x01A00000 | 0x4800;
89 static int csr0 = 0x00200000 | 0x4000;
102 module_param(tulip_debug, int, 0);
103 module_param(max_interrupt_work, int, 0);
104 module_param(rx_copybreak, int, 0);
[all …]