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/linux/arch/arm64/crypto/
H A Dpoly1305-armv8.pl34 $0 =~ m/(.*[\/\\])[^\/\\]+$/; $dir=$1;
44 my ($ctx,$inp,$len,$padbit) = map("x$_",(0..3));
78 mov $s1,#0xfffffffc0fffffff
79 movk $s1,#0x0fff,lsl#48
84 and $r0,$r0,$s1 // &=0ffffffc0fffffff
86 and $r1,$r1,$s1 // &=0ffffffc0ffffffc
145 cmp x17,#0 // is_base2_26?
233 cmp $r0,#0 // is_base2_26?
262 my ($R0,$R1,$S1,$R2,$S2,$R3,$S3,$R4,$S4) = map("v$_.4s",(0..8));
313 and x12,$h0,#0x03ffffff // base 2^64 -> base 2^26
[all …]
/linux/drivers/video/
H A Dsticore.c66 * 0 - Black
79 0, 6, 4, 5,
85 #define c_index(sti, c) ((c) & 0xff)
107 memset(inptr, 0, sizeof(*inptr)); in sti_init_graph()
109 memset(inptr_ext, 0, sizeof(*inptr_ext)); in sti_init_graph()
111 outptr->errno = 0; in sti_init_graph()
116 if (ret >= 0) in sti_init_graph()
122 if (ret < 0) { in sti_init_graph()
127 return 0; in sti_init_graph()
145 memset(inptr, 0, sizeof(*inptr)); in sti_inq_conf()
[all …]
/linux/arch/mips/kernel/
H A Drelocate.c44 return 0; in plat_post_relocation()
51 __asm__("rdhwr %0, $1" : "=r" (res)); in get_synci_step()
63 "synci 0(%0)" in sync_icache()
86 unsigned long target_addr = (*loc_orig) & 0x03ffffff; in apply_r_mips_26_rel()
95 target_addr += (unsigned long)loc_orig & 0xf0000000; in apply_r_mips_26_rel()
100 if ((target_addr & 0xf0000000) != ((unsigned long)loc_new & 0xf0000000)) { in apply_r_mips_26_rel()
105 target_addr -= (unsigned long)loc_new & 0xf0000000; in apply_r_mips_26_rel()
108 *loc_new = (*loc_new & ~0x03ffffff) | (target_addr & 0x03ffffff); in apply_r_mips_26_rel()
110 return 0; in apply_r_mips_26_rel()
118 unsigned long target = (insn & 0xffff) << 16; /* high 16bits of target */ in apply_r_mips_hi16_rel()
[all …]
H A Dmodule.c47 if ((v & 0xf0000000) != (((unsigned long)location + 4) & 0xf0000000)) { in apply_r_mips_26()
53 *location = (*location & ~0x03ffffff) | in apply_r_mips_26()
54 ((base + (v >> 2)) & 0x03ffffff); in apply_r_mips_26()
56 return 0; in apply_r_mips_26()
65 *location = (*location & 0xffff0000) | in apply_r_mips_hi16()
66 ((((long long) v + 0x8000LL) >> 16) & 0xffff); in apply_r_mips_hi16()
67 return 0; in apply_r_mips_hi16()
84 return 0; in apply_r_mips_hi16()
106 *location = (*location & 0xffff0000) | (v & 0xffff); in apply_r_mips_lo16()
107 return 0; in apply_r_mips_lo16()
[all …]
H A Dvpe.c39 #define ARCH_SHF_SMALL 0
152 memset(addr, 0, len); in alloc_progmem()
192 {ARCH_SHF_SMALL | SHF_ALLOC, 0} in layout_sections()
196 for (i = 0; i < hdr->e_shnum; i++) in layout_sections()
197 sechdrs[i].sh_entsize = ~0UL; in layout_sections()
199 for (m = 0; m < ARRAY_SIZE(masks); ++m) { in layout_sections()
200 for (i = 0; i < hdr->e_shnum; ++i) { in layout_sections()
206 if ((s->sh_flags & masks[m][0]) != masks[m][0] in layout_sections()
208 || s->sh_entsize != ~0UL) in layout_sections()
230 return 0; in apply_r_mips_none()
[all …]
H A Dftrace.c40 #define JAL 0x0c000000 /* jump & link: ip --> ra, jump to target */
41 #define ADDR_MASK 0x03ffffff /* op_code|addr : 31...26|25 ....0 */
44 #define INSN_NOP 0x00000000 /* nop */
59 buf = (u32 *)&insn_la_mcount[0]; in ftrace_dyn_arch_init_insns()
85 return 0; in ftrace_modify_code()
106 return 0; in ftrace_modify_code_2()
126 return 0; in ftrace_modify_code_2r()
143 * lui v1, hi_16bit_of_mcount --> b 1f (0x10000005)
152 * lui v1, hi_16bit_of_mcount --> b 1f (0x10000004)
160 #define INSN_B_1F (0x10000000 | MCOUNT_OFFSET_INSNS)
[all …]
/linux/arch/mips/include/asm/mach-ralink/
H A Dmt7621.h12 #define MT7621_PALMBUS_BASE 0x1C000000
13 #define MT7621_PALMBUS_SIZE 0x03FFFFFF
15 #define MT7621_SYSC_BASE IOMEM(0x1E000000)
17 #define SYSC_REG_CHIP_NAME0 0x00
18 #define SYSC_REG_CHIP_NAME1 0x04
19 #define SYSC_REG_CHIP_REV 0x0c
20 #define SYSC_REG_SYSTEM_CONFIG0 0x10
21 #define SYSC_REG_SYSTEM_CONFIG1 0x14
23 #define CHIP_REV_PKG_MASK 0x1
25 #define CHIP_REV_VER_MASK 0xf
[all …]
/linux/arch/sh/include/mach-common/mach/
H A Dsh7785lcr.h11 * 0x00000000 - 0x03ffffff(CS0) | NOR Flash | NOR Flash
12 * 0x04000000 - 0x05ffffff(CS1) | PLD | PLD
13 * 0x06000000 - 0x07ffffff(CS1) | I2C | I2C
14 * 0x08000000 - 0x0bffffff(CS2) | USB | DDR SDRAM
15 * 0x0c000000 - 0x0fffffff(CS3) | SD | DDR SDRAM
16 * 0x10000000 - 0x13ffffff(CS4) | SM107 | SM107
17 * 0x14000000 - 0x17ffffff(CS5) | reserved | USB
18 * 0x18000000 - 0x1bffffff(CS6) | reserved | SD
19 * 0x40000000 - 0x5fffffff | DDR SDRAM | (cannot use)
23 #define NOR_FLASH_ADDR 0x00000000
[all …]
/linux/arch/arm/crypto/
H A Dpoly1305-armv4.pl28 $0 =~ m/(.*[\/\\])[^\/\\]+$/; $dir=$1;
38 ($ctx,$inp,$len,$padbit)=map("r$_",(0..3));
71 cmp $inp,#0
72 str r3,[$ctx,#0] @ zero hash value
83 moveq r0,#0
94 ldrb r4,[$inp,#0]
95 mov r10,#0x0fffffff
97 and r3,r10,#-4 @ 0x0ffffffc
153 str r4,[$ctx,#0]
164 mov r0,#0
[all …]
/linux/arch/openrisc/kernel/
H A Dmodule.c30 for (i = 0; i < sechdrs[relsec].sh_size / sizeof(*rel); i++) { in apply_relocate_add()
54 value &= 0x03ffffff; in apply_relocate_add()
55 value |= *location & 0xfc000000; in apply_relocate_add()
60 value += 0x8000; in apply_relocate_add()
65 value = ((value & 0xf800) << 10) | (value & 0x7ff); in apply_relocate_add()
66 *location = (*location & ~0x3e007ff) | value; in apply_relocate_add()
75 return 0; in apply_relocate_add()
/linux/Documentation/devicetree/bindings/watchdog/
H A Dsnps,dw-wdt.yaml70 default: [0x0001000 0x0002000 0x0004000 0x0008000
71 0x0010000 0x0020000 0x0040000 0x0080000
72 0x0100000 0x0200000 0x0400000 0x0800000
73 0x1000000 0x2000000 0x4000000 0x8000000]
88 reg = <0xffd02000 0x1000>;
89 interrupts = <0 171 4>;
97 reg = <0xffd02000 0x1000>;
98 interrupts = <0 171 4>;
101 snps,watchdog-tops = <0x000000FF 0x000001FF 0x000003FF
102 0x000007FF 0x0000FFFF 0x0001FFFF
[all …]
/linux/arch/mips/include/asm/
H A Dinst.h25 #define I_JTARGET_SFT 0
26 #define MIPSInst_JTARGET(x) (MIPSInst(x) & 0x03ffffff)
29 #define MIPSInst_RS(x) ((MIPSInst(x) & 0x03e00000) >> I_RS_SFT)
32 #define MIPSInst_RT(x) ((MIPSInst(x) & 0x001f0000) >> I_RT_SFT)
34 #define I_IMM_SFT 0
35 #define MIPSInst_SIMM(x) ((int)((short)(MIPSInst(x) & 0xffff)))
36 #define MIPSInst_UIMM(x) (MIPSInst(x) & 0xffff)
39 #define MIPSInst_CACHEOP(x) ((MIPSInst(x) & 0x001c0000) >> I_CACHEOP_SFT)
42 #define MIPSInst_CACHESEL(x) ((MIPSInst(x) & 0x00030000) >> I_CACHESEL_SFT)
45 #define MIPSInst_RD(x) ((MIPSInst(x) & 0x0000f800) >> I_RD_SFT)
[all …]
/linux/arch/arm/boot/dts/gemini/
H A Dgemini.dtsi23 pinctrl-0 = <&pflash_default_pins>;
31 reg = <0x40000000 0x1000>;
39 offset = <0x0c>;
41 mask = <0xC0000000>;
49 pinctrl-0 = <&dram_default_pins>, <&system_default_pins>,
159 reg = <0x41000000 0x1000>;
168 reg = <0x42000000 0x100>;
173 pinctrl-0 = <&uart_default_pins>;
179 reg = <0x43000000 0x1000>;
193 reg = <0x45000000 0x100>;
[all …]
/linux/arch/parisc/kernel/
H A Dperf_images.h27 0x4c00c000, 0x00000000, 0x00060000, 0x00000000,
28 0xe0e0e0e0, 0x004e0004, 0x07ffffff, 0xffc01380,
29 0x0101ffff, 0xfffff104, 0xe000c07f, 0xfffffffc,
30 0x01380010, 0x1fffffff, 0xff000000, 0x00000000,
31 0x00000fff, 0xff00000f, 0xffff0000, 0x0fffff00,
32 0x000fffff, 0x00000000, 0x00000000, 0x00ffffff,
33 0xfffff000, 0x0000000f, 0xffffffff, 0xff000000,
34 0x0000ffff, 0xfffffff0, 0x00000000, 0x0fffffff,
35 0xffff0000, 0x00000000, 0x6fffffff, 0xffffffff,
36 0xfff55fff, 0xffffffff, 0xffffffff, 0xf0000000,
[all …]
/linux/drivers/pcmcia/
H A Dtcic.h33 #define TCIC_BASE 0x240
36 #define TCIC_DATA 0x00
37 #define TCIC_ADDR 0x02
38 #define TCIC_SCTRL 0x06
39 #define TCIC_SSTAT 0x07
40 #define TCIC_MODE 0x08
41 #define TCIC_PWR 0x09
42 #define TCIC_EDC 0x0A
43 #define TCIC_ICSR 0x0C
44 #define TCIC_IENA 0x0D
[all …]
/linux/fs/unicode/
H A Dutf8-norm.c13 while (i >= 0 && um->tables->utf8agetab[i] != 0) { in utf8version_is_supported()
18 return 0; in utf8version_is_supported()
28 * 0x00000000 0x0000007F: 0xxxxxxx
29 * 0x00000000 0x000007FF: 110xxxxx 10xxxxxx
30 * 0x00000000 0x0000FFFF: 1110xxxx 10xxxxxx 10xxxxxx
31 * 0x00000000 0x001FFFFF: 11110xxx 10xxxxxx 10xxxxxx 10xxxxxx
32 * 0x00000000 0x03FFFFFF: 111110xx 10xxxxxx 10xxxxxx 10xxxxxx 10xxxxxx
33 * 0x00000000 0x7FFFFFFF: 1111110x 10xxxxxx 10xxxxxx 10xxxxxx 10xxxxxx 10xxxxxx
40 * 0x00000000 0x0000007F: 0xxxxxxx
41 * 0x00000080 0x000007FF: 110xxxxx 10xxxxxx
[all …]
/linux/drivers/acpi/acpica/
H A Dexdebug.c73 if (!((level > 0) && index == 0)) { in acpi_ex_do_debug_object()
83 timer &= 0x03FFFFFF; in acpi_ex_do_debug_object()
85 acpi_os_printf("ACPI Debug: T=0x%8.8X %*s", timer, in acpi_ex_do_debug_object()
94 if (index > 0) { in acpi_ex_do_debug_object()
139 acpi_os_printf("0x%8.8X\n", in acpi_ex_do_debug_object()
142 acpi_os_printf("0x%8.8X%8.8X\n", in acpi_ex_do_debug_object()
150 acpi_os_printf("[0x%.2X]\n", (u32)source_desc->buffer.length); in acpi_ex_do_debug_object()
154 DB_BYTE_DISPLAY, 0); in acpi_ex_do_debug_object()
164 acpi_os_printf("(Contains 0x%.2X Elements):\n", in acpi_ex_do_debug_object()
169 for (i = 0; i < source_desc->package.count; i++) { in acpi_ex_do_debug_object()
[all …]
/linux/drivers/firewire/
H A Ddevice-attribute-test.c17 0x0404eabf,
18 0x31333934,
19 0xe0646102,
20 0xffffffff,
21 0xffffffff,
22 0x00063287, // root directory.
23 0x03ffffff,
24 0x8100000a,
25 0x17ffffff,
26 0x8100000e,
[all …]
/linux/arch/powerpc/crypto/
H A Dpoly1305-p10le_64.S16 # clamp r &= 0x0FFFFFFC0FFFFFFC 0x0FFFFFFC0FFFFFFF
93 mflr 0
94 std 0, 16(1)
117 SAVE_VRS 20, 0, 9
152 RESTORE_VRS 20, 0, 9
204 ld 0, 16(1)
205 mtlr 0
209 # p[0] = a0*r0 + a1*r4*5 + a2*r3*5 + a3*r2*5 + a4*r1*5;
224 vmulouw 13, 8, 0
272 vmuleuw 13, 8, 0
[all …]
/linux/arch/alpha/include/asm/
H A Dcore_cia.h48 * 00 00 Byte 1110 0x000
49 * 01 00 Byte 1101 0x020
50 * 10 00 Byte 1011 0x040
51 * 11 00 Byte 0111 0x060
53 * 00 01 Word 1100 0x008
54 * 01 01 Word 1001 0x028 <= Not supported in this code.
55 * 10 01 Word 0011 0x048
57 * 00 10 Tribyte 1000 0x010
58 * 01 10 Tribyte 0001 0x030
60 * 10 11 Longword 0000 0x058
[all …]
/linux/arch/arm/boot/dts/ti/omap/
H A Dam335x-nano.dts14 cpu@0 {
21 reg = <0x80000000 0x10000000>; /* 256 MB */
29 gpios = <&gpio1 5 0>;
37 pinctrl-0 = <&misc_pins>;
162 pinctrl-0 = <&uart0_pins>;
168 pinctrl-0 = <&uart1_pins>;
179 pinctrl-0 = <&uart2_pins>;
189 pinctrl-0 = <&uart3_pins>;
200 pinctrl-0 = <&uart4_pins>;
211 pinctrl-0 = <&uart5_pins>;
[all …]
/linux/sound/pci/ctxfi/
H A Dcthw20k1.c47 #define SRCCTL_STATE 0x00000007
48 #define SRCCTL_BM 0x00000008
49 #define SRCCTL_RSR 0x00000030
50 #define SRCCTL_SF 0x000001C0
51 #define SRCCTL_WR 0x00000200
52 #define SRCCTL_PM 0x00000400
53 #define SRCCTL_ROM 0x00001800
54 #define SRCCTL_VO 0x00002000
55 #define SRCCTL_ST 0x00004000
56 #define SRCCTL_IE 0x00008000
[all …]
/linux/arch/sh/boards/mach-kfr2r09/
H A Dsetup.c49 #define DRVCRB 0xA405018C
55 .offset = 0,
73 [0] = {
75 .start = 0x00000000,
76 .end = 0x03ffffff,
91 [0] = {
93 .start = 0x10000000,
94 .end = 0x1001ffff,
111 KEY_1, KEY_2, KEY_3, 0, KEY_UP,
112 KEY_4, KEY_5, KEY_6, 0, KEY_LEFT,
[all …]
/linux/arch/sh/boards/mach-migor/
H A Dsetup.c41 * 0x00000000 64MB 16 NOR Flash (SP29PL256N)
42 * 0x0c000000 64MB 64 SDRAM (2xK4M563233G)
43 * 0x10000000 IRQ0 16 Ethernet (SMC91C111)
44 * 0x14000000 IRQ4 16 USB 2.0 Host Controller (M66596)
45 * 0x18000000 8GB 8 NAND Flash (K9K8G08U0A)
56 [0] = {
58 .start = 0x10000300,
59 .end = 0x1000030f,
63 .start = evt2irq(0x600), /* IRQ0 */
82 0, KEY_UP, KEY_DOWN, KEY_LEFT, KEY_RIGHT, KEY_ENTER,
[all …]
/linux/arch/powerpc/kernel/
H A Dkvm.c29 #define KVM_INST_LWZ 0x80000000
30 #define KVM_INST_STW 0x90000000
31 #define KVM_INST_LD 0xe8000000
32 #define KVM_INST_STD 0xf8000000
33 #define KVM_INST_NOP 0x60000000
34 #define KVM_INST_B 0x48000000
35 #define KVM_INST_B_MASK 0x03ffffff
36 #define KVM_INST_B_MAX 0x01ffffff
37 #define KVM_INST_LI 0x38000000
39 #define KVM_MASK_RT 0x03e00000
[all …]

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