| /linux/drivers/mtd/chips/ |
| H A D | jedec_probe.c | 27 #define AM29DL800BB 0x22CB
28 #define AM29DL800BT 0x224A
30 #define AM29F800BB 0x2258
31 #define AM29F800BT 0x22D6
32 #define AM29LV400BB 0x22BA
33 #define AM29LV400BT 0x22B9
34 #define AM29LV800BB 0x225B
35 #define AM29LV800BT 0x22DA
36 #define AM29LV160DT 0x22C4
37 #define AM29LV160DB 0x2249
[all …]
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| /linux/arch/mips/include/uapi/asm/ |
| H A D | termbits.h | 55 #define VINTR 0 /* Interrupt character [ISIG] */
67 #if 0
81 #define IUCLC 0x0200 /* Map upper case to lower case on input */
82 #define IXON 0x0400 /* Enable start/stop output control */
83 #define IXOFF 0x1000 /* Enable start/stop input control */
84 #define IMAXBEL 0x2000 /* Ring bell when input queue is full */
85 #define IUTF8 0x4000 /* Input is UTF-8 */
88 #define OLCUC 0x00002 /* Map lower case to upper case on output */
89 #define ONLCR 0x00004 /* Map NL to CR-NL on output */
90 #define NLDLY 0x00100
[all …]
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| /linux/arch/parisc/include/uapi/asm/ |
| H A D | termbits.h | 42 #define VINTR 0
61 #define IUCLC 0x0200
62 #define IXON 0x0400
63 #define IXOFF 0x1000
64 #define IMAXBEL 0x4000
65 #define IUTF8 0x8000
68 #define OLCUC 0x00002
69 #define ONLCR 0x00004
70 #define NLDLY 0x00100
71 #define NL0 0x00000
[all …]
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| /linux/drivers/net/wireless/mediatek/mt76/mt7915/ |
| H A D | mmio.c | 21 [INT_SOURCE_CSR] = 0xd7010,
22 [INT_MASK_CSR] = 0xd7014,
23 [INT1_SOURCE_CSR] = 0xd7088,
24 [INT1_MASK_CSR] = 0xd708c,
25 [INT_MCU_CMD_SOURCE] = 0xd51f0,
26 [INT_MCU_CMD_EVENT] = 0x3108,
27 [WFDMA0_ADDR] = 0xd4000,
28 [WFDMA0_PCIE1_ADDR] = 0xd8000,
29 [WFDMA_EXT_CSR_ADDR] = 0xd7000,
30 [CBTOP1_PHY_END] = 0x77ffffff,
[all …]
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| /linux/include/uapi/asm-generic/ |
| H A D | termbits.h | 42 #define VINTR 0
61 #define IUCLC 0x0200
62 #define IXON 0x0400
63 #define IXOFF 0x1000
64 #define IMAXBEL 0x2000
65 #define IUTF8 0x4000
68 #define OLCUC 0x00002
69 #define ONLCR 0x00004
70 #define NLDLY 0x00100
71 #define NL0 0x00000
[all …]
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| /linux/tools/arch/alpha/include/uapi/asm/ |
| H A D | mman.h | 13 #define MADV_NORMAL 0
19 #define MAP_ANONYMOUS 0x10
20 #define MAP_DENYWRITE 0x02000
21 #define MAP_EXECUTABLE 0x04000
22 #define MAP_FILE 0
23 #define MAP_FIXED 0x100
24 #define MAP_GROWSDOWN 0x01000
25 #define MAP_HUGETLB 0x100000
26 #define MAP_LOCKED 0x08000
27 #define MAP_NONBLOCK 0x40000
[all …]
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| /linux/arch/alpha/include/asm/ |
| H A D | setup.h | 12 #define BOOT_PCB 0x20000000
13 #define BOOT_ADDR 0x20000000
18 #define KERNEL_START_PHYS 0x300000 /* Old bootloaders hardcoded this. */
20 #define KERNEL_START_PHYS 0x1000000 /* required: Wildfire/Titan/Marvel */
25 #define INIT_STACK (PAGE_OFFSET+KERNEL_START_PHYS+0x02000)
26 #define EMPTY_PGT (PAGE_OFFSET+KERNEL_START_PHYS+0x04000)
27 #define EMPTY_PGE (PAGE_OFFSET+KERNEL_START_PHYS+0x08000)
28 #define ZERO_PGE (PAGE_OFFSET+KERNEL_START_PHYS+0x0A000)
30 #define START_ADDR (PAGE_OFFSET+KERNEL_START_PHYS+0x10000)
39 #define COMMAND_LINE ((char *)(absolute_pointer(PARAM + 0x0000)))
[all …]
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| /linux/drivers/net/ethernet/intel/ixgbevf/ |
| H A D | regs.h | 7 #define IXGBE_VFCTRL 0x00000
8 #define IXGBE_VFSTATUS 0x00008
9 #define IXGBE_VFLINKS 0x00010
10 #define IXGBE_VFFRTIMER 0x00048
11 #define IXGBE_VFRXMEMWRAP 0x03190
12 #define IXGBE_VTEICR 0x00100
13 #define IXGBE_VTEICS 0x00104
14 #define IXGBE_VTEIMS 0x00108
15 #define IXGBE_VTEIMC 0x0010C
16 #define IXGBE_VTEIAC 0x00110
[all …]
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| /linux/arch/powerpc/include/uapi/asm/ |
| H A D | termbits.h | 48 #define VINTR 0
67 #define IXON 0x0200
68 #define IXOFF 0x0400
69 #define IUCLC 0x1000
70 #define IMAXBEL 0x2000
71 #define IUTF8 0x4000
74 #define ONLCR 0x00002
75 #define OLCUC 0x00004
76 #define NLDLY 0x00300
77 #define NL0 0x00000
[all …]
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| /linux/arch/arm/mach-imx/ |
| H A D | mx2x.h | 16 #define MX2x_AIPI_BASE_ADDR 0x10000000
18 #define MX2x_DMA_BASE_ADDR (MX2x_AIPI_BASE_ADDR + 0x01000)
19 #define MX2x_WDOG_BASE_ADDR (MX2x_AIPI_BASE_ADDR + 0x02000)
20 #define MX2x_GPT1_BASE_ADDR (MX2x_AIPI_BASE_ADDR + 0x03000)
21 #define MX2x_GPT2_BASE_ADDR (MX2x_AIPI_BASE_ADDR + 0x04000)
22 #define MX2x_GPT3_BASE_ADDR (MX2x_AIPI_BASE_ADDR + 0x05000)
23 #define MX2x_PWM_BASE_ADDR (MX2x_AIPI_BASE_ADDR + 0x06000)
24 #define MX2x_RTC_BASE_ADDR (MX2x_AIPI_BASE_ADDR + 0x07000)
25 #define MX2x_KPP_BASE_ADDR (MX2x_AIPI_BASE_ADDR + 0x08000)
26 #define MX2x_OWIRE_BASE_ADDR (MX2x_AIPI_BASE_ADDR + 0x09000)
[all …]
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| /linux/arch/alpha/include/uapi/asm/ |
| H A D | termbits.h | 54 #define VEOF 0
73 #define IXON 0x0200
74 #define IXOFF 0x0400
75 #define IUCLC 0x1000
76 #define IMAXBEL 0x2000
77 #define IUTF8 0x4000
80 #define ONLCR 0x00002
81 #define OLCUC 0x00004
82 #define NLDLY 0x00300
83 #define NL0 0x00000
[all …]
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| /linux/drivers/pci/controller/ |
| H A D | pcie-rcar.h | 12 #define PCIECAR 0x000010
13 #define PCIECCTLR 0x000018
15 #define TYPE0 (0 << 8)
17 #define PCIECDR 0x000020
18 #define PCIEMSR 0x000028
19 #define PCIEINTXR 0x000400
21 #define PCIEPHYSR 0x0007f0
22 #define PHYRDY BIT(0)
23 #define PCIEMSITXR 0x000840
26 #define PCIETCTLR 0x02000
[all …]
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| /linux/arch/mips/include/asm/sgi/ |
| H A D | hpc3.h | 22 #define HPCDMA_EOX 0x80000000 /* last desc in chain for tx */
23 #define HPCDMA_EOR 0x80000000 /* last desc in chain for rx */
24 #define HPCDMA_EOXP 0x40000000 /* end of packet for tx */
25 #define HPCDMA_EORP 0x40000000 /* end of packet for rx */
26 #define HPCDMA_XIE 0x20000000 /* irq generated when at end of this desc */
27 #define HPCDMA_XIU 0x01000000 /* Tx buffer in use by CPU. */
28 #define HPCDMA_EIPC 0x00ff0000 /* SEEQ ethernet special xternal bytecount */
29 #define HPCDMA_ETXD 0x00008000 /* set to one by HPC when packet tx'd */
30 #define HPCDMA_OWN 0x00004000 /* Denotes ring buffer ownership on rx */
31 #define HPCDMA_BCNT 0x00003fff /* size in bytes of this dma buffer */
[all …]
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| /linux/drivers/net/wireless/ti/wl18xx/ |
| H A D | reg.h | 11 #define WL18XX_REGISTERS_BASE 0x00800000
12 #define WL18XX_CODE_BASE 0x00000000
13 #define WL18XX_DATA_BASE 0x00400000
14 #define WL18XX_DOUBLE_BUFFER_BASE 0x00600000
15 #define WL18XX_MCU_KEY_SEARCH_BASE 0x00700000
16 #define WL18XX_PHY_BASE 0x00900000
17 #define WL18XX_TOP_OCP_BASE 0x00A00000
18 #define WL18XX_PACKET_RAM_BASE 0x00B00000
19 #define WL18XX_HOST_BASE 0x00C00000
21 #define WL18XX_REGISTERS_DOWN_SIZE 0x0000B000
[all …]
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| /linux/drivers/video/fbdev/i810/ |
| H A D | i810_regs.h | 33 #define FENCE 0x02000
34 #define PGTBL_CTL 0x02020
35 #define PGTBL_ER 0x02024
36 #define LRING 0x02030
37 #define IRING 0x02040
38 #define HWS_PGA 0x02080
39 #define IPEIR 0x02088
40 #define IPEHR 0x0208C
41 #define INSTDONE 0x02090
42 #define NOPID 0x02094
[all …]
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| /linux/sound/soc/mediatek/mt8365/ |
| H A D | mt8365-afe-common.h | 121 MT8365_AFE_APLL1 = 0,
127 MT8365_AFE_1ST_I2S = 0,
133 MT8365_AFE_I2S_SEPARATE_CLOCK = 0,
138 MT8365_AFE_TDM_OUT_I2S = 0,
144 AFE_TDM_CH_START_O28_O29 = 0,
152 MT8365_PCM_FORMAT_I2S = 0,
159 MT8365_FS_8K = 0,
177 FS_8000HZ = 0, /* 0000b */
205 MT8365_AFE_IRQ_DIR_MCU = 0,
212 MT8365_I2S0_MCK = 0,
[all …]
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| /linux/drivers/net/wireless/mediatek/mt76/mt7925/ |
| H A D | pci.c | 15 { PCI_DEVICE(PCI_VENDOR_ID_MEDIATEK, 0x7925),
17 { PCI_DEVICE(PCI_VENDOR_ID_MEDIATEK, 0x0717),
19 { PCI_DEVICE(PCI_VENDOR_ID_MEDIATEK, 0x7927),
21 { PCI_DEVICE(PCI_VENDOR_ID_MEDIATEK, 0x6639),
23 { PCI_DEVICE(PCI_VENDOR_ID_MEDIATEK, 0x0738),
25 { PCI_DEVICE(PCI_VENDOR_ID_MEDIATEK, 0x7928),
27 { PCI_DEVICE(PCI_VENDOR_ID_MEDIATEK, 0x7935),
73 dev->backup_l1 = 0; in mt7925_reg_remap_restore()
78 dev->backup_l2 = 0; in mt7925_reg_remap_restore()
119 { 0x830c0000, 0x000000, 0x0001000 }, /* WF_MCU_BUS_CR_REMAP */ in __mt7925_reg_addr()
[all …]
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| /linux/arch/arm/kernel/ |
| H A D | atags_compat.c | 42 unsigned long page_size; /* 0 */
104 if (params->u1.s.nr_pages != 0x02000 && in build_tag_list()
105 params->u1.s.nr_pages != 0x04000 && in build_tag_list()
106 params->u1.s.nr_pages != 0x08000 && in build_tag_list()
107 params->u1.s.nr_pages != 0x10000) { in build_tag_list()
110 params->u1.s.nr_pages = 0x1000; /* 16MB */ in build_tag_list()
111 params->u1.s.ramdisk_size = 0; in build_tag_list()
113 params->u1.s.initrd_start = 0; in build_tag_list()
114 params->u1.s.initrd_size = 0; in build_tag_list()
115 params->u1.s.rd_start = 0; in build_tag_list()
[all …]
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| /linux/drivers/usb/gadget/udc/ |
| H A D | goku_udc.h | 12 * PCI BAR 0 points to these registers.
16 u32 int_status; /* 0x000 */
18 #define INT_SUSPEND 0x00001 /* or resume */
19 #define INT_USBRESET 0x00002
20 #define INT_ENDPOINT0 0x00004
21 #define INT_SETUP 0x00008
22 #define INT_STATUS 0x00010
23 #define INT_STATUSNAK 0x00020
24 #define INT_EPxDATASET(n) (0x00020 << (n)) /* 0 < n < 4 */
25 # define INT_EP1DATASET 0x00040
[all …]
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| /linux/drivers/net/wireless/mediatek/mt76/mt7921/ |
| H A D | pci.c | 18 { PCI_DEVICE(PCI_VENDOR_ID_MEDIATEK, 0x7961),
20 { PCI_DEVICE(PCI_VENDOR_ID_MEDIATEK, 0x7922),
22 { PCI_DEVICE(PCI_VENDOR_ID_ITTIM, 0x7922),
24 { PCI_DEVICE(PCI_VENDOR_ID_MEDIATEK, 0x0608),
26 { PCI_DEVICE(PCI_VENDOR_ID_MEDIATEK, 0x0616),
28 { PCI_DEVICE(PCI_VENDOR_ID_MEDIATEK, 0x7920),
30 { PCI_DEVICE(PCI_VENDOR_ID_MEDIATEK, 0x7902),
73 { 0x820d0000, 0x30000, 0x10000 }, /* WF_LMAC_TOP (WF_WTBLON) */ in __mt7921_reg_addr()
74 { 0x820ed000, 0x24800, 0x00800 }, /* WF_LMAC_TOP BN0 (WF_MIB) */ in __mt7921_reg_addr()
75 { 0x820e4000, 0x21000, 0x00400 }, /* WF_LMAC_TOP BN0 (WF_TMAC) */ in __mt7921_reg_addr()
[all …]
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| /linux/drivers/scsi/aic7xxx/ |
| H A D | aic79xx.h | 60 #define FALSE 0
63 #define ALL_CHANNELS '\0'
64 #define ALL_TARGETS_MASK 0xFFFF
65 #define INITIATOR_WILDCARD (~0)
66 #define SCB_LIST_NULL 0xFF00
68 #define QOUTFIFO_ENTRY_VALID 0x80
69 #define SCBID_IS_NULL(scbid) (((scbid) & 0xFF00 ) == SCB_LIST_NULL)
76 #define SCB_IS_SCSIBUS_B(ahd, scb) (0)
88 (0x01 << (SCB_GET_TARGET_OFFSET(ahd, scb)))
91 ((ahd_debug & AHD_SHOW_MASKED_ERRORS) == 0 \
[all …]
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| /linux/drivers/scsi/ibmvscsi_tgt/ |
| H A D | ibmvscsi_tgt.h | 27 #define MSG_HI 0
36 #define SRP_VIOLATION 0x102 /* general error code */
55 #define LOCAL 0
70 #define ADAPT_SUCCESS 0L
139 SCSI_CDB = 0x01,
140 TASK_MANAGEMENT = 0x02,
141 /* MAD or addressed to port 0 */
142 ADAPTER_MAD = 0x04,
143 UNSET_TYPE = 0x08,
166 #define CMD_FAST_FAIL BIT(0)
[all …]
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| /linux/drivers/hwtracing/intel_th/ |
| H A D | intel_th.h | 16 INTEL_TH_SOURCE = 0,
61 #define INTEL_TH_CAP(_th, _cap) ((_th)->drvdata ? (_th)->drvdata->_cap : 0)
107 for (i = 0; i < thdev->num_resources; i++) in intel_th_device_get_resource()
118 GTH_NONE = 0,
135 (thdev->output.port >= 0 || in intel_th_output_assigned()
245 TH_MMIO_CONFIG = 0,
314 REG_GTH_OFFSET = 0x0000,
315 REG_GTH_LENGTH = 0x2000,
318 REG_TSCU_OFFSET = 0x2000,
319 REG_TSCU_LENGTH = 0x1000,
[all …]
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| /linux/drivers/clk/ |
| H A D | clk-axm5516.c | 56 postdiv = ((control >> 0) & 0xf) + 1; in axxia_pllclk_recalc()
57 fbdiv = ((control >> 4) & 0xfff) + 3; in axxia_pllclk_recalc()
58 refdiv = ((control >> 16) & 0x1f) + 1; in axxia_pllclk_recalc()
151 .reg = 0x01800,
163 .reg = 0x02000,
175 .reg = 0x02800,
187 .reg = 0x03000,
199 .reg = 0x03800,
215 .reg = 0x10008,
216 .shift = 0,
[all …]
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| /linux/drivers/net/wireless/realtek/rtw89/ |
| H A D | rtw8852a_rfk_table.c | 8 RTW89_DECL_RFK_WM(0x12a8, 0x00000001, 0x00000001),
9 RTW89_DECL_RFK_WM(0x12a8, 0x0000000e, 0x00000002),
10 RTW89_DECL_RFK_WM(0x32a8, 0x00000001, 0x00000001),
11 RTW89_DECL_RFK_WM(0x32a8, 0x0000000e, 0x00000002),
12 RTW89_DECL_RFK_WM(0x12bc, 0x000000f0, 0x00000005),
13 RTW89_DECL_RFK_WM(0x12bc, 0x00000f00, 0x00000005),
14 RTW89_DECL_RFK_WM(0x12bc, 0x000f0000, 0x00000005),
15 RTW89_DECL_RFK_WM(0x12bc, 0x0000f000, 0x00000005),
16 RTW89_DECL_RFK_WM(0x120c, 0x000000ff, 0x00000033),
17 RTW89_DECL_RFK_WM(0x12c0, 0x0ff00000, 0x00000033),
[all …]
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