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/linux/arch/arm/boot/dts/marvell/
H A Dkirkwood-ts219.dtsi8 reg = <0x00000000 0x20000000>;
23 reg = <0x30>;
34 reg = <0x12100 0x100>;
40 m25p128@0 {
44 reg = <0>;
46 mode = <0>;
48 partition@0 {
49 reg = <0x00000000 0x00080000>;
54 reg = <0x00200000 0x00200000>;
59 reg = <0x00400000 0x00900000>;
[all …]
/linux/Documentation/devicetree/bindings/pinctrl/
H A Dqcom,sm6125-tlmm.yaml60 - pattern: "^gpio[0-9]|[1-9][0-9]|1[0-2][0-9]|13[0-2]$"
107 reg = <0x00500000 0x400000>,
108 <0x00900000 0x400000>,
109 <0x00d00000 0x400000>;
113 gpio-ranges = <&tlmm 0 0 134>;
/linux/arch/arm/nwfpe/
H A Dfpopcode.h18 |c o n d|1 1 0 P|U|u|W|L| Rn |v| Fd |0|0|0|1| o f f s e t | CPDT
19 |c o n d|1 1 0 P|U|w|W|L| Rn |x| Fd |0|0|1|0| o f f s e t | CPDT (copro 2)
21 |c o n d|1 1 1 0|a|b|c|d|e| Fn |j| Fd |0|0|0|1|f|g|h|0|i| Fm | CPDO
22 |c o n d|1 1 1 0|a|b|c|L|e| Fn | Rd |0|0|0|1|f|g|h|1|i| Fm | CPRT
23 |c o n d|1 1 1 0|a|b|c|1|e| Fn |1|1|1|1|0|0|0|1|f|g|h|1|i| Fm | comparisons
45 P pre/post index bit: 0 = postindex, 1 = preindex
46 U up/down bit: 0 = stack grows down, 1 = stack grows up
48 L load/store bit: 0 = store, 1 = load
60 j dyadic/monadic bit: 0 = dyadic, 1 = monadic
69 | Single | 0 | 0 | x | 1 words |
[all …]
/linux/sound/soc/codecs/
H A Dcs35l36.h16 #define CS35L36_FIRSTREG 0x00000000
17 #define CS35L36_LASTREG 0x00E037FC
18 #define CS35L36_SW_RESET 0x00000000
19 #define CS35L36_SW_REV 0x00000004
20 #define CS35L36_HW_REV 0x00000008
21 #define CS35L36_TESTKEY_CTRL 0x00000020
22 #define CS35L36_USERKEY_CTL 0x00000024
23 #define CS35L36_OTP_MEM30 0x00000478
24 #define CS35L36_OTP_CTRL1 0x00000500
25 #define CS35L36_OTP_CTRL2 0x00000504
[all …]
/linux/drivers/media/platform/chips-media/wave5/
H A Dwave5-vpuerror.h18 #define WAVE5_SYSERR_QUEUEING_FAIL 0x00000001
19 #define WAVE5_SYSERR_ACCESS_VIOLATION_HW 0x00000040
20 #define WAVE5_SYSERR_BUS_ERROR 0x00000200
21 #define WAVE5_SYSERR_DOUBLE_FAULT 0x00000400
22 #define WAVE5_SYSERR_RESULT_NOT_READY 0x00000800
23 #define WAVE5_SYSERR_VPU_STILL_RUNNING 0x00001000
24 #define WAVE5_SYSERR_UNKNOWN_CMD 0x00002000
25 #define WAVE5_SYSERR_UNKNOWN_CODEC_STD 0x00004000
26 #define WAVE5_SYSERR_UNKNOWN_QUERY_OPTION 0x00008000
27 #define WAVE5_SYSERR_VLC_BUF_FULL 0x00010000
[all …]
/linux/arch/powerpc/boot/dts/
H A Dbluestone.dts16 dcr-parent = <&{/cpus/cpu@0}>;
26 #size-cells = <0>;
28 cpu@0 {
31 reg = <0x00000000>;
32 clock-frequency = <0>; /* Filled in by U-Boot */
33 timebase-frequency = <0>; /* Filled in by U-Boot */
46 reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by U-Boot */
52 cell-index = <0>;
53 dcr-reg = <0x0c0 0x009>;
54 #address-cells = <0>;
[all …]
/linux/arch/arm/net/
H A Dbpf_jit_32.h12 #define ARM_R0 0
29 #define ARM_COND_EQ 0x0 /* == */
30 #define ARM_COND_NE 0x1 /* != */
31 #define ARM_COND_CS 0x2 /* unsigned >= */
33 #define ARM_COND_CC 0x3 /* unsigned < */
35 #define ARM_COND_MI 0x4 /* < 0 */
36 #define ARM_COND_PL 0x5 /* >= 0 */
37 #define ARM_COND_VS 0x6 /* Signed Overflow */
38 #define ARM_COND_VC 0x7 /* No Signed Overflow */
39 #define ARM_COND_HI 0x8 /* unsigned > */
[all …]
/linux/drivers/scsi/
H A D3w-xxxx.h62 [0x000] = "INFO: AEN queue empty",
63 [0x001] = "INFO: Soft reset occurred",
64 [0x002] = "ERROR: Unit degraded: Unit #",
65 [0x003] = "ERROR: Controller error",
66 [0x004] = "ERROR: Rebuild failed: Unit #",
67 [0x005] = "INFO: Rebuild complete: Unit #",
68 [0x006] = "ERROR: Incomplete unit detected: Unit #",
69 [0x007] = "INFO: Initialization complete: Unit #",
70 [0x008] = "WARNING: Unclean shutdown detected: Unit #",
71 [0x009] = "WARNING: ATA port timeout: Port #",
[all …]
/linux/include/linux/
H A Dpe.h14 * Starting from version v3.0, the major version field should be interpreted as
16 * - 0x1: initrd loading from the LINUX_EFI_INITRD_MEDIA_GUID device path,
17 * - 0x2: initrd loading using the initrd= command line option, where the file
21 * The recommended way of loading and starting v1.0 or later kernels is to use
25 * Versions older than v1.0 may support initrd loading via the image load
29 * The minor version field must remain 0x0.
32 #define LINUX_EFISTUB_MAJOR_VERSION 0x3
33 #define LINUX_EFISTUB_MINOR_VERSION 0x0
36 * LINUX_PE_MAGIC appears at offset 0x38 into the MS-DOS header of EFI bootable
40 #define LINUX_PE_MAGIC 0x818223cd
[all …]
/linux/arch/arm/mach-sa1100/
H A Djornada720.c43 #define TUCR_VAL 0x20000400
46 #define SA1111REGSTART 0x40000000
47 #define SA1111REGLEN 0x00002000
48 #define EPSONREGSTART 0x48000000
49 #define EPSONREGLEN 0x00100000
50 #define EPSONFBSTART 0x48200000
56 {0x0001,0x00}, // Miscellaneous Register
57 {0x01FC,0x00}, // Display Mode Register
58 {0x0004,0x00}, // General IO Pins Configuration Register 0
59 {0x0005,0x00}, // General IO Pins Configuration Register 1
[all …]
/linux/Documentation/devicetree/bindings/pci/
H A Dqcom,pcie.yaml588 reg = <0x1b500000 0x1000>,
589 <0x1b502000 0x80>,
590 <0x1b600000 0x100>,
591 <0x0ff00000 0x100000>;
594 linux,pci-domain = <0>;
595 bus-range = <0x00 0xff>;
599 ranges = <0x81000000 0 0 0x0fe00000 0 0x00100000>,
600 <0x82000000 0 0 0x08000000 0 0x07e00000>;
604 interrupt-map-mask = <0 0 0 0x7>;
605 interrupt-map = <0 0 0 1 &intc 0 36 IRQ_TYPE_LEVEL_HIGH>,
[all …]
/linux/arch/arm/boot/dts/samsung/
H A Ds5pv210.dtsi46 #size-cells = <0>;
48 cpu@0 {
51 reg = <0>;
55 xxti: oscillator-0 {
57 clock-frequency = <0>;
59 #clock-cells = <0>;
64 clock-frequency = <0>;
66 #clock-cells = <0>;
77 reg = <0xb0600000 0x2000>,
78 <0xb0000000 0x20000>,
[all …]
/linux/drivers/bluetooth/
H A Dhci_aml.c23 #define AML_BDADDR_DEFAULT (&(bdaddr_t) {{ 0x00, 0xff, 0x00, 0x22, 0x2d, 0xae }})
29 #define AML_TCI_CMD_READ 0xFEF0
30 #define AML_TCI_CMD_WRITE 0xFEF1
31 #define AML_TCI_CMD_UPDATE_BAUDRATE 0xFEF2
32 #define AML_TCI_CMD_HARDWARE_RESET 0xFEF2
33 #define AML_TCI_CMD_DOWNLOAD_BT_FW 0xFEF3
36 #define AML_BT_HCI_VENDOR_CMD 0xFC1A
39 #define AML_OP_UART_MODE 0x00A30128
40 #define AML_OP_EVT_ENABLE 0x00A70014
41 #define AML_OP_MEM_HARD_TRANS_EN 0x00A7000C
[all …]
/linux/arch/arm/boot/dts/qcom/
H A Dqcom-ipq4019.dtsi21 #address-cells = <0x1>;
22 #size-cells = <0x1>;
26 reg = <0x87e00000 0x080000>;
31 reg = <0x87e80000 0x180000>;
45 #size-cells = <0>;
46 cpu@0 {
53 reg = <0x0>;
55 clock-frequency = <0>;
67 reg = <0x1>;
69 clock-frequency = <0>;
[all …]
/linux/crypto/
H A Daes_generic.c67 0xa56363c6, 0x847c7cf8, 0x997777ee, 0x8d7b7bf6,
68 0x0df2f2ff, 0xbd6b6bd6, 0xb16f6fde, 0x54c5c591,
69 0x50303060, 0x03010102, 0xa96767ce, 0x7d2b2b56,
70 0x19fefee7, 0x62d7d7b5, 0xe6abab4d, 0x9a7676ec,
71 0x45caca8f, 0x9d82821f, 0x40c9c989, 0x877d7dfa,
72 0x15fafaef, 0xeb5959b2, 0xc947478e, 0x0bf0f0fb,
73 0xecadad41, 0x67d4d4b3, 0xfda2a25f, 0xeaafaf45,
74 0xbf9c9c23, 0xf7a4a453, 0x967272e4, 0x5bc0c09b,
75 0xc2b7b775, 0x1cfdfde1, 0xae93933d, 0x6a26264c,
76 0x5a36366c, 0x413f3f7e, 0x02f7f7f5, 0x4fcccc83,
[all …]
/linux/arch/arm64/boot/dts/qcom/
H A Dsm6125.dtsi24 #clock-cells = <0>;
30 #clock-cells = <0>;
38 #size-cells = <0>;
40 CPU0: cpu@0 {
43 reg = <0x0 0x0>;
57 reg = <0x0 0x1>;
66 reg = <0x0 0x2>;
75 reg = <0x0 0x3>;
84 reg = <0x0 0x100>;
98 reg = <0x0 0x101>;
[all …]
H A Dsm6115.dtsi30 #clock-cells = <0>;
35 #clock-cells = <0>;
41 #size-cells = <0>;
43 CPU0: cpu@0 {
46 reg = <0x0 0x0>;
47 clocks = <&cpufreq_hw 0>;
52 qcom,freq-domain = <&cpufreq_hw 0>;
65 reg = <0x0 0x1>;
66 clocks = <&cpufreq_hw 0>;
71 qcom,freq-domain = <&cpufreq_hw 0>;
[all …]
H A Dmsm8996.dtsi29 #clock-cells = <0>;
36 #clock-cells = <0>;
44 #size-cells = <0>;
46 CPU0: cpu@0 {
49 reg = <0x0 0x0>;
53 clocks = <&kryocc 0>;
68 reg = <0x0 0x1>;
72 clocks = <&kryocc 0>;
82 reg = <0x0 0x100>;
101 reg = <0x0 0x101>;
[all …]
/linux/sound/pci/emu10k1/
H A Demu10k1_main.c53 DCYSUSV, 0, in snd_emu10k1_voice_init()
56 PTRX, 0, in snd_emu10k1_voice_init()
57 CPF, 0, in snd_emu10k1_voice_init()
58 CCR, 0, in snd_emu10k1_voice_init()
60 PSST, 0, in snd_emu10k1_voice_init()
61 DSL, 0x10, in snd_emu10k1_voice_init()
62 CCCA, 0, in snd_emu10k1_voice_init()
63 Z1, 0, in snd_emu10k1_voice_init()
64 Z2, 0, in snd_emu10k1_voice_init()
65 FXRT, 0x32100000, in snd_emu10k1_voice_init()
[all …]
/linux/drivers/pinctrl/qcom/
H A Dpinctrl-sc8180x.c35 { 0x00d00000, 0x00300000, },
36 { 0x00500000, 0x00700000, },
37 { 0x00100000, 0x00300000, },
40 #define REG_SIZE 0x1000
60 .io_reg = REG_SIZE * id + 0x4 + offset, \
61 .intr_cfg_reg = REG_SIZE * id + 0x8 + offset, \
62 .intr_status_reg = REG_SIZE * id + 0xc + offset,\
63 .intr_target_reg = REG_SIZE * id + 0x8 + offset,\
66 .pull_bit = 0, \
69 .in_bit = 0, \
[all …]