| /freebsd/sys/contrib/device-tree/src/powerpc/ |
| H A D | o2i.dts | 16 flash@0,0 {
19 reg = <0x00060000 0x00260000>;
25 reg = <0x002c0000 0x00d40000>;
|
| H A D | o2mnt.dts | 16 flash@0,0 {
19 reg = <0x00060000 0x00260000>;
25 reg = <0x002c0000 0x00d40000>;
|
| H A D | o2d.dts | 15 memory@0 {
16 reg = <0x00000000 0x08000000>; // 128MB
20 ranges = <0 0 0xfc000000 0x02000000
21 3 0 0xe3000000 0x00100000>;
23 flash@0,0 {
25 reg = <0 0 0x02000000>;
33 reg = <0x00060000 0x00260000>;
39 reg = <0x002c0000 0x01d40000>;
|
| H A D | o2dnt2.dts | 15 memory@0 {
16 reg = <0x00000000 0x08000000>; // 128MB
20 ranges = <0 0 0xfc000000 0x02000000
21 3 0 0xe3000000 0x00100000>;
23 flash@0,0 {
25 reg = <0 0 0x02000000>;
33 reg = <0x00060000 0x00260000>;
40 reg = <0x002c0000 0x01d40000>;
|
| H A D | o3dnt.dts | 15 memory@0 {
16 reg = <0x00000000 0x04000000>; // 64MB
20 ranges = <0 0 0xfc000000 0x01000000
21 3 0 0xe3000000 0x00100000>;
23 flash@0,0 {
25 reg = <0 0 0x01000000>;
33 reg = <0x00060000 0x00260000>;
40 reg = <0x002c0000 0x00d40000>;
|
| /freebsd/sys/contrib/device-tree/Bindings/mtd/ |
| H A D | ti,gpmc-onenand.yaml | 19 pattern: "^onenand@[0-9],[0,9]$"
38 "@[0-9a-f]+$":
56 reg = <0x6e000000 0x02d0>;
65 ranges = <0 0 0x01000000 0x01000000>, /* 16 MB for OneNAND */
66 <1 0 0x02000000 0x01000000>; /* 16 MB for smc91c96 */
68 onenand@0,0 {
70 reg = <0 0 0x20000>; /* CS0, offset 0, IO size 128K */
74 partition@0 {
76 reg = <0x00000000 0x00100000>;
81 reg = <0x00100000 0x002c0000>;
|
| /freebsd/sys/contrib/device-tree/src/arm64/broadcom/northstar2/ |
| H A D | ns2-xmc.dts | 47 bootargs = "earlycon=uart8250,mmio32,0x66130000";
52 reg = <0x00000000 0x80000000 0x00000001 0x00000000>;
71 reg = <0x10>;
77 nandcs@0 {
79 reg = <0>;
88 partition@0 {
90 reg = <0x00000000 0x00280000>; /* 2.5MB */
96 reg = <0x00280000 0x00040000>; /* 0.25MB */
102 reg = <0x002c0000 0x00040000>; /* 0.25MB */
108 reg = <0x00300000 0x03d00000>; /* 61MB */
[all …]
|
| /freebsd/sys/contrib/device-tree/src/arm/ti/omap/ |
| H A D | omap3-n950-n9.dtsi | 12 cpu@0 {
19 reg = <0x80000000 0x40000000>; /* 1 GB */
47 pinctrl-0 = <&debug_leds>;
54 #clock-cells = <0>;
62 OMAP3_CORE1_IOPAD(0x21da, PIN_INPUT | MUX_MODE4) /* mcspi2_somi.gpio_180 -> LIS302 INT1 */
63 OMAP3_CORE1_IOPAD(0x21dc, PIN_INPUT | MUX_MODE4) /* mcspi2_cs0.gpio_181 -> LIS302 INT2 */
69 OMAP3_CORE1_IOPAD(0x2108, PIN_OUTPUT | MUX_MODE4) /* dss_data22.gpio_92 */
75 OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk */
76 OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd */
77 OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat0 */
[all …]
|
| H A D | am43x-epos-evm.dts | 62 pinctrl-0 = <&matrix_keypad_default>;
76 linux,keymap = <0x00000201 /* P1 */
77 0x01000204 /* P4 */
78 0x02000207 /* P7 */
79 0x0300020a /* NUMERIC_STAR */
80 0x00010202 /* P2 */
81 0x01010205 /* P5 */
82 0x02010208 /* P8 */
83 0x03010200 /* P0 */
84 0x00020203 /* P3 */
[all …]
|
| H A D | am437x-gp-evm.dts | 57 pwms = <&ecap0 0 50000 PWM_POLARITY_INVERTED>;
58 brightness-levels = <0 51 53 56 62 75 101 152 255>;
68 pinctrl-0 = <&matrix_keypad_default>;
80 linux,keymap = <0x00000201 /* P1 */
81 0x00010202 /* P2 */
82 0x01000067 /* UP */
83 0x0101006a /* RIGHT */
84 0x02000069 /* LEFT */
85 0x0201006c>; /* DOWN */
103 #clock-cells = <0>;
[all …]
|
| H A D | omap3-n900.dts | 46 cpu@0 {
58 pinctrl-0 = <&debug_leds>;
64 reg = <0x80000000 0x10000000>; /* 256 MB */
117 gpios = <&gpio6 0 GPIO_ACTIVE_LOW>; /* 160 */
156 io-channels = <&twl_madc 0>, <&twl_madc 4>, <&twl_madc 12>;
164 ti,clock-source = <0x00>; /* timer_sys_ck */
169 pwms = <&pwm9 0 26316 0>; /* 38000 Hz */
181 #clock-cells = <0>;
190 pinctrl-0 = <&camera_pins>;
200 data-lanes = <0>;
[all …]
|
| /freebsd/sys/dev/hifn/ |
| H A D | hifn7751reg.h | 53 #define HIFN_BAR0 PCIR_BAR(0) /* PUC register map */
55 #define HIFN_TRDY_TIMEOUT 0x40
56 #define HIFN_RETRY_TIMEOUT 0x41
62 #define PCI_VENDOR_HIFN 0x13a3 /* Hifn */
63 #define PCI_PRODUCT_HIFN_7751 0x0005 /* 7751 */
64 #define PCI_PRODUCT_HIFN_6500 0x0006 /* 6500 */
65 #define PCI_PRODUCT_HIFN_7811 0x0007 /* 7811 */
66 #define PCI_PRODUCT_HIFN_7951 0x0012 /* 7951 */
67 #define PCI_PRODUCT_HIFN_7955 0x0020 /* 7954/7955 */
68 #define PCI_PRODUCT_HIFN_7956 0x001d /* 7956 */
[all …]
|
| /freebsd/sys/contrib/openzfs/module/icp/asm-x86_64/aes/ |
| H A D | aestab2.h | 50 0x00000001, 0x00000002, 0x00000004, 0x00000008,
51 0x00000010, 0x00000020, 0x00000040, 0x00000080,
52 0x0000001b, 0x00000036
58 0x00000063, 0x0000007c, 0x00000077, 0x0000007b,
59 0x000000f2, 0x0000006b, 0x0000006f, 0x000000c5,
60 0x00000030, 0x00000001, 0x00000067, 0x0000002b,
61 0x000000fe, 0x000000d7, 0x000000ab, 0x00000076,
62 0x000000ca, 0x00000082, 0x000000c9, 0x0000007d,
63 0x000000fa, 0x00000059, 0x00000047, 0x000000f0,
64 0x000000ad, 0x000000d4, 0x000000a2, 0x000000af,
[all …]
|
| /freebsd/sys/dev/qlnx/qlnxe/ |
| H A D | mcp_public.h | 51 #define OFFSIZE_OFFSET_OFFSET 0
52 #define OFFSIZE_OFFSET_MASK 0x0000ffff
55 #define OFFSIZE_SIZE_MASK 0xffff0000
70 u32 speed; /* 0 = autoneg, 1000/10000/20000/25000/40000/50000/100000 */
71 #define ETH_SPEED_AUTONEG 0
72 #define ETH_SPEED_SMARTLINQ 0x8 /* deprecated - use link_modes field instead */
75 #define ETH_PAUSE_NONE 0x0
76 #define ETH_PAUSE_AUTONEG 0x1
77 #define ETH_PAUSE_RX 0x2
78 #define ETH_PAUSE_TX 0x4
[all …]
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/ |
| H A D | LoongArchInstrInfo.td | 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
18 def SDT_CallSeqStart : SDCallSeqStart<[SDTCisVT<0, i32>,
20 def SDT_CallSeqEnd : SDCallSeqEnd<[SDTCisVT<0, i32>,
24 def SDT_LoongArchCall : SDTypeProfile<0, -1, [SDTCisVT<0, GRLenVT>]>;
26 SDTCisSameAs<0, 1>, SDTCisSameAs<0, 2>, SDTCisVT<0, i64>
30 SDTCisInt<0>, SDTCisSameAs<0, 1>, SDTCisSameAs<0, 2>, SDTCisInt<3>,
35 SDTCisInt<0>, SDTCisSameAs<0, 1>, SDTCisInt<2>, SDTCisSameAs<2, 3>
39 def SDT_LoongArchVI : SDTypeProfile<0, 1, [SDTCisVT<0, GRLenVT>]>;
41 def SDT_LoongArchCsrrd : SDTypeProfile<1, 1, [SDTCisInt<0>,
43 def SDT_LoongArchCsrwr : SDTypeProfile<1, 2, [SDTCisInt<0>, SDTCisSameAs<0, 1>,
[all …]
|
| /freebsd/sys/dev/ice/ |
| H A D | ice_hw_autogen.h | 43 #define E830_GLTCLAN_TSYN_REG_RANGE_ENFORCE(_i) (0x000FD000 + ((_i) * 64)) /* _i=0...7 */ /* Reset Source: CORER */
45 #define E830_GLTCLAN_TSYN_REG_RANGE_ENFORCE_START_S 0
46 #define E830_GLTCLAN_TSYN_REG_RANGE_ENFORCE_START_M MAKEMASK(0x3F, 0)
48 #define E830_GLTCLAN_TSYN_REG_RANGE_ENFORCE_END_M MAKEMASK(0x3F, 6)
50 #define E830_GLTCLAN_TSYN_REG_RANGE_ENFORCE_VM_VF_TYPE_M MAKEMASK(0x3, 12)
52 #define E830_GLTCLAN_TSYN_REG_RANGE_ENFORCE_VM_VF_NUM_M MAKEMASK(0x3FF, 14)
54 #define E830_GLTCLAN_TSYN_REG_RANGE_ENFORCE_PF_NUM_M MAKEMASK(0x7, 24)
57 #define GL_HIDA(_i) (0x0008200
[all...] |
| /freebsd/tools/test/iconv/ref/ |
| H A D | UTF-32BE-rev | 1 0x00 = 0x00000000
2 0x01 = 0x01000000
3 0x02 = 0x02000000
4 0x03 = 0x03000000
5 0x04 = 0x04000000
6 0x05 = 0x05000000
7 0x06 = 0x06000000
8 0x07 = 0x07000000
9 0x08 = 0x08000000
10 0x09 = 0x09000000
[all …]
|
| /freebsd/sys/dev/bxe/ |
| H A D | 57711_init_values.c | 55 {OP_WR, 0x600dc, 0x1},
56 {OP_SW, 0x61000, 0x2000000},
57 {OP_RD, 0x600d8, 0x0},
58 {OP_SW, 0x60200, 0x30200},
59 {OP_WR, 0x600dc, 0x0},
62 {OP_RD, 0x600b8, 0x0},
63 {OP_RD, 0x600c8, 0x0},
64 {OP_WR, 0x6016c, 0x0},
67 {OP_RD, 0x600bc, 0x0},
68 {OP_RD, 0x600cc, 0x0},
[all …]
|
| H A D | 57710_init_values.c | 55 {OP_WR, 0x600dc, 0x1},
56 {OP_SW, 0x61000, 0x2000000},
57 {OP_RD, 0x600d8, 0x0},
58 {OP_SW, 0x60200, 0x30200},
59 {OP_WR, 0x600dc, 0x0},
62 {OP_WR, 0x60068, 0xb8},
63 {OP_WR, 0x60078, 0x114},
64 {OP_RD, 0x600b8, 0x0},
65 {OP_RD, 0x600c8, 0x0},
68 {OP_WR, 0x6006c, 0xb8},
[all …]
|
| H A D | 57712_init_values.c | 54 /* #define ATC_COMMON_START 0 */
55 {OP_WR, 0x1100b8, 0x1},
58 {OP_WR, 0x600dc, 0x1},
59 {OP_WR, 0x60050, 0x180},
60 {OP_SW, 0x61000, 0x1ff0000},
61 {OP_IF_MODE_AND, 1, 0x8}, /* e2 */
62 {OP_WR, 0x617fc, 0x3fe001},
63 {OP_IF_MODE_AND, 1, 0x10}, /* e3 */
64 {OP_SW, 0x617fc, 0x20101ff},
65 {OP_IF_MODE_AND, 1, 0x8}, /* e2 */
[all …]
|