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/linux/arch/arm/
H A DMakefile161 textofs-y := 0x00008000
163 textofs-$(CONFIG_ARCH_REALTEK) := 0x00108000
166 textofs-$(CONFIG_SA1111) := 0x00208000
168 textofs-$(CONFIG_ARCH_QCOM_RESERVE_SMEM) := 0x00208000
169 textofs-$(CONFIG_ARCH_MESON) := 0x00208000
170 textofs-$(CONFIG_ARCH_AXXIA) := 0x00308000
/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx1.dtsi38 reg = <0x00223000 0x1000>;
42 #size-cells = <0>;
45 cpu@0 {
47 reg = <0>;
59 #clock-cells = <0>;
75 reg = <0x00200000 0x10000>;
80 reg = <0x00202000 0x1000>;
89 reg = <0x00203000 0x1000>;
98 reg = <0x00205000 0x1000>;
109 reg = <0x00206000 0x1000>;
[all …]
/linux/arch/arm/nwfpe/
H A Dfpopcode.h18 |c o n d|1 1 0 P|U|u|W|L| Rn |v| Fd |0|0|0|1| o f f s e t | CPDT
19 |c o n d|1 1 0 P|U|w|W|L| Rn |x| Fd |0|0|1|0| o f f s e t | CPDT (copro 2)
21 |c o n d|1 1 1 0|a|b|c|d|e| Fn |j| Fd |0|0|0|1|f|g|h|0|i| Fm | CPDO
22 |c o n d|1 1 1 0|a|b|c|L|e| Fn | Rd |0|0|0|1|f|g|h|1|i| Fm | CPRT
23 |c o n d|1 1 1 0|a|b|c|1|e| Fn |1|1|1|1|0|0|0|1|f|g|h|1|i| Fm | comparisons
45 P pre/post index bit: 0 = postindex, 1 = preindex
46 U up/down bit: 0 = stack grows down, 1 = stack grows up
48 L load/store bit: 0 = store, 1 = load
60 j dyadic/monadic bit: 0 = dyadic, 1 = monadic
69 | Single | 0 | 0 | x | 1 words |
[all …]
/linux/arch/arm64/boot/dts/qcom/
H A Dsm6375.dtsi27 #clock-cells = <0>;
33 #clock-cells = <0>;
39 #size-cells = <0>;
41 cpu0: cpu@0 {
44 reg = <0x0 0x0>;
45 clocks = <&cpufreq_hw 0>;
48 qcom,freq-domain = <&cpufreq_hw 0>;
70 reg = <0x0 0x100>;
71 clocks = <&cpufreq_hw 0>;
74 qcom,freq-domain = <&cpufreq_hw 0>;
[all …]
/linux/arch/arm/boot/dts/ti/omap/
H A Dam33xx-l4.dtsi1 &l4_wkup { /* 0x44c00000 */
4 clocks = <&l4_wkup_clkctrl AM3_L4_WKUP_L4_WKUP_CLKCTRL 0>;
6 reg = <0x44c00000 0x800>,
7 <0x44c00800 0x800>,
8 <0x44c01000 0x400>,
9 <0x44c01400 0x400>;
13 ranges = <0x00000000 0x44c00000 0x100000>, /* segment 0 */
14 <0x00100000 0x44d00000 0x100000>, /* segment 1 */
15 <0x00200000 0x44e00000 0x100000>; /* segment 2 */
17 segment@0 { /* 0x44c00000 */
[all …]
H A Domap5-l4.dtsi1 &l4_cfg { /* 0x4a000000 */
4 clocks = <&l4cfg_clkctrl OMAP5_L4_CFG_CLKCTRL 0>;
6 reg = <0x4a000000 0x800>,
7 <0x4a000800 0x800>,
8 <0x4a001000 0x1000>;
12 ranges = <0x00000000 0x4a000000 0x080000>, /* segment 0 */
13 <0x00080000 0x4a080000 0x080000>, /* segment 1 */
14 <0x00100000 0x4a100000 0x080000>, /* segment 2 */
15 <0x00180000 0x4a180000 0x080000>, /* segment 3 */
16 <0x00200000 0x4a200000 0x080000>, /* segment 4 */
[all …]
H A Dam437x-l4.dtsi1 &l4_wkup { /* 0x44c00000 */
4 clocks = <&l4_wkup_clkctrl AM4_L4_WKUP_L4_WKUP_CLKCTRL 0>;
6 reg = <0x44c00000 0x800>,
7 <0x44c00800 0x800>,
8 <0x44c01000 0x400>,
9 <0x44c01400 0x400>;
13 ranges = <0x00000000 0x44c00000 0x100000>, /* segment 0 */
14 <0x00100000 0x44d00000 0x100000>, /* segment 1 */
15 <0x00200000 0x44e00000 0x100000>; /* segment 2 */
17 segment@0 { /* 0x44c00000 */
[all …]
/linux/drivers/net/ethernet/broadcom/
H A Dbnx2.h30 #define TX_BD_FLAGS_CONN_FAULT (1<<0)
40 #define TX_BD_FLAGS_SW_OPTION_WORD (0x1f<<8)
57 #define RX_BD_FLAGS_NOPUSH (1<<0)
71 #define STATUS_ATTN_BITS_LINK_STATE (1L<<0)
279 #define L2_FHDR_STATUS_RULE_CLASS (0x7<<0)
321 #define BNX2_L2CTX_TYPE 0x00000000
322 #define BNX2_L2CTX_TYPE_SIZE_L2 ((0xc0/0x20)<<16)
323 #define BNX2_L2CTX_TYPE_TYPE (0xf<<28)
324 #define BNX2_L2CTX_TYPE_TYPE_EMPTY (0<<28)
327 #define BNX2_L2CTX_TX_HOST_BIDX 0x00000088
[all …]