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12

/linux/drivers/net/wireless/mediatek/mt76/mt76x2/
H A Dinit.c86 (FIELD_PREP(MT_PROT_CFG_RATE, 0x3) | \ in mt76_write_mac_initvals()
88 FIELD_PREP(MT_PROT_CFG_TXOP_ALLOW, 0x3f) | \ in mt76_write_mac_initvals()
92 (FIELD_PREP(MT_PROT_CFG_RATE, 0x2004) | \ in mt76_write_mac_initvals()
94 FIELD_PREP(MT_PROT_CFG_TXOP_ALLOW, 0x3f) | \ in mt76_write_mac_initvals()
98 (FIELD_PREP(MT_PROT_CFG_RATE, 0x2004) | \ in mt76_write_mac_initvals()
101 FIELD_PREP(MT_PROT_CFG_TXOP_ALLOW, 0x17)) in mt76_write_mac_initvals()
104 (FIELD_PREP(MT_PROT_CFG_RATE, 0x2084) | \ in mt76_write_mac_initvals()
107 FIELD_PREP(MT_PROT_CFG_TXOP_ALLOW, 0x3f)) in mt76_write_mac_initvals()
111 { MT_PBF_SYS_CTRL, 0x00080c00 }, in mt76_write_mac_initvals()
112 { MT_PBF_CFG, 0x1efebcff }, in mt76_write_mac_initvals()
[all …]
/linux/drivers/net/wireless/mediatek/mt76/mt76x0/
H A Dinitvals_init.h15 { MT_BCN_OFFSET(0), 0xf8f0e8e0 },
16 { MT_BCN_OFFSET(1), 0x6f77d0c8 },
17 { MT_LEGACY_BASIC_RATE, 0x0000013f },
18 { MT_HT_BASIC_RATE, 0x00008003 },
19 { MT_MAC_SYS_CTRL, 0x00000000 },
20 { MT_RX_FILTR_CFG, 0x00017f97 },
21 { MT_BKOFF_SLOT_CFG, 0x00000209 },
22 { MT_TX_SW_CFG0, 0x00000000 },
23 { MT_TX_SW_CFG1, 0x00080606 },
24 { MT_TX_LINK_CFG, 0x00001020 },
[all …]
/linux/drivers/gpu/drm/i915/pxp/
H A Dintel_pxp_cmd_interface_43.h13 #define PXP43_CMDID_START_HUC_AUTH 0x0000003A
14 #define PXP43_CMDID_NEW_HUC_AUTH 0x0000003F /* MTL+ */
15 #define PXP43_CMDID_INIT_SESSION 0x00000036
45 #define PXP43_INIT_SESSION_VALID BIT(0)
49 #define PXP43_INIT_SESSION_PROTECTION_ARB 0x2
/linux/drivers/gpu/drm/nouveau/include/nvrm/535.113.01/nvidia/inc/kernel/gpu/
H A Dgpu_engine_type.h31 RM_ENGINE_TYPE_NULL = (0x00000000),
32 RM_ENGINE_TYPE_GR0 = (0x00000001),
33 RM_ENGINE_TYPE_GR1 = (0x00000002),
34 RM_ENGINE_TYPE_GR2 = (0x00000003),
35 RM_ENGINE_TYPE_GR3 = (0x00000004),
36 RM_ENGINE_TYPE_GR4 = (0x00000005),
37 RM_ENGINE_TYPE_GR5 = (0x00000006),
38 RM_ENGINE_TYPE_GR6 = (0x00000007),
39 RM_ENGINE_TYPE_GR7 = (0x00000008),
40 RM_ENGINE_TYPE_COPY0 = (0x00000009),
[all …]
/linux/Documentation/devicetree/bindings/thermal/
H A Dqoriq-thermal.yaml20 Register (IPBRR0) at offset 0x0BF8.
24 0x01900102 T1040
82 reg = <0xf0000 0x1000>;
83 interrupts = <18 2 0 0>;
84 fsl,tmu-range = <0x000a0000 0x00090026 0x0008004a 0x0001006a>;
85 fsl,tmu-calibration = <0x00000000 0x00000025>,
86 <0x00000001 0x00000028>,
87 <0x00000002 0x0000002d>,
88 <0x00000003 0x00000031>,
89 <0x00000004 0x00000036>,
[all …]
/linux/drivers/net/wireless/ath/ath9k/
H A Dar9485_initvals.h31 {0x00009e00, 0x037216a0},
32 {0x00009e04, 0x00182020},
33 {0x00009e18, 0x00000000},
34 {0x00009e20, 0x000003a8},
35 {0x00009e2c, 0x00004121},
36 {0x00009e44, 0x02282324},
37 {0x0000a000, 0x00060005},
38 {0x0000a004, 0x00810080},
39 {0x0000a008, 0x00830082},
40 {0x0000a00c, 0x00850084},
[all …]
/linux/arch/arm64/boot/dts/freescale/
H A Dfsl-ls1012a.dtsi32 #size-cells = <0>;
34 cpu0: cpu@0 {
37 reg = <0x0>;
38 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
54 arm,psci-suspend-param = <0x0>;
63 #clock-cells = <0>;
70 #clock-cells = <0>;
92 reg = <0x0 0x1401000 0 0x1000>, /* GICD */
93 <0x0 0x1402000 0 0x2000>, /* GICC */
94 <0x0 0x1404000 0 0x2000>, /* GICH */
[all …]
H A Dfsl-ls1088a.dtsi27 #size-cells = <0>;
30 cpu0: cpu@0 {
33 reg = <0x0>;
34 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
42 reg = <0x1>;
43 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
51 reg = <0x2>;
52 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
60 reg = <0x3>;
61 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
[all …]
H A Dfsl-ls1046a.dtsi38 #size-cells = <0>;
40 cpu0: cpu@0 {
43 reg = <0x0>;
44 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
53 reg = <0x1>;
54 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
63 reg = <0x2>;
64 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
73 reg = <0x3>;
74 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
[all …]
/linux/drivers/net/wireless/ath/ath5k/
H A Drfgain.h38 { AR5K_RF_GAIN(0), { 0x000001a9, 0x00000000 } },
39 { AR5K_RF_GAIN(1), { 0x000001e9, 0x00000040 } },
40 { AR5K_RF_GAIN(2), { 0x00000029, 0x00000080 } },
41 { AR5K_RF_GAIN(3), { 0x00000069, 0x00000150 } },
42 { AR5K_RF_GAIN(4), { 0x00000199, 0x00000190 } },
43 { AR5K_RF_GAIN(5), { 0x000001d9, 0x000001d0 } },
44 { AR5K_RF_GAIN(6), { 0x00000019, 0x00000010 } },
45 { AR5K_RF_GAIN(7), { 0x00000059, 0x00000044 } },
46 { AR5K_RF_GAIN(8), { 0x00000099, 0x00000084 } },
47 { AR5K_RF_GAIN(9), { 0x000001a5, 0x00000148 } },
[all …]
/linux/drivers/gpu/drm/amd/include/
H A Dsoc24_enum.h52 CP_PERFMON_ENABLE_MODE_ALWAYS_COUNT = 0x00000000,
53 CP_PERFMON_ENABLE_MODE_RESERVED_1 = 0x00000001,
54 CP_PERFMON_ENABLE_MODE_COUNT_CONTEXT_TRUE = 0x00000002,
55 CP_PERFMON_ENABLE_MODE_COUNT_CONTEXT_FALSE = 0x00000003,
63 CP_PERFMON_STATE_DISABLE_AND_RESET = 0x00000000,
64 CP_PERFMON_STATE_START_COUNTING = 0x00000001,
65 CP_PERFMON_STATE_STOP_COUNTING = 0x00000002,
66 CP_PERFMON_STATE_RESERVED_3 = 0x00000003,
67 CP_PERFMON_STATE_DISABLE_AND_RESET_PHANTOM = 0x00000004,
68 CP_PERFMON_STATE_COUNT_AND_DUMP_PHANTOM = 0x00000005,
[all …]
H A Dnavi10_enum.h51 GDS_PERF_SEL_DS_ADDR_CONFL = 0,
184 GATCL1_TYPE_NORMAL = 0x00000000,
185 GATCL1_TYPE_SHOOTDOWN = 0x00000001,
186 GATCL1_TYPE_BYPASS = 0x00000002,
194 UTCL1_TYPE_NORMAL = 0x00000000,
195 UTCL1_TYPE_SHOOTDOWN = 0x00000001,
196 UTCL1_TYPE_BYPASS = 0x00000002,
204 UTCL1_XNACK_SUCCESS = 0x00000000,
205 UTCL1_XNACK_RETRY = 0x00000001,
206 UTCL1_XNACK_PRT = 0x00000002,
[all …]
H A Dvega10_enum.h51 GDS_PERF_SEL_DS_ADDR_CONFL = 0,
184 NO_FORCE_REQUEST = 0x00000000,
185 FORCE_LIGHT_SLEEP_REQUEST = 0x00000001,
186 FORCE_DEEP_SLEEP_REQUEST = 0x00000002,
187 FORCE_SHUT_DOWN_REQUEST = 0x00000003,
195 NO_FORCE_REQ = 0x00000000,
196 FORCE_LIGHT_SLEEP_REQ = 0x00000001,
204 ENABLE_MEM_PWR_CTRL = 0x00000000,
205 DISABLE_MEM_PWR_CTRL = 0x00000001,
213 DYNAMIC_SHUT_DOWN_ENABLE = 0x00000000,
[all …]
H A Dsoc21_enum.h55 DSM_DATA_SEL_DISABLE = 0x00000000,
56 DSM_DATA_SEL_0 = 0x00000001,
57 DSM_DATA_SEL_1 = 0x00000002,
58 DSM_DATA_SEL_BOTH = 0x00000003,
66 DSM_ENABLE_ERROR_INJECT_FED_IN = 0x00000000,
67 DSM_ENABLE_ERROR_INJECT_SINGLE = 0x00000001,
68 DSM_ENABLE_ERROR_INJECT_UNCORRECTABLE = 0x00000002,
69 DSM_ENABLE_ERROR_INJECT_UNCORRECTABLE_LIMITED = 0x00000003,
77 DSM_SELECT_INJECT_DELAY_NO_DELAY = 0x00000000,
78 DSM_SELECT_INJECT_DELAY_DELAY_ERROR = 0x00000001,
[all …]
/linux/sound/soc/codecs/
H A Dcs35l45-tables.c15 { 0x00000040, 0x00000055 },
16 { 0x00000040, 0x000000AA },
17 { 0x00000044, 0x00000055 },
18 { 0x00000044, 0x000000AA },
19 { 0x00006480, 0x0830500A },
20 { 0x00007C60, 0x1000850B },
21 { CS35L45_BOOST_OV_CFG, 0x007000D0 },
22 { CS35L45_LDPM_CONFIG, 0x0001B636 },
23 { 0x00002C08, 0x00000009 },
24 { 0x00006850, 0x0A30FFC4 },
[all …]
H A Dcs35l36.h16 #define CS35L36_FIRSTREG 0x00000000
17 #define CS35L36_LASTREG 0x00E037FC
18 #define CS35L36_SW_RESET 0x00000000
19 #define CS35L36_SW_REV 0x00000004
20 #define CS35L36_HW_REV 0x00000008
21 #define CS35L36_TESTKEY_CTRL 0x00000020
22 #define CS35L36_USERKEY_CTL 0x00000024
23 #define CS35L36_OTP_MEM30 0x00000478
24 #define CS35L36_OTP_CTRL1 0x00000500
25 #define CS35L36_OTP_CTRL2 0x00000504
[all …]
/linux/sound/ppc/
H A Dtumbler_volume.h4 /* 0 = -70 dB, 175 = 18.0 dB in 0.5 dB step */
6 0x00000015, 0x00000016, 0x00000017,
7 0x00000019, 0x0000001a, 0x0000001c,
8 0x0000001d, 0x0000001f, 0x00000021,
9 0x00000023, 0x00000025, 0x00000027,
10 0x00000029, 0x0000002c, 0x0000002e,
11 0x00000031, 0x00000034, 0x00000037,
12 0x0000003a, 0x0000003e, 0x00000042,
13 0x00000045, 0x0000004a, 0x0000004e,
14 0x00000053, 0x00000057, 0x0000005d,
[all …]
/linux/drivers/gpu/drm/nouveau/include/nvhw/class/
H A Dclc37e.h28 #define NVC37E_UPDATE (0x00000200)
30 #define NVC37E_UPDATE_INTERLOCK_WITH_WIN_IMM_DISABLE (0x00000000)
31 #define NVC37E_UPDATE_INTERLOCK_WITH_WIN_IMM_ENABLE (0x00000001)
32 #define NVC37E_SET_SEMAPHORE_CONTROL (0x0000020C)
33 #define NVC37E_SET_SEMAPHORE_CONTROL_OFFSET 7:0
34 #define NVC37E_SET_SEMAPHORE_ACQUIRE (0x00000210)
35 #define NVC37E_SET_SEMAPHORE_ACQUIRE_VALUE 31:0
36 #define NVC37E_SET_SEMAPHORE_RELEASE (0x00000214)
37 #define NVC37E_SET_SEMAPHORE_RELEASE_VALUE 31:0
38 #define NVC37E_SET_CONTEXT_DMA_SEMAPHORE (0x00000218)
[all …]
/linux/drivers/net/wireless/realtek/rtw88/
H A Drtw8822c_table.c16 0x83000000, 0x00000000, 0x40000000, 0x00000000,
17 0x1D90, 0x300001FF,
18 0x1D90, 0x300101FE,
19 0x1D90, 0x300201FD,
20 0x1D90, 0x300301FC,
21 0x1D90, 0x300401FB,
22 0x1D90, 0x300501FA,
23 0x1D90, 0x300601F9,
24 0x1D90, 0x300701F8,
25 0x1D90, 0x300801F7,
[all …]
/linux/arch/powerpc/boot/dts/fsl/
H A Dt1040si-post.dtsi39 alloc-ranges = <0 0 0x10000 0>;
44 alloc-ranges = <0 0 0x10000 0>;
49 alloc-ranges = <0 0 0x10000 0>;
56 interrupts = <25 2 0 0>;
64 bus-range = <0x0 0xff>;
65 interrupts = <20 2 0 0>;
67 pcie@0 {
68 reg = <0 0 0 0 0>;
73 interrupts = <20 2 0 0>;
74 interrupt-map-mask = <0xf800 0 0 7>;
[all …]
/linux/drivers/scsi/
H A D53c700_d.h_shipped28 ABSOLUTE Device_ID = 0 ; ID of target for command
29 ABSOLUTE MessageCount = 0 ; Number of bytes in message
30 ABSOLUTE MessageLocation = 0 ; Addr of message
31 ABSOLUTE CommandCount = 0 ; Number of bytes in command
32 ABSOLUTE CommandAddress = 0 ; Addr of Command
33 ABSOLUTE StatusAddress = 0 ; Addr to receive status return
34 ABSOLUTE ReceiveMsgAddress = 0 ; Addr to receive msg
42 ABSOLUTE SGScriptStartAddress = 0
45 ; this: 0xPRS where
48 ABSOLUTE AFTER_SELECTION = 0x100
[all …]
/linux/crypto/
H A Daes_generic.c67 0xa56363c6, 0x847c7cf8, 0x997777ee, 0x8d7b7bf6,
68 0x0df2f2ff, 0xbd6b6bd6, 0xb16f6fde, 0x54c5c591,
69 0x50303060, 0x03010102, 0xa96767ce, 0x7d2b2b56,
70 0x19fefee7, 0x62d7d7b5, 0xe6abab4d, 0x9a7676ec,
71 0x45caca8f, 0x9d82821f, 0x40c9c989, 0x877d7dfa,
72 0x15fafaef, 0xeb5959b2, 0xc947478e, 0x0bf0f0fb,
73 0xecadad41, 0x67d4d4b3, 0xfda2a25f, 0xeaafaf45,
74 0xbf9c9c23, 0xf7a4a453, 0x967272e4, 0x5bc0c09b,
75 0xc2b7b775, 0x1cfdfde1, 0xae93933d, 0x6a26264c,
76 0x5a36366c, 0x413f3f7e, 0x02f7f7f5, 0x4fcccc83,
[all …]
/linux/arch/arm/boot/dts/nxp/ls/
H A Dls1021a.dtsi31 #size-cells = <0>;
36 reg = <0xf00>;
37 clocks = <&clockgen 1 0>;
44 reg = <0xf01>;
45 clocks = <&clockgen 1 0>;
50 memory@0 {
52 reg = <0x0 0x0 0x0 0x0>;
57 #clock-cells = <0>;
80 offset = <0xb0>;
81 mask = <0x02>;
[all …]
/linux/drivers/mfd/
H A Dcs42l43.c42 #define CS42L43_MCU_UPDATE_OFFSET 0x100000
46 #define CS42L43_MCU_ROM_REV 0x2001
47 #define CS42L43_MCU_ROM_BIOS_REV 0x0000
49 #define CS42L43_MCU_SUPPORTED_REV 0x2105
50 #define CS42L43_MCU_SHADOW_REGS_REQUIRED_REV 0x2200
51 #define CS42L43_MCU_SUPPORTED_BIOS_REV 0x0001
75 { 0x4000, 0x00000055 },
76 { 0x4000, 0x000000AA },
77 { 0x10084, 0x00000000 },
78 { 0x1741C, 0x00CD2000 },
[all …]
/linux/lib/
H A Dcrc32test.c15 * There are various incantations of crc32(). Some use a seed of 0 or ~0.
16 * Some xor at the end with ~0. The generic crc32() function takes
19 * drivers/net/smc9194.c uses seed ~0, doesn't xor with ~0.
20 * fs/jffs2 uses seed 0, doesn't xor with ~0.
21 * fs/partitions/efi.c uses seed ~0, xor's with ~0.
36 0x5b, 0x85, 0x21, 0xcb, 0x09, 0x68, 0x7d, 0x30,
37 0xc7, 0x69, 0xd7, 0x30, 0x92, 0xde, 0x59, 0xe4,
38 0xc9, 0x6e, 0x8b, 0xdb, 0x98, 0x6b, 0xaa, 0x60,
39 0xa8, 0xb5, 0xbc, 0x6c, 0xa9, 0xb1, 0x5b, 0x2c,
40 0xea, 0xb4, 0x92, 0x6a, 0x3f, 0x79, 0x91, 0xe4,
[all …]

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