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/freebsd/sys/contrib/dev/ath/ath_hal/ar9300/
H A Dar9300_aic.c50 #define ATH_AIC_MIN_ROT_DIR_ATT_DB 0
51 #define ATH_AIC_MIN_ROT_QUAD_ATT_DB 0
54 #define ATH_AIC_SRAM_AUTO_INCREMENT 0x80000000
55 #define ATH_AIC_SRAM_GAIN_TABLE_OFFSET 0x280
56 #define ATH_AIC_SRAM_CAL_OFFSET 0x140
59 #define ATH_AIC_BT_JUPITER_CTRL 0x66820
60 #define ATH_AIC_BT_AIC_ENABLE 0x02
64 0, 3, 9, 15, 21, 27};
79 0x00000, // 0
80 0x00000,
[all …]
/freebsd/sys/dev/rtwn/rtl8821a/
H A Dr21a_priv.h34 { 0x421, 0x0f }, { 0x428, 0x0a }, { 0x429, 0x10 }, { 0x430, 0x00 },
35 { 0x431, 0x00 }, { 0x432, 0x00 }, { 0x433, 0x01 }, { 0x434, 0x04 },
36 { 0x435, 0x05 }, { 0x436, 0x07 }, { 0x437, 0x08 }, { 0x43c, 0x04 },
37 { 0x43d, 0x05 }, { 0x43e, 0x07 }, { 0x43f, 0x08 }, { 0x440, 0x5d },
38 { 0x441, 0x01 }, { 0x442, 0x00 }, { 0x444, 0x10 }, { 0x445, 0x00 },
39 { 0x446, 0x00 }, { 0x447, 0x00 }, { 0x448, 0x00 }, { 0x449, 0xf0 },
40 { 0x44a, 0x0f }, { 0x44b, 0x3e }, { 0x44c, 0x10 }, { 0x44d, 0x00 },
41 { 0x44e, 0x00 }, { 0x44f, 0x00 }, { 0x450, 0x00 }, { 0x451, 0xf0 },
42 { 0x452, 0x0f }, { 0x453, 0x00 }, { 0x456, 0x5e }, { 0x460, 0x66 },
43 { 0x461, 0x66 }, { 0x4c8, 0x3f }, { 0x4c9, 0xff }, { 0x4cc, 0xff },
[all …]
/freebsd/sys/contrib/dev/rtw89/
H A Drtw8852b_rfk_table.c8 RTW89_DECL_RFK_WM(0xC0D4, 0xffffffff, 0x4486888c),
9 RTW89_DECL_RFK_WM(0xC0D8, 0xffffffff, 0xc6ba10e0),
10 RTW89_DECL_RFK_WM(0xc0dc, 0xffffffff, 0x30c52868),
11 RTW89_DECL_RFK_WM(0xc0e0, 0xffffffff, 0x05008128),
12 RTW89_DECL_RFK_WM(0xc0e4, 0xffffffff, 0x0000272b),
13 RTW89_DECL_RFK_WM(0xC1D4, 0xffffffff, 0x4486888c),
14 RTW89_DECL_RFK_WM(0xC1D8, 0xffffffff, 0xc6ba10e0),
15 RTW89_DECL_RFK_WM(0xc1dc, 0xffffffff, 0x30c52868),
16 RTW89_DECL_RFK_WM(0xc1e0, 0xffffffff, 0x05008128),
17 RTW89_DECL_RFK_WM(0xc1e4, 0xffffffff, 0x0000272b),
[all …]
H A Drtw8851b_rfk_table.c8 RTW89_DECL_RFK_WM(0xc210, 0x003fc000, 0x80),
9 RTW89_DECL_RFK_WM(0xc224, 0x003fc000, 0x80),
10 RTW89_DECL_RFK_WM(0xc0f8, 0x30000000, 0x3),
11 RTW89_DECL_RFK_WM(0x12b8, BIT(30), 0x1),
12 RTW89_DECL_RFK_WM(0x030c, 0x1f000000, 0x1f),
13 RTW89_DECL_RFK_WM(0x032c, 0xc0000000, 0x0),
14 RTW89_DECL_RFK_WM(0x032c, BIT(22), 0x0),
15 RTW89_DECL_RFK_WM(0x032c, BIT(22), 0x1),
16 RTW89_DECL_RFK_WM(0x032c, BIT(16), 0x0),
17 RTW89_DECL_RFK_WM(0x032c, BIT(20), 0x1),
[all …]
/freebsd/sys/dev/rtwn/rtl8812a/
H A Dr12a_priv.h34 { 0x010, 0x0c },
37 { 0x025, 0x0f }, { 0x072, 0x00 }, { 0x420, 0x80 }, { 0x428, 0x0a }, \
38 { 0x429, 0x10 }, { 0x430, 0x00 }, { 0x431, 0x00 }, { 0x432, 0x00 }, \
39 { 0x433, 0x01 }, { 0x434, 0x04 }, { 0x435, 0x05 }, { 0x436, 0x07 }, \
40 { 0x437, 0x08 }, { 0x43c, 0x04 }, { 0x43d, 0x05 }, { 0x43e, 0x07 }, \
41 { 0x43f, 0x08 }, { 0x440, 0x5d }, { 0x441, 0x01 }, { 0x442, 0x00 }, \
42 { 0x444, 0x10 }, { 0x445, 0x00 }, { 0x446, 0x00 }, { 0x447, 0x00 }, \
43 { 0x448, 0x00 }, { 0x449, 0xf0 }, { 0x44a, 0x0f }, { 0x44b, 0x3e }, \
44 { 0x44c, 0x10 }, { 0x44d, 0x00 }, { 0x44e, 0x00 }, { 0x44f, 0x00 }, \
45 { 0x450, 0x00 }, { 0x451, 0xf0 }, { 0x452, 0x0f }, { 0x453, 0x00 }, \
[all …]
/freebsd/sys/dev/rtwn/rtl8192c/
H A Dr92c_priv.h41 #define R92C_COND_RTL8188CE 0x01
42 #define R92C_COND_RTL8188CU 0x02
43 #define R92C_COND_RTL8188RU 0x04
44 #define R92C_COND_RTL8192CE 0x08
45 #define R92C_COND_RTL8192CU 0x10
51 0xd04
53 0xd08, 0xd0c, 0xd10, 0xd14, 0xd18, 0xd2c, 0xd30, 0xd34, 0xd38,
54 0xd3c, 0xd40, 0xd44, 0xd48, 0xd4c, 0xd50, 0xd54, 0xd58, 0xd5c,
55 0xd60, 0xd64, 0xd68, 0xd6c, 0xd70, 0xd74, 0xd78, 0xe00, 0xe04,
56 0xe08, 0xe10, 0xe14, 0xe18, 0xe1c, 0xe28, 0xe30, 0xe34, 0xe38,
[all …]
/freebsd/sys/dev/rtwn/rtl8192e/
H A Dr92e_priv.h34 { 0x011, 0xeb }, { 0x012, 0x07 }, { 0x014, 0x75 }, { 0x303, 0xa7 },
35 { 0x428, 0x0a }, { 0x429, 0x10 }, { 0x430, 0x00 }, { 0x431, 0x00 },
36 { 0x432, 0x00 }, { 0x433, 0x01 }, { 0x434, 0x04 }, { 0x435, 0x05 },
37 { 0x436, 0x07 }, { 0x437, 0x08 }, { 0x43c, 0x04 }, { 0x43d, 0x05 },
38 { 0x43e, 0x07 }, { 0x43f, 0x08 }, { 0x440, 0x5d }, { 0x441, 0x01 },
39 { 0x442, 0x00 }, { 0x444, 0x10 }, { 0x445, 0x00 }, { 0x446, 0x00 },
40 { 0x447, 0x00 }, { 0x448, 0x00 }, { 0x449, 0xf0 }, { 0x44a, 0x0f },
41 { 0x44b, 0x3e }, { 0x44c, 0x10 }, { 0x44d, 0x00 }, { 0x44e, 0x00 },
42 { 0x44f, 0x00 }, { 0x450, 0x00 }, { 0x451, 0xf0 }, { 0x452, 0x0f },
43 { 0x453, 0x00 }, { 0x456, 0x5e }, { 0x460, 0x66 }, { 0x461, 0x66 },
[all …]
/freebsd/sys/contrib/device-tree/src/powerpc/
H A Dtqm8548-bigflash.dts31 #size-cells = <0>;
33 PowerPC,8548@0 {
35 reg = <0>;
38 d-cache-size = <0x8000>; // L1, 32K
39 i-cache-size = <0x8000>; // L1, 32K
46 reg = <0x00000000 0x00000000>; // Filled in by U-Boot
53 ranges = <0x0 0xa0000000 0x100000>;
54 bus-frequency = <0>;
57 ecm-law@0 {
59 reg = <0x0 0x1000>;
[all …]
H A Dtqm8548.dts31 #size-cells = <0>;
33 PowerPC,8548@0 {
35 reg = <0>;
38 d-cache-size = <0x8000>; // L1, 32K
39 i-cache-size = <0x8000>; // L1, 32K
46 reg = <0x00000000 0x00000000>; // Filled in by U-Boot
53 ranges = <0x0 0xe0000000 0x100000>;
54 bus-frequency = <0>;
57 ecm-law@0 {
59 reg = <0x0 0x1000>;
[all …]
H A Dxpedite5200_xmon.dts18 boot-bank = <0x0>;
34 #size-cells = <0>;
36 PowerPC,8548@0 {
38 reg = <0>;
41 d-cache-size = <0x8000>; // L1, 32K
42 i-cache-size = <0x8000>; // L1, 32K
49 reg = <0x0 0x0>; // Filled in by boot loader
56 ranges = <0x0 0xef000000 0x100000>;
57 bus-frequency = <0>;
60 ecm-law@0 {
[all …]
H A Da4m072.dts27 ranges = <0 0xf0000000 0x0000c000>;
28 reg = <0xf0000000 0x00000100>;
29 bus-frequency = <0>; /* From boot loader */
30 system-frequency = <0>; /* From boot loader */
33 fsl,init-ext-48mhz-en = <0x0>;
34 fsl,init-fd-enable = <0x01>;
35 fsl,init-fd-counters = <0x3333>;
44 reg = <0x2000 0x100>;
45 interrupts = <2 1 0>;
50 reg = <0x2200 0x100>;
[all …]
H A Dpdm360ng.dts23 reg = <0x00000000 0x20000000>; // 512MB at 0
27 bank-width = <0x1>;
28 chips = <0x1>;
30 partition@0 {
32 reg = <0x0 0x40000000>;
37 ranges = <0x0 0x0 0xf0000000 0x10000000 /* Flash */
38 0x2 0x0 0x50040000 0x00020000>; /* CS2: MRAM */
40 flash@0,0 {
42 reg = <0 0x00000000 0x08000000
43 0 0x08000000 0x08000000>;
[all …]
/freebsd/sys/contrib/device-tree/Bindings/display/panel/
H A Darm,versatile-tft-panel.yaml36 sysreg@0 {
38 reg = <0x00000 0x1000>;
/freebsd/sys/dev/rtwn/rtl8188e/
H A Dr88e_priv.h39 { 0x026, 0x41 }, { 0x027, 0x35 }, { 0x040, 0x00 }, { 0x428, 0x0a },
40 { 0x429, 0x10 }, { 0x430, 0x00 }, { 0x431, 0x01 }, { 0x432, 0x02 },
41 { 0x433, 0x04 }, { 0x434, 0x05 }, { 0x435, 0x06 }, { 0x436, 0x07 },
42 { 0x437, 0x08 }, { 0x438, 0x00 }, { 0x439, 0x00 }, { 0x43a, 0x01 },
43 { 0x43b, 0x02 }, { 0x43c, 0x04 }, { 0x43d, 0x05 }, { 0x43e, 0x06 },
44 { 0x43f, 0x07 }, { 0x440, 0x5d }, { 0x441, 0x01 }, { 0x442, 0x00 },
45 { 0x444, 0x15 }, { 0x445, 0xf0 }, { 0x446, 0x0f }, { 0x447, 0x00 },
46 { 0x458, 0x41 }, { 0x459, 0xa8 }, { 0x45a, 0x72 }, { 0x45b, 0xb9 },
47 { 0x460, 0x66 }, { 0x461, 0x66 }, { 0x480, 0x08 }, { 0x4c8, 0xff },
48 { 0x4c9, 0x08 }, { 0x4cc, 0xff }, { 0x4cd, 0xff }, { 0x4ce, 0x01 },
[all …]
/freebsd/sys/contrib/device-tree/Bindings/arm/
H A Dvexpress-sysreg.yaml42 '^gpio@[0-9a-f]+$':
61 for sys_led : 0..7 = LED 0..7
62 for sys_mci : 0 = MMC CARDIN, 1 = MMC WPROT
63 for sys_flash : 0 = NOR FLASH WPn
81 sysreg@0 {
83 reg = <0x00000 0x1000>;
86 ranges = <0 0 0x1000>;
90 reg = <0x008 4>;
/freebsd/sys/contrib/device-tree/src/mips/lantiq/
H A Ddanube_easy50712.dts11 memory@0 {
13 reg = <0x0 0x2000000>;
19 localbus@0 {
22 ranges = <0 0 0x0 0x3ffffff /* addrsel0 */
23 1 0 0x4000000 0x4000010>; /* addsel1 */
26 nor-boot@0 {
29 reg = <0 0x0 0x2000000>;
33 partition@0 {
35 reg = <0x00000 0x10000>; /* 64 KB */
40 reg = <0x10000 0x10000>; /* 64 KB */
[all …]
H A Deasy50712.dts11 memory@0 {
13 reg = <0x0 0x2000000>;
19 localbus@0 {
22 ranges = <0 0 0x0 0x3ffffff /* addrsel0 */
23 1 0 0x4000000 0x4000010>; /* addsel1 */
26 nor-boot@0 {
29 reg = <0 0x0 0x2000000>;
33 partition@0 {
35 reg = <0x00000 0x10000>; /* 64 KB */
40 reg = <0x10000 0x10000>; /* 64 KB */
[all …]
/freebsd/sys/contrib/device-tree/src/arm/microchip/
H A Dat91rm9200ek.dts19 reg = <0x20000000 0x4000000>;
35 timer@0 {
37 reg = <0>, <1>;
63 pinctrl-0 =
75 cs-gpios = <&pioA 3 0>, <0>, <0>, <0>;
76 flash@0 {
79 reg = <0>;
99 reg = <0x10000000 0x800000>;
100 linux,mtd-name = "physmap-flash.0";
105 barebox@0 {
[all …]
/freebsd/sys/powerpc/include/
H A Dopenpicreg.h34 #define OPENPIC_SIZE 0x40000
37 * Per Processor Registers [private access] (0x00000 - 0x00fff)
41 #define OPENPIC_IPI_DISPATCH(ipi) (0x40 + (ipi) * 0x10)
44 #define OPENPIC_TPR 0x80
45 #define OPENPIC_TPR_MASK 0x0000000f
47 #define OPENPIC_WHOAMI 0x90
50 #define OPENPIC_IACK 0xa0
53 #define OPENPIC_EOI 0xb0
56 * Global registers (0x01000-0x0ffff)
59 /* feature reporting reg 0 */
[all …]
/freebsd/sys/contrib/device-tree/src/arm/broadcom/
H A Dbcm5301x.dtsi13 a9pll: arm_clk@0 {
14 #clock-cells = <0>;
17 reg = <0x00000 0x1000>;
22 reg = <0x20620 0x20>;
35 #clock-cells = <0>;
41 #clock-cells = <0>;
49 #clock-cells = <0>;
[all...]
/freebsd/sys/contrib/device-tree/src/arm/mediatek/
H A Dmt7629-rfb.dts41 reg = <0x40000000 0x10000000>;
65 pinctrl-0 = <&eth_pins>;
69 gmac0: mac@0 {
71 reg = <0>;
89 #size-cells = <0>;
91 phy0: ethernet-phy@0 {
92 reg = <0>;
99 pinctrl-0 = <&i2c_pins>;
105 pinctrl-0
[all...]
/freebsd/contrib/ncurses/include/
H A Dnc_termios.h67 #define TCIFLUSH 0
82 #define ISIG 0x0001
83 #define ICANON 0x0002
84 #define ECHO 0x0004
85 #define ECHOE 0x0008
86 #define ECHOK 0x0010
87 #define ECHONL 0x0020
88 #define NOFLSH 0x0040
89 #define IEXTEN 0x0100
100 #define IGNBRK 0x00001
[all …]
/freebsd/sys/dev/qat_c2xxx/
H A Dqat_c2xxxreg.h65 #define QAT_REVID_C2XXX_A0 0x00
66 #define QAT_REVID_C2XXX_B0 0x02
67 #define QAT_REVID_C2XXX_C0 0x03
75 #define BAR_PMISC_ID_C2XXX 0
78 #define ACCEL_MASK_C2XXX 0x1
79 #define AE_MASK_C2XXX 0x3
86 #define BAR_PESRAM_SIZE_C2XXX 0
93 #define BAR_PMISC_C2XXX 0x18
94 #define BAR_PMISC_SIZE_C2XXX 0x20000 /* 128K */
97 #define BAR_PETRINGCSR_C2XXX 0x20
[all …]
/freebsd/sys/dev/ixgbe/
H A Dixgbe_vf.h45 #define IXGBE_VFCTRL 0x00000
46 #define IXGBE_VFSTATUS 0x00008
47 #define IXGBE_VFLINKS 0x00010
48 #define IXGBE_VFFRTIMER 0x00048
49 #define IXGBE_VFRXMEMWRAP 0x03190
50 #define IXGBE_VTEICR 0x00100
51 #define IXGBE_VTEICS 0x00104
52 #define IXGBE_VTEIMS 0x00108
53 #define IXGBE_VTEIMC 0x0010C
54 #define IXGBE_VTEIAC 0x00110
[all …]
/freebsd/sys/dev/xilinx/
H A Dif_xaereg.h36 #define XAE_RAF 0x00000 /* Reset and Address Filter RW */
37 #define XAE_TPF 0x00004 /* Transmit Pause Frame RW */
38 #define XAE_IFGP 0x00008 /* Transmit Inter Frame Gap Adjustment RW */
39 #define XAE_IS 0x0000C /* Interrupt Status register RW */
40 #define XAE_IP 0x00010 /* Interrupt Pending register RO */
41 #define XAE_IE 0x00014 /* Interrupt Enable register RW */
42 #define XAE_TTAG 0x00018 /* Transmit VLAN Tag RW */
43 #define XAE_RTAG 0x0001C /* Receive VLAN Tag RW */
44 #define XAE_UAWL 0x00020 /* Unicast Address Word Lower RW */
45 #define XAE_UAWU 0x00024 /* Unicast Address Word Upper RW */
[all …]

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