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/linux/drivers/net/ethernet/marvell/octeontx2/af/
H A Drvu_reg.h12 #define RVU_AF_MSIXTR_BASE (0x10)
13 #define RVU_AF_ECO (0x20)
14 #define RVU_AF_BLK_RST (0x30)
15 #define RVU_AF_PF_BAR4_ADDR (0x40)
16 #define RVU_AF_RAS (0x100)
17 #define RVU_AF_RAS_W1S (0x108)
18 #define RVU_AF_RAS_ENA_W1S (0x110)
19 #define RVU_AF_RAS_ENA_W1C (0x118)
20 #define RVU_AF_GEN_INT (0x120)
21 #define RVU_AF_GEN_INT_W1S (0x128)
[all …]
H A Dmcs_reg.h13 #define MCSX_IP_MODE 0x900c8ull
14 #define MCSX_MCS_TOP_SLAVE_PORT_RESET(a) ({ \ argument
17 offset = 0x408ull; \
19 offset = 0xa28ull; \
20 offset += (a) * 0x8ull; \
24 #define MCSX_MCS_TOP_SLAVE_CHANNEL_CFG(a) ({ \ argument
27 offset = 0x808ull; \
29 offset = 0xa68ull; \
30 offset += (a) * 0x8ull; \
36 offset = 0x80000ull; \
[all …]
/linux/arch/powerpc/include/asm/
H A Dppc-opcode.h13 #define __REG_R0 0
46 #define __REGA0_0 0
80 #define _R0 0
113 #define IMM_L(i) ((uintptr_t)(i) & 0xffff)
114 #define IMM_DS(i) ((uintptr_t)(i) & 0xfffc)
115 #define IMM_DQ(i) ((uintptr_t)(i) & 0xfff0)
116 #define IMM_D0(i) (((uintptr_t)(i) >> 16) & 0x3ffff)
122 * top half to negate the effect (i.e. 0xffff + 1 = 0x(1)0000).
128 (((uintptr_t)(i) & 0x8000) >> 15))
133 #define IMM_H18(i) (((uintptr_t)(i)>>16) & 0x3ffff)
[all …]
/linux/tools/perf/pmu-events/arch/powerpc/power10/
H A Ddatasource.json3 "EventCode": "0x1505E",
8 "EventCode": "0x100FC",
13 "EventCode": "0x200FE",
15 …on": "The processor's L1 data cache was reloaded from a source beyond the local core's L2 due to a…
18 "EventCode": "0x300FE",
20 … "The processor's L1 data cache was reloaded from beyond the local core's L3 due to a demand miss."
23 "EventCode": "0x400F0",
28 "EventCode": "0x400FE",
30 …he processor's data cache was reloaded from local, remote, or distant memory due to a demand miss."
33 "EventCode": "0x0000004080",
[all …]
/linux/drivers/crypto/cavium/cpt/
H A Dcpt_common.h16 #define CPT_81XX_PCI_PF_DEVICE_ID 0xa040
17 #define CPT_81XX_PCI_VF_DEVICE_ID 0xa041
31 #define VF_STATE_DOWN 0
39 #define CPTX_PF_CONSTANTS(a) (0x0ll + ((u64)(a) << 36)) argument
40 #define CPTX_PF_RESET(a) (0x100ll + ((u64)(a) << 36)) argument
41 #define CPTX_PF_DIAG(a) (0x120ll + ((u64)(a) << 36)) argument
42 #define CPTX_PF_BIST_STATUS(a) (0x160ll + ((u64)(a) << 36)) argument
43 #define CPTX_PF_ECC0_CTL(a) (0x200ll + ((u64)(a) << 36)) argument
44 #define CPTX_PF_ECC0_FLIP(a) (0x210ll + ((u64)(a) << 36)) argument
45 #define CPTX_PF_ECC0_INT(a) (0x220ll + ((u64)(a) << 36)) argument
[all …]
/linux/sound/pci/au88x0/
H A Dau88x0_a3d.c21 a3dsrc_SetTimeConsts(a3dsrc_t * a, short HrtfTrack, short ItdTrack, in a3dsrc_SetTimeConsts() argument
24 vortex_t *vortex = (vortex_t *) (a->vortex); in a3dsrc_SetTimeConsts()
26 a3d_addrA(a->slice, a->source, A3D_A_HrtfTrackTC), HrtfTrack); in a3dsrc_SetTimeConsts()
28 a3d_addrA(a->slice, a->source, A3D_A_ITDTrackTC), ItdTrack); in a3dsrc_SetTimeConsts()
30 a3d_addrA(a->slice, a->source, A3D_A_GainTrackTC), GTrack); in a3dsrc_SetTimeConsts()
32 a3d_addrA(a->slice, a->source, A3D_A_CoeffTrackTC), CTrack); in a3dsrc_SetTimeConsts()
35 #if 0
37 a3dsrc_GetTimeConsts(a3dsrc_t * a, short *HrtfTrack, short *ItdTrack,
47 a3dsrc_SetAtmosTarget(a3dsrc_t * a, short aa, short b, short c, short d, in a3dsrc_SetAtmosTarget() argument
50 vortex_t *vortex = (vortex_t *) (a->vortex); in a3dsrc_SetAtmosTarget()
[all …]
/linux/arch/powerpc/crypto/
H A Dmd5-asm.S49 lwbrx reg,0,rWP; /* load data */
61 #define R_00_15(a, b, c, d, w0, w1, p, q, off, k0h, k0l, k1h, k1l) \ argument
69 add a,a,rT0; /* 1: a = a + f */ \
72 add a,a,w0; /* 1: a = a + wk */ \
74 rotrwi a,a,p; /* 1: a = a rotl x */ \
75 add d,d,w1; /* 2: a = a + wk */ \
76 add a,a,b; /* 1: a = a + b */ \
77 and rT0,a,b; /* 2: f = b and c */ \
78 andc rT1,c,a; /* 2: f' = ~b and d */ \
80 add d,d,rT0; /* 2: a = a + f */ \
[all …]
/linux/tools/perf/pmu-events/arch/powerpc/power8/
H A Dmarked.json3 "EventCode": "0x3515e",
5 …"BriefDescription": "Marked branch instruction completed with a target address less than current i…
9 "EventCode": "0x2013a",
15 "EventCode": "0x1016e",
21 "EventCode": "0x301e4",
27 "EventCode": "0x101e2",
33 "EventCode": "0x4d148",
35 …ified (M) data from another chip's L2 or L3 on a different Node or Group (Distant), as this chip d…
39 "EventCode": "0x2d128",
41 …ified (M) data from another chip's L2 or L3 on a different Node or Group (Distant), as this chip d…
[all …]
/linux/lib/
H A Dglobtest.c12 module_param(verbose, bool, 0);
24 /* Can't get string literals into a particular section, so... */ in test()
47 * pointed-to strings to be in a particular section.
49 * Anyway, a test consists of:
50 * 1. Expected glob_match result: '1' or '0'.
54 * The list of tests is terminated with a final '\0' instead of
55 * a glob_match result character.
59 "1" "a\0" "a\0"
60 "0" "a\0" "b\0"
61 "0" "a\0" "aa\0"
[all …]
/linux/drivers/gpu/drm/nouveau/include/nvhw/class/
H A Dcl907d.h4 * Permission is hereby granted, free of charge, to any person obtaining a
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
27 #define NV907D_CORE_NOTIFIER_3_CAPABILITIES_4 0x00000004
28 #define NV907D_CORE_NOTIFIER_3_CAPABILITIES_4_DONE 0:0
29 #define NV907D_CORE_NOTIFIER_3_CAPABILITIES_4_DONE_FALSE 0x00000000
30 #define NV907D_CORE_NOTIFIER_3_CAPABILITIES_4_DONE_TRUE 0x00000001
31 #define NV907D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR0_20 0x00000014
32 #define NV907D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR0_20_SINGLE_LVDS18 0:0
33 #define NV907D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR0_20_SINGLE_LVDS18_FALSE 0x00000000
34 #define NV907D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR0_20_SINGLE_LVDS18_TRUE 0x00000001
[all …]
H A Dcl507d.h4 * Permission is hereby granted, free of charge, to any person obtaining a
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
27 #define NV_DISP_CORE_NOTIFIER_1 0x00000000
28 #define NV_DISP_CORE_NOTIFIER_1_SIZEOF 0x00000054
29 #define NV_DISP_CORE_NOTIFIER_1_COMPLETION_0 0x00000000
30 #define NV_DISP_CORE_NOTIFIER_1_COMPLETION_0_DONE 0:0
31 #define NV_DISP_CORE_NOTIFIER_1_COMPLETION_0_DONE_FALSE 0x00000000
32 #define NV_DISP_CORE_NOTIFIER_1_COMPLETION_0_DONE_TRUE 0x00000001
35 #define NV_DISP_CORE_NOTIFIER_1_CAPABILITIES_1 0x00000001
36 #define NV_DISP_CORE_NOTIFIER_1_CAPABILITIES_1_DONE 0:0
[all …]
/linux/tools/testing/selftests/powerpc/include/
H A Dinstructions.h10 (0x7c00060c | (RA) << (31-15) | (RB) << (31-20) | (L) << (31-10))
16 asm volatile(str(COPY(0, %0, 0))";" in copy()
25 asm volatile(str(COPY(0, %0, 1))";" in copy_first()
34 (0x7c00070c | (RA) << (31-15) | (RB) << (31-20) | (L) << (31-10) | (RC) << (31-31))
42 asm volatile(str(PASTE(0, %1, 0, 0))";" in paste()
43 "mfcr %0;" in paste()
55 asm volatile(str(PASTE(0, %1, 1, 1))";" in paste_last()
56 "mfcr %0;" in paste_last()
64 #define PPC_INST_COPY __COPY(0, 0, 0)
65 #define PPC_INST_COPY_FIRST __COPY(0, 0, 1)
[all …]
/linux/drivers/net/wireless/intel/iwlwifi/
H A Diwl-debug.h43 #define __IWL_ERR_DEV(d, mode, f, a...) \ argument
46 __iwl_err((d), mode, f, ## a); \
47 } while (0)
48 #define IWL_ERR_DEV(d, f, a...) \ argument
49 __IWL_ERR_DEV(d, IWL_ERR_MODE_REGULAR, f, ## a)
50 #define IWL_ERR(m, f, a...) \ argument
51 IWL_ERR_DEV((m)->dev, f, ## a)
52 #define IWL_ERR_LIMIT(m, f, a...) \ argument
53 __IWL_ERR_DEV((m)->dev, IWL_ERR_MODE_RATELIMIT, f, ## a)
54 #define IWL_WARN(m, f, a...) \ argument
[all …]
/linux/tools/perf/pmu-events/arch/powerpc/power9/
H A Dmarked.json3 "EventCode": "0x3013E",
5 …"BriefDescription": "Number of cycles the marked instruction is experiencing a stall while it is n…
8 "EventCode": "0x4F056",
10 …"BriefDescription": "A Page Directory Entry was reloaded to a level 1 page walk cache from beyond …
13 "EventCode": "0x24158",
18 "EventCode": "0x1E046",
20 …BriefDescription": "A Page Table Entry was loaded into the TLB with Shared (S) data from another c…
23 "EventCode": "0x3C04A",
25 …e was reloaded from another chip's memory on the same Node or Group ( Remote) due to a demand load"
28 "EventCode": "0x2C01C",
[all …]
/linux/drivers/scsi/esas2r/
H A Desas2r.h15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
38 * You should have received a copy of the GNU General Public License
115 #define ESAS2R_FWCOREDUMP_SZ 0x80000
117 #define ESAS2R_TARG_ID_INV 0xFFFF
120 #define ESAS2R_INT_DIS_MASK 0
134 /* macro to get the lowest nonzero bit of a value */
135 #define LOBIT(x) ((x) & (0 - (x)))
141 #define esas2r_read_register_dword(a, reg) \ argument
142 readl((void __iomem *)a->regs + (reg) + MW_REG_OFFSET_HWREG)
[all …]
/linux/lib/crypto/
H A Ddes.c31 0x00, 0x00, 0x40, 0x04, 0x10, 0x10, 0x50, 0x14,
32 0x04, 0x40, 0x44, 0x44, 0x14, 0x50, 0x54, 0x54,
33 0x02, 0x02, 0x42, 0x06, 0x12, 0x12, 0x52, 0x16,
34 0x06, 0x42, 0x46, 0x46, 0x16, 0x52, 0x56, 0x56,
35 0x80, 0x08, 0xc0, 0x0c, 0x90, 0x18, 0xd0, 0x1c,
36 0x84, 0x48, 0xc4, 0x4c, 0x94, 0x58, 0xd4, 0x5c,
37 0x82, 0x0a, 0xc2, 0x0e, 0x92, 0x1a, 0xd2, 0x1e,
38 0x86, 0x4a, 0xc6, 0x4e, 0x96, 0x5a, 0xd6, 0x5e,
39 0x20, 0x20, 0x60, 0x24, 0x30, 0x30, 0x70, 0x34,
40 0x24, 0x60, 0x64, 0x64, 0x34, 0x70, 0x74, 0x74,
[all …]
/linux/crypto/
H A Dmd5.c27 0xd4, 0x1d, 0x8c, 0xd9, 0x8f, 0x00, 0xb2, 0x04,
28 0xe9, 0x80, 0x09, 0x98, 0xec, 0xf8, 0x42, 0x7e,
42 u32 a, b, c, d; in md5_transform() local
44 a = hash[0]; in md5_transform()
49 MD5STEP(F1, a, b, c, d, in[0] + 0xd76aa478, 7); in md5_transform()
50 MD5STEP(F1, d, a, b, c, in[1] + 0xe8c7b756, 12); in md5_transform()
51 MD5STEP(F1, c, d, a, b, in[2] + 0x242070db, 17); in md5_transform()
52 MD5STEP(F1, b, c, d, a, in[3] + 0xc1bdceee, 22); in md5_transform()
53 MD5STEP(F1, a, b, c, d, in[4] + 0xf57c0faf, 7); in md5_transform()
54 MD5STEP(F1, d, a, b, c, in[5] + 0x4787c62a, 12); in md5_transform()
[all …]
/linux/arch/sparc/crypto/
H A Dopcodes.h9 #define FPD_ENCODE(x) (((x) >> 5) | ((x) & ~(0x20)))
12 #define RS2(x) (FPD_ENCODE(x) << 0)
15 #define IMM5_0(x) ((x) << 0)
18 #define CRC32C(a,b,c) \ argument
19 .word (F3F(2,0x36,0x147)|RS1(a)|RS2(b)|RD(c));
22 .word 0x81b02800;
24 .word 0x81b02820;
26 .word 0x81b02840;
28 .word 0x81b02860;
30 #define AES_EROUND01(a,b,c,d) \ argument
[all …]
/linux/arch/sh/kernel/cpu/sh4/
H A Dsoftfloat.c16 * of this code was written as part of a project to build a fixed-point vector
42 #define LIT64( a ) a##LL argument
71 bits64 extractFloat64Frac(float64 a);
72 flag extractFloat64Sign(float64 a);
73 int16 extractFloat64Exp(float64 a);
74 int16 extractFloat32Exp(float32 a);
75 flag extractFloat32Sign(float32 a);
76 bits32 extractFloat32Frac(float32 a);
78 void shift64RightJamming(bits64 a, int16 count, bits64 * zPtr);
80 void shift32RightJamming(bits32 a, int16 count, bits32 * zPtr);
[all …]
/linux/sound/pci/hda/
H A Dca0132_regs.h12 #define DSP_CHIP_OFFSET 0x100000
13 #define DSP_DBGCNTL_MODULE_OFFSET 0xE30
17 #define DSP_DBGCNTL_EXEC_LOBIT 0x0
18 #define DSP_DBGCNTL_EXEC_HIBIT 0x3
19 #define DSP_DBGCNTL_EXEC_MASK 0xF
21 #define DSP_DBGCNTL_SS_LOBIT 0x4
22 #define DSP_DBGCNTL_SS_HIBIT 0x7
23 #define DSP_DBGCNTL_SS_MASK 0xF0
25 #define DSP_DBGCNTL_STATE_LOBIT 0xA
26 #define DSP_DBGCNTL_STATE_HIBIT 0xD
[all …]
/linux/tools/testing/selftests/net/
H A Dfcnal-test.sh16 # ns-A | ns-B
23 # ns-A:
35 # ns-A to ns-C connection - only for VRF and same config
36 # as ns-A to ns-B
38 # server / client nomenclature relative to ns-A
44 VERBOSE=0
92 fips_enabled=0
198 echo "COMMAND: ${NSA_CMD} sysctl -q -w net.ipv4.ping_group_range='0 2147483647'"
201 ${NSA_CMD} sysctl -q -w net.ipv4.ping_group_range='0 2147483647'
215 if [ "$VERBOSE" = "1" -a -n "$out" ]; then
[all …]
/linux/tools/perf/pmu-events/arch/x86/skylake/
H A Dvirtual-memory.json4 "Counter": "0,1,2,3",
5 "EventCode": "0x08",
7 …"PublicDescription": "Counts demand data loads that caused a page walk of any page size (4K/2M/4M/…
9 "UMask": "0x1"
13 "Counter": "0,1,2,3",
14 "EventCode": "0x08",
18 "UMask": "0x20"
21 …"BriefDescription": "Cycles when at least one PMH is busy with a page walk for a load. EPT page wa…
22 "Counter": "0,1,2,3",
24 "EventCode": "0x08",
[all …]
/linux/tools/perf/pmu-events/arch/x86/skylakex/
H A Dvirtual-memory.json4 "Counter": "0,1,2,3",
5 "EventCode": "0x08",
7 …"PublicDescription": "Counts demand data loads that caused a page walk of any page size (4K/2M/4M/…
9 "UMask": "0x1"
13 "Counter": "0,1,2,3",
14 "EventCode": "0x08",
18 "UMask": "0x20"
21 …"BriefDescription": "Cycles when at least one PMH is busy with a page walk for a load. EPT page wa…
22 "Counter": "0,1,2,3",
24 "EventCode": "0x08",
[all …]
/linux/tools/perf/pmu-events/arch/x86/cascadelakex/
H A Dvirtual-memory.json4 "Counter": "0,1,2,3",
5 "EventCode": "0x08",
7 …"PublicDescription": "Counts demand data loads that caused a page walk of any page size (4K/2M/4M/…
9 "UMask": "0x1"
13 "Counter": "0,1,2,3",
14 "EventCode": "0x08",
18 "UMask": "0x20"
21 …"BriefDescription": "Cycles when at least one PMH is busy with a page walk for a load. EPT page wa…
22 "Counter": "0,1,2,3",
24 "EventCode": "0x08",
[all …]
/linux/arch/x86/crypto/
H A Dsha256-avx2-asm.S11 # This software is available to you under a choice of one of two
32 # MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
48 # This code schedules 2 blocks at a time, with 4 lanes per block
103 a = %eax define
117 _XMM_SAVE_SIZE = 0
122 _XFER = 0
140 # Rotate values of symbols a...h
150 b = a
151 a = TMP_ define
155 ################################### RND N + 0 ############################
[all …]

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