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/linux/drivers/gpu/drm/nouveau/nvkm/engine/device/
H A Dpci.c43 { 0x10de, 0x0010, NULL, { .tv_gpio = 4 } },
50 { 0x1462, 0x5710, NULL, { .tv_pin_mask = 0xc } },
57 { 0x19da, 0x1035, NULL, { .tv_pin_mask = 0xc } },
58 { 0x19da, 0x2035, NULL, { .tv_pin_mask = 0xc } },
64 { 0x10de, 0x0595, "Tesla T10 Processor" },
65 { 0x10de, 0x068f, "Tesla T10 Processor" },
66 { 0x10de, 0x0697, "Tesla M1060" },
67 { 0x10de, 0x0714, "Tesla M1060" },
68 { 0x10de, 0x0743, "Tesla M1060" },
74 { 0x106b, 0x00a7, "GeForce 8800 GS" },
[all …]
/linux/net/tipc/
H A Dmsg.h64 #define TIPC_CONN_MSG 0
146 #define TIPC_SKB_CB(__skb) ((struct tipc_skb_cb *)&((__skb)->cb[0]))
158 * --> Gap ACK blocks: <4, 5>, <11, 1>, <15, 4>, <20, 0>
173 * 31 16 15 0
205 static inline u32 msg_word(struct tipc_msg *m, u32 pos) in msg_word() argument
207 return ntohl(m->hdr[pos]); in msg_word()
210 static inline void msg_set_word(struct tipc_msg *m, u32 w, u32 val) in msg_set_word() argument
212 m->hdr[w] = htonl(val); in msg_set_word()
215 static inline u32 msg_bits(struct tipc_msg *m, u32 w, u32 pos, u32 mask) in msg_bits() argument
217 return (msg_word(m, w) >> pos) & mask; in msg_bits()
[all …]
/linux/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/
H A Dtable.c7 0x800, 0x8020D010,
8 0x804, 0x080112E0,
9 0x808, 0x0E028233,
10 0x80C, 0x12131113,
11 0x810, 0x20101263,
12 0x814, 0x020C3D10,
13 0x818, 0x03A00385,
14 0x820, 0x00000000,
15 0x824, 0x00030FE0,
16 0x828, 0x00000000,
[all …]
/linux/drivers/staging/rtl8723bs/hal/
H A DHalHWImg8723B_RF.c16 ((pDM_Odm->BoardType & BIT4) >> 4) << 0 | /* _GLNA */ in CheckPositive()
31 pDM_Odm->TypeGLNA << 0 | in CheckPositive()
40 ((cond1 & 0x0000F000) != 0) && in CheckPositive()
41 ((cond1 & 0x0000F000) != (driver1 & 0x0000F000)) in CheckPositive()
46 ((cond1 & 0x0F000000) != 0) && in CheckPositive()
47 ((cond1 & 0x0F000000) != (driver1 & 0x0F000000)) in CheckPositive()
53 cond1 &= 0x000F0FFF; in CheckPositive()
54 driver1 &= 0x000F0FFF; in CheckPositive()
57 u32 bitMask = 0; in CheckPositive()
59 if ((cond1 & 0x0F) == 0) /* BoardType is DONTCARE */ in CheckPositive()
[all …]
/linux/arch/alpha/include/asm/
H A Dcore_mcpcia.h58 * 00 00 Byte 1110 0x000
59 * 01 00 Byte 1101 0x020
60 * 10 00 Byte 1011 0x040
61 * 11 00 Byte 0111 0x060
63 * 00 01 Word 1100 0x008
64 * 01 01 Word 1001 0x028 <= Not supported in this code.
65 * 10 01 Word 0011 0x048
67 * 00 10 Tribyte 1000 0x010
68 * 01 10 Tribyte 0001 0x030
70 * 10 11 Longword 0000 0x058
[all …]
/linux/arch/mips/mm/
H A Duasm-mips.c24 #define RS_MASK 0x1f
26 #define RT_MASK 0x1f
28 #define SCIMM_MASK 0xfffff
32 #define M(a, b, c, d, e, f) \ macro
51 [insn_addiu] = {M(addiu_op, 0, 0, 0, 0, 0), RS | RT | SIMM},
52 [insn_addu] = {M(spec_op, 0, 0, 0, 0, addu_op), RS | RT | RD},
53 [insn_and] = {M(spec_op, 0, 0, 0, 0, and_op), RS | RT | RD},
54 [insn_andi] = {M(andi_op, 0, 0, 0, 0, 0), RS | RT | UIMM},
55 [insn_bbit0] = {M(lwc2_op, 0, 0, 0, 0, 0), RS | RT | BIMM},
56 [insn_bbit1] = {M(swc2_op, 0, 0, 0, 0, 0), RS | RT | BIMM},
[all …]
/linux/drivers/media/test-drivers/vidtv/
H A Dvidtv_mux.c34 *vidtv_mux_get_pid_ctx(struct vidtv_mux *m, u16 pid) in vidtv_mux_get_pid_ctx() argument
38 hash_for_each_possible(m->pid_ctx, ctx, h, pid) in vidtv_mux_get_pid_ctx()
45 *vidtv_mux_create_pid_ctx_once(struct vidtv_mux *m, u16 pid) in vidtv_mux_create_pid_ctx_once() argument
49 ctx = vidtv_mux_get_pid_ctx(m, pid); in vidtv_mux_create_pid_ctx_once()
58 ctx->cc = 0; in vidtv_mux_create_pid_ctx_once()
59 hash_add(m->pid_ctx, &ctx->h, pid); in vidtv_mux_create_pid_ctx_once()
64 static void vidtv_mux_pid_ctx_destroy(struct vidtv_mux *m) in vidtv_mux_pid_ctx_destroy() argument
70 hash_for_each_safe(m->pid_ctx, bkt, tmp, ctx, h) { in vidtv_mux_pid_ctx_destroy()
76 static int vidtv_mux_pid_ctx_init(struct vidtv_mux *m) in vidtv_mux_pid_ctx_init() argument
78 struct vidtv_psi_table_pat_program *p = m->si.pat->program; in vidtv_mux_pid_ctx_init()
[all …]
/linux/fs/
H A Dseq_file.c28 static void seq_set_overflow(struct seq_file *m) in seq_set_overflow() argument
30 m->count = m->size; in seq_set_overflow()
52 * returns 0 in case of success and negative number in case of error.
86 return 0; in seq_open()
90 static int traverse(struct seq_file *m, loff_t offset) in traverse() argument
92 loff_t pos = 0; in traverse()
93 int error = 0; in traverse()
96 m->index = 0; in traverse()
97 m->count = m->from = 0; in traverse()
99 return 0; in traverse()
[all …]
/linux/drivers/gpu/drm/amd/amdkfd/
H A Dkfd_mqd_manager_v12.c47 struct v12_compute_mqd *m; in update_cu_mask() local
48 uint32_t se_mask[KFD_MAX_NUM_SE] = {0}; in update_cu_mask()
54 minfo->cu_mask.ptr, minfo->cu_mask.count, se_mask, 0); in update_cu_mask()
56 m = get_mqd(mqd); in update_cu_mask()
57 m->compute_static_thread_mgmt_se0 = se_mask[0]; in update_cu_mask()
58 m->compute_static_thread_mgmt_se1 = se_mask[1]; in update_cu_mask()
59 m->compute_static_thread_mgmt_se2 = se_mask[2]; in update_cu_mask()
60 m->compute_static_thread_mgmt_se3 = se_mask[3]; in update_cu_mask()
61 m->compute_static_thread_mgmt_se4 = se_mask[4]; in update_cu_mask()
62 m->compute_static_thread_mgmt_se5 = se_mask[5]; in update_cu_mask()
[all …]
H A Dkfd_mqd_manager_v11.c47 struct v11_compute_mqd *m; in update_cu_mask() local
48 uint32_t se_mask[KFD_MAX_NUM_SE] = {0}; in update_cu_mask()
55 m = get_mqd(mqd); in update_cu_mask()
59 (minfo->update_flag & UPDATE_FLAG_DBG_WA_ENABLE) ? 0xffff : 0xffffffff; in update_cu_mask()
61 m->compute_static_thread_mgmt_se0 = wa_mask; in update_cu_mask()
62 m->compute_static_thread_mgmt_se1 = wa_mask; in update_cu_mask()
63 m->compute_static_thread_mgmt_se2 = wa_mask; in update_cu_mask()
64 m->compute_static_thread_mgmt_se3 = wa_mask; in update_cu_mask()
65 m->compute_static_thread_mgmt_se4 = wa_mask; in update_cu_mask()
66 m->compute_static_thread_mgmt_se5 = wa_mask; in update_cu_mask()
[all …]
H A Dkfd_mqd_manager_v9.c65 struct v9_mqd *m; in update_cu_mask() local
66 uint32_t se_mask[KFD_MAX_NUM_SE] = {0}; in update_cu_mask()
74 m = get_mqd(mqd); in update_cu_mask()
76 m->compute_static_thread_mgmt_se0 = se_mask[0]; in update_cu_mask()
77 m->compute_static_thread_mgmt_se1 = se_mask[1]; in update_cu_mask()
78 m->compute_static_thread_mgmt_se2 = se_mask[2]; in update_cu_mask()
79 m->compute_static_thread_mgmt_se3 = se_mask[3]; in update_cu_mask()
82 m->compute_static_thread_mgmt_se4 = se_mask[4]; in update_cu_mask()
83 m->compute_static_thread_mgmt_se5 = se_mask[5]; in update_cu_mask()
84 m->compute_static_thread_mgmt_se6 = se_mask[6]; in update_cu_mask()
[all …]
H A Dkfd_mqd_manager_v10.c48 struct v10_compute_mqd *m; in update_cu_mask() local
49 uint32_t se_mask[4] = {0}; /* 4 is the max # of SEs */ in update_cu_mask()
55 minfo->cu_mask.ptr, minfo->cu_mask.count, se_mask, 0); in update_cu_mask()
57 m = get_mqd(mqd); in update_cu_mask()
58 m->compute_static_thread_mgmt_se0 = se_mask[0]; in update_cu_mask()
59 m->compute_static_thread_mgmt_se1 = se_mask[1]; in update_cu_mask()
60 m->compute_static_thread_mgmt_se2 = se_mask[2]; in update_cu_mask()
61 m->compute_static_thread_mgmt_se3 = se_mask[3]; in update_cu_mask()
64 m->compute_static_thread_mgmt_se0, in update_cu_mask()
65 m->compute_static_thread_mgmt_se1, in update_cu_mask()
[all …]
H A Dkfd_mqd_manager_vi.c36 #define CP_MQD_CONTROL__PRIV_STATE__SHIFT 0x8
51 struct vi_mqd *m; in update_cu_mask() local
52 uint32_t se_mask[4] = {0}; /* 4 is the max # of SEs */ in update_cu_mask()
58 minfo->cu_mask.ptr, minfo->cu_mask.count, se_mask, 0); in update_cu_mask()
60 m = get_mqd(mqd); in update_cu_mask()
61 m->compute_static_thread_mgmt_se0 = se_mask[0]; in update_cu_mask()
62 m->compute_static_thread_mgmt_se1 = se_mask[1]; in update_cu_mask()
63 m->compute_static_thread_mgmt_se2 = se_mask[2]; in update_cu_mask()
64 m->compute_static_thread_mgmt_se3 = se_mask[3]; in update_cu_mask()
67 m->compute_static_thread_mgmt_se0, in update_cu_mask()
[all …]
H A Dkfd_mqd_manager_cik.c48 struct cik_mqd *m; in update_cu_mask() local
49 uint32_t se_mask[4] = {0}; /* 4 is the max # of SEs */ in update_cu_mask()
55 minfo->cu_mask.ptr, minfo->cu_mask.count, se_mask, 0); in update_cu_mask()
57 m = get_mqd(mqd); in update_cu_mask()
58 m->compute_static_thread_mgmt_se0 = se_mask[0]; in update_cu_mask()
59 m->compute_static_thread_mgmt_se1 = se_mask[1]; in update_cu_mask()
60 m->compute_static_thread_mgmt_se2 = se_mask[2]; in update_cu_mask()
61 m->compute_static_thread_mgmt_se3 = se_mask[3]; in update_cu_mask()
64 m->compute_static_thread_mgmt_se0, in update_cu_mask()
65 m->compute_static_thread_mgmt_se1, in update_cu_mask()
[all …]
/linux/fs/proc/
H A Darray.c12 * Pauline Middelink : Made cmdline,envline only break at '\0's, to
99 void proc_task_name(struct seq_file *m, struct task_struct *p, bool escape) in proc_task_name() argument
115 seq_escape_str(m, tcomm, ESCAPE_SPACE | ESCAPE_SPECIAL, "\n\\"); in proc_task_name()
117 seq_printf(m, "%.64s", tcomm); in proc_task_name()
129 "R (running)", /* 0x00 */
130 "S (sleeping)", /* 0x01 */
131 "D (disk sleep)", /* 0x02 */
132 "T (stopped)", /* 0x04 */
133 "t (tracing stop)", /* 0x08 */
134 "X (dead)", /* 0x10 */
[all …]
/linux/include/linux/isdn/
H A Dcapiutil.h19 #define CAPIMSG_U8(m, off) (m[off]) argument
20 #define CAPIMSG_U16(m, off) (m[off]|(m[(off)+1]<<8)) argument
21 #define CAPIMSG_U32(m, off) (m[off]|(m[(off)+1]<<8)|(m[(off)+2]<<16)|(m[(off)+3]<<24)) argument
22 #define CAPIMSG_LEN(m) CAPIMSG_U16(m,0) argument
23 #define CAPIMSG_APPID(m) CAPIMSG_U16(m,2) argument
24 #define CAPIMSG_COMMAND(m) CAPIMSG_U8(m,4) argument
25 #define CAPIMSG_SUBCOMMAND(m) CAPIMSG_U8(m,5) argument
26 #define CAPIMSG_CMD(m) (((m[4])<<8)|(m[5])) argument
27 #define CAPIMSG_MSGID(m) CAPIMSG_U16(m,6) argument
28 #define CAPIMSG_CONTROLLER(m) (m[8] & 0x7f) argument
[all …]
/linux/drivers/gpu/drm/msm/disp/dpu1/
H A Dmsm_media_info.h20 * YUV 4:2:0 image with a plane of 8 bit Y samples followed
58 * YUV 4:2:0 image with a plane of 8 bit Y samples followed
95 * Two YUV 4:2:0 images/views one after the other
146 * View_1 begin at: 0 (zero)
184 * M M M M M M M M M M M M . . ^ ^
185 * M M M M M M M M M M M M . . | |
186 * M M M M M M M M M M M M . . Height |
187 * M M M M M M M M M M M M . . | Meta_Y_Scanlines
188 * M M M M M M M M M M M M . . | |
189 * M M M M M M M M M M M M . . | |
[all …]
/linux/kernel/locking/
H A Dlockdep_proc.c35 for (idx = 0, class = lock_classes; idx <= max_lock_class_idx; \
38 static void *l_next(struct seq_file *m, void *v, loff_t *pos) in l_next() argument
47 static void *l_start(struct seq_file *m, loff_t *pos) in l_start() argument
56 static void l_stop(struct seq_file *m, void *v) in l_stop() argument
60 static void print_name(struct seq_file *m, struct lock_class *class) in print_name() argument
67 seq_printf(m, "%s", name); in print_name()
69 seq_printf(m, "%s", name); in print_name()
71 seq_printf(m, "#%d", class->name_version); in print_name()
73 seq_printf(m, "/%d", class->subclass); in print_name()
77 static int l_show(struct seq_file *m, void *v) in l_show() argument
[all …]
/linux/net/9p/
H A Dtrans_fd.c157 static void p9_mux_poll_stop(struct p9_conn *m) in p9_mux_poll_stop() argument
162 for (i = 0; i < ARRAY_SIZE(m->poll_wait); i++) { in p9_mux_poll_stop()
163 struct p9_poll_wait *pwait = &m->poll_wait[i]; in p9_mux_poll_stop()
172 list_del_init(&m->poll_pending_link); in p9_mux_poll_stop()
180 * @m: mux data
185 static void p9_conn_cancel(struct p9_conn *m, int err) in p9_conn_cancel() argument
190 p9_debug(P9_DEBUG_ERROR, "mux %p err %d\n", m, err); in p9_conn_cancel()
192 spin_lock(&m->req_lock); in p9_conn_cancel()
194 if (m->err) { in p9_conn_cancel()
195 spin_unlock(&m->req_lock); in p9_conn_cancel()
[all …]
/linux/drivers/md/
H A Ddm-mpath.c36 #define QUEUE_IF_NO_PATH_TIMEOUT_DEFAULT 0
62 struct multipath *m; /* Owning multipath instance */ member
128 #define MPATHF_QUEUE_IO 0 /* Must we queue all I/O? */
136 static bool mpath_double_check_test_bit(int MPATHF_bit, struct multipath *m) in mpath_double_check_test_bit() argument
138 bool r = test_bit(MPATHF_bit, &m->flags); in mpath_double_check_test_bit()
143 spin_lock_irqsave(&m->lock, flags); in mpath_double_check_test_bit()
144 r = test_bit(MPATHF_bit, &m->flags); in mpath_double_check_test_bit()
145 spin_unlock_irqrestore(&m->lock, flags); in mpath_double_check_test_bit()
212 struct multipath *m; in alloc_multipath() local
214 m = kzalloc(sizeof(*m), GFP_KERNEL); in alloc_multipath()
[all …]
/linux/drivers/mfd/
H A Dmcp-sa11x0.c35 #define MCCR0(m) ((m)->base0 + 0x00) argument
36 #define MCDR0(m) ((m)->base0 + 0x08) argument
37 #define MCDR1(m) ((m)->base0 + 0x0c) argument
38 #define MCDR2(m) ((m)->base0 + 0x10) argument
39 #define MCSR(m) ((m)->base0 + 0x18) argument
40 #define MCCR1(m) ((m)->base1 + 0x00) argument
47 struct mcp_sa11x0 *m = priv(mcp); in mcp_sa11x0_set_telecom_divisor() local
51 m->mccr0 &= ~0x00007f00; in mcp_sa11x0_set_telecom_divisor()
52 m->mccr0 |= divisor << 8; in mcp_sa11x0_set_telecom_divisor()
53 writel_relaxed(m->mccr0, MCCR0(m)); in mcp_sa11x0_set_telecom_divisor()
[all …]
/linux/arch/mips/kernel/
H A Dproc.c22 * No lock; only written during early bootup by CPU 0.
36 static int show_cpuinfo(struct seq_file *m, void *v) in show_cpuinfo() argument
47 return 0; in show_cpuinfo()
53 if (n == 0) { in show_cpuinfo()
54 seq_printf(m, "system type\t\t: %s\n", get_system_type()); in show_cpuinfo()
56 seq_printf(m, "machine\t\t\t: %s\n", in show_cpuinfo()
60 seq_printf(m, "processor\t\t: %ld\n", n); in show_cpuinfo()
63 seq_printf(m, fmt, __cpu_name[n], in show_cpuinfo()
64 (version >> 4) & 0x0f, version & 0x0f, in show_cpuinfo()
65 (fp_vers >> 4) & 0x0f, fp_vers & 0x0f); in show_cpuinfo()
[all …]
/linux/arch/x86/kvm/
H A Dfpu.h10 #define sse128_lo(x) ({ __sse128_u t; t.vec = x; t.as_u64[0]; })
12 #define sse128_l0(x) ({ __sse128_u t; t.vec = x; t.as_u32[0]; })
16 #define sse128(lo, hi) ({ __sse128_u t; t.as_u64[0] = lo; t.as_u64[1] = hi; t.vec; })
21 case 0: asm("movdqa %%xmm0, %0" : "=m"(*data)); break; in _kvm_read_sse_reg()
22 case 1: asm("movdqa %%xmm1, %0" : "=m"(*data)); break; in _kvm_read_sse_reg()
23 case 2: asm("movdqa %%xmm2, %0" : "=m"(*data)); break; in _kvm_read_sse_reg()
24 case 3: asm("movdqa %%xmm3, %0" : "=m"(*data)); break; in _kvm_read_sse_reg()
25 case 4: asm("movdqa %%xmm4, %0" : "=m"(*data)); break; in _kvm_read_sse_reg()
26 case 5: asm("movdqa %%xmm5, %0" : "=m"(*data)); break; in _kvm_read_sse_reg()
27 case 6: asm("movdqa %%xmm6, %0" : "=m"(*data)); break; in _kvm_read_sse_reg()
[all …]
/linux/fs/erofs/
H A Dzmap.c23 static int z_erofs_load_full_lcluster(struct z_erofs_maprecorder *m, in z_erofs_load_full_lcluster() argument
26 struct inode *const inode = m->inode; in z_erofs_load_full_lcluster()
34 di = erofs_read_metabuf(&m->map->buf, inode->i_sb, pos, EROFS_KMAP); in z_erofs_load_full_lcluster()
37 m->lcn = lcn; in z_erofs_load_full_lcluster()
38 m->nextpackoff = pos + sizeof(struct z_erofs_lcluster_index); in z_erofs_load_full_lcluster()
41 m->type = advise & Z_EROFS_LI_LCLUSTER_TYPE_MASK; in z_erofs_load_full_lcluster()
42 if (m->type == Z_EROFS_LCLUSTER_TYPE_NONHEAD) { in z_erofs_load_full_lcluster()
43 m->clusterofs = 1 << vi->z_logical_clusterbits; in z_erofs_load_full_lcluster()
44 m->delta[0] = le16_to_cpu(di->di_u.delta[0]); in z_erofs_load_full_lcluster()
45 if (m->delta[0] & Z_EROFS_LI_D0_CBLKCNT) { in z_erofs_load_full_lcluster()
[all …]
/linux/arch/powerpc/mm/ptdump/
H A Dbats.c15 static void bat_show_603(struct seq_file *m, int idx, u32 lower, u32 upper, bool is_d) in bat_show_603() argument
17 u32 bepi = upper & 0xfffe0000; in bat_show_603()
18 u32 bl = (upper >> 2) & 0x7ff; in bat_show_603()
23 seq_printf(m, "%d: ", idx); in bat_show_603()
24 if (k == 0) { in bat_show_603()
25 seq_puts(m, " -\n"); in bat_show_603()
29 seq_printf(m, "0x%08x-0x%08x ", bepi, bepi + size - 1); in bat_show_603()
31 seq_printf(m, "0x%016llx ", brpn); in bat_show_603()
33 seq_printf(m, "0x%08x ", brpn); in bat_show_603()
35 pt_dump_size(m, size); in bat_show_603()
[all …]

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