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/linux/arch/arm/boot/dts/ti/omap/
H A Domap36xx-clocks.dtsi8 dpll4_ck: dpll4_ck@d00 {
9 #clock-cells = <0>;
12 reg = <0x0d00>, <0x0d20>, <0x0d44>, <0x0d30>;
15 dpll4_m5x2_ck: dpll4_m5x2_ck@d00 {
16 #clock-cells = <0>;
19 ti,bit-shift = <0x1e>;
20 reg = <0x0d00>;
25 dpll4_m2x2_ck: dpll4_m2x2_ck@d00 {
26 #clock-cells = <0>;
29 ti,bit-shift = <0x1b>;
[all …]
H A Domap3xxx-clocks.dtsi9 #clock-cells = <0>;
15 #clock-cells = <0>;
18 reg = <0x0d40>;
22 #clock-cells = <0>;
27 reg = <0x1270>;
32 #clock-cells = <0>;
35 reg = <0x0d70>;
40 #clock-cells = <0>;
48 #clock-cells = <0>;
56 #clock-cells = <0>;
[all …]
/linux/drivers/zorro/
H A Dzorro.ids16 0a00 [SCSI Host Adapter]
36 0a00 A590/A2052/A2058/A2091 [RAM Expansion]
58 0c00 A1000 [SCSI Host Adapter]
59 0e00 Escort [SCSI Host Adapter]
97 0a00 A4066 [Ethernet Card]
106 0a00 500RX/2000 [RAM Expansion]
107 0b00 2400zi [Modem]
108 0c00 500XP/SupraDrive WordSync [SCSI Host Adapter]
109 0d00 SupraDrive WordSync II [SCSI Host Adapter]
125 0e00 DKM 3128 [RAM Expansion]
[all …]
/linux/Documentation/devicetree/bindings/timer/
H A Dralink,cevt-systick.yaml31 systick@d00 {
33 reg = <0xd00 0x10>;
/linux/Documentation/devicetree/bindings/sound/
H A Dimg,spdif-out.txt7 - #sound-dai-cells : Must be equal to 0
32 spdif_out: spdif-out@18100d00 {
34 reg = <0x18100D00 0x100>;
36 dmas = <&mdc 14 0xffffffff 0>;
43 #sound-dai-cells = <0>;
/linux/arch/powerpc/boot/dts/
H A Dcm5200.dts55 phy0: ethernet-phy@0 {
56 reg = <0>;
64 i2c@3d00 {
76 flash@0,0 {
78 reg = <0 0 0x2000000>;
H A Da3m071.dts26 ranges = <0 0xf0000000 0x0000c000>;
27 reg = <0xf0000000 0x00000100>;
28 bus-frequency = <0>; /* From boot loader */
29 system-frequency = <0>; /* From boot loader */
41 reg = <0x2000 0x100>;
42 interrupts = <2 1 0>;
63 reg = <0x2c00 0x100>;
64 interrupts = <2 4 0>;
73 reg = <0x03>;
81 i2c@3d00 {
[all …]
H A Duc101.dts75 phy0: ethernet-phy@0 {
77 reg = <0>;
81 i2c@3d00 {
91 reg = <0x2c>;
95 reg = <0x51>;
105 ranges = <0 0 0xff800000 0x00800000
106 1 0 0x80000000 0x00800000
107 3 0 0x80000000 0x00800000>;
109 flash@0,0 {
111 reg = <0 0 0x00800000>;
[all …]
H A Dmotionpro.dts67 i2c@3d00 {
74 reg = <0x68>;
80 reg = <0x8000 0x4000>;
89 ranges = <0 0 0xff000000 0x01000000
90 1 0 0x50000000 0x00010000
91 2 0 0x50010000 0x00010000
92 3 0 0x50020000 0x00010000>;
95 kollmorgen@1,0 {
97 reg = <1 0 0x10000>;
98 interrupts = <1 1 0>;
[all …]
H A Ddigsy_mtc.dts19 memory@0 {
20 reg = <0x00000000 0x02000000>; // 32MB
57 phy0: ethernet-phy@0 {
58 reg = <0>;
62 i2c@3d00 {
65 reg = <0x50>;
70 reg = <0x56>;
75 reg = <0x68>;
85 interrupt-map-mask = <0xf800 0 0 7>;
86 interrupt-map = <0xc000 0 0 1 &mpc5200_pic 0 0 3
[all …]
H A Da4m072.dts27 ranges = <0 0xf0000000 0x0000c000>;
28 reg = <0xf0000000 0x00000100>;
29 bus-frequency = <0>; /* From boot loader */
30 system-frequency = <0>; /* From boot loader */
33 fsl,init-ext-48mhz-en = <0x0>;
34 fsl,init-fd-enable = <0x01>;
35 fsl,init-fd-counters = <0x3333>;
44 reg = <0x2000 0x100>;
45 interrupts = <2 1 0>;
50 reg = <0x2200 0x100>;
[all …]
H A Dmucmc52.dts78 phy0: ethernet-phy@0 {
80 reg = <0>;
84 i2c@3d00 {
91 reg = <0x2c>;
95 reg = <0x51>;
101 interrupt-map-mask = <0xf800 0 0 7>;
103 /* IDSEL 0x10 */
104 0x8000 0 0 1 &mpc5200_pic 0 3 3
105 0x8000 0 0 2 &mpc5200_pic 0 3 3
106 0x8000 0 0 3 &mpc5200_pic 0 2 3
[all …]
H A Dcharon.dts23 #size-cells = <0>;
25 PowerPC,5200@0 {
27 reg = <0>;
30 d-cache-size = <0x4000>; // L1, 16K
31 i-cache-size = <0x4000>; // L1, 16K
32 timebase-frequency = <0>; // from bootloader
33 bus-frequency = <0>; // from bootloader
34 clock-frequency = <0>; // from bootloader
38 memory@0 {
40 reg = <0x00000000 0x08000000>; // 128MB
[all …]
H A Dlite5200.dts20 #size-cells = <0>;
22 PowerPC,5200@0 {
24 reg = <0>;
27 d-cache-size = <0x4000>; // L1, 16K
28 i-cache-size = <0x4000>; // L1, 16K
29 timebase-frequency = <0>; // from bootloader
30 bus-frequency = <0>; // from bootloader
31 clock-frequency = <0>; // from bootloader
35 memory@0 {
37 reg = <0x00000000 0x04000000>; // 64MB
[all …]
H A Dmpc5200b.dtsi21 #size-cells = <0>;
23 powerpc: PowerPC,5200@0 {
25 reg = <0>;
28 d-cache-size = <0x4000>; // L1, 16K
29 i-cache-size = <0x4000>; // L1, 16K
30 timebase-frequency = <0>; // from bootloader
31 bus-frequency = <0>; // from bootloader
32 clock-frequency = <0>; // from bootloader
36 memory: memory@0 {
38 reg = <0x00000000 0x04000000>; // 64MB
[all …]
/linux/Documentation/devicetree/bindings/reset/
H A Dimg,pistachio-reset.txt26 reg = <0x18148000 0x1000>;
47 spdif_out: spdif-out@18100d00 {
/linux/Documentation/devicetree/bindings/gpio/
H A D8xxx_gpio.txt48 reg = <0xc00 0x100>;
50 interrupts = <74 0x8>;
56 gpio2: gpio-controller@d00 {
59 reg = <0xd00 0x100>;
61 interrupts = <75 0x8>;
67 funkyfpga@0 {
/linux/Documentation/arch/x86/
H A Dzero-page.rst25 0A0/010 ALL sys_desc_table System description table (struct sys_desc_table),
27 0B0/010 ALL olpc_ofw_header OLPC's OpenFirmware CIF and friends
28 0C0/004 ALL ext_ramdisk_image ramdisk_image high 32bits
29 0C4/004 ALL ext_ramdisk_size ramdisk_size high 32bits
30 0C8/004 ALL ext_cmd_line_ptr cmd_line_ptr high 32bits
46 D00/1EC ALL eddbuf EDD data (array of struct edd_info)
/linux/Documentation/devicetree/bindings/i2c/
H A Di2c-mpc.yaml69 #size-cells = <0>;
71 reg = <0x1740 0x20>;
72 interrupts = <11 0x8>;
79 i2c@3d00 {
81 #size-cells = <0>;
83 reg = <0x3d00 0x40>;
84 interrupts = <2 15 0>;
93 #size-cells = <0>;
95 reg = <0x3100 0x100>;
/linux/Documentation/devicetree/bindings/clock/ti/
H A Dgate.txt31 - #clock-cells : from common clock binding; shall be set to 0
45 #clock-cells = <0>;
48 reg = <0x0a00>;
53 #clock-cells = <0>;
56 reg = <0x0a00>;
61 #clock-cells = <0>;
64 reg = <0x0e00>;
65 ti,bit-shift = <0>;
69 #clock-cells = <0>;
72 reg = <0x059c>;
[all …]
/linux/arch/mips/boot/dts/ralink/
H A Dmt7628a.dtsi10 #size-cells = <0>;
12 cpu@0 {
15 reg = <0>;
25 #address-cells = <0>;
33 reg = <0x10000000 0x200000>;
34 ranges = <0x0 0x10000000 0x1FFFFF>;
39 sysc: system-controller@0 {
41 reg = <0x0 0x60>;
46 reg = <0x60 0x8>;
48 #size-cells = <0>;
[all …]
/linux/arch/mips/boot/dts/brcm/
H A Dbcm7125.dtsi9 #size-cells = <0>;
13 cpu@0 {
16 reg = <0>;
31 #address-cells = <0>;
41 #clock-cells = <0>;
47 #clock-cells = <0>;
57 ranges = <0 0x10000000 0x01000000>;
61 reg = <0x441400 0x30>, <0x441600 0x30>;
72 reg = <0x401800 0x30>;
81 reg = <0x400000 0xdc>;
[all …]
H A Dbcm7420.dtsi9 #size-cells = <0>;
13 cpu@0 {
16 reg = <0>;
31 #address-cells = <0>;
41 #clock-cells = <0>;
47 #clock-cells = <0>;
57 ranges = <0 0x10000000 0x01000000>;
61 reg = <0x441400 0x30>, <0x441600 0x30>;
72 reg = <0x401800 0x30>;
81 reg = <0x400000 0xdc>;
[all …]
/linux/Documentation/devicetree/bindings/soc/qcom/
H A Dqcom,rpmh-rsc.yaml78 enum: [ 0, 1, 2, 3 ]
97 - const: drv-0
115 '^regulators(-[0-9])?$':
133 // For a TCS whose RSC base address is 0x179C0000 and is at a DRV id of
134 // 2, the register offsets for DRV2 start at 0D00, the register
136 // DRV0: 0x179C0000
137 // DRV2: 0x179C0000 + 0x10000 = 0x179D0000
138 // DRV2: 0x179C0000 + 0x10000 * 2 = 0x179E0000
139 // TCS-OFFSET: 0xD00
145 reg = <0x179c0000 0x10000>,
[all …]
/linux/Documentation/arch/m68k/
H A Dbuddha-driver.rst21 product number: 0 (42 for Catweasel Z-II)
22 Serial number: 0
41 $0-$7e Autokonfig-space, see Z-II docs.
48 $800-$8ff IDE-Select 0 (Port 0, Register set 0)
50 $900-$9ff IDE-Select 1 (Port 0, Register set 1)
52 $a00-$aff IDE-Select 2 (Port 1, Register set 0)
56 $c00-$cff IDE-Select 4 (Port 2, Register set 0,
59 $d00-$dff IDE-Select 5 (Port 3, Register set 1,
67 level of the IRQ-line of IDE port 0.
98 chip. The addresses $0 to $fff of the rom
[all …]

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