Lines Matching +full:0 +full:d00

31 - #clock-cells : from common clock binding; shall be set to 0
45 		#clock-cells = <0>;
48 		reg = <0x0a00>;
53 		#clock-cells = <0>;
56 		reg = <0x0a00>;
61 		#clock-cells = <0>;
64 		reg = <0x0e00>;
65 		ti,bit-shift = <0>;
69 		#clock-cells = <0>;
72 		reg = <0x059c>;
77 		#clock-cells = <0>;
82 	dpll4_m2x2_ck: dpll4_m2x2_ck@48004d00 {
83 		#clock-cells = <0>;
86 		ti,bit-shift = <0x1b>;
87 		reg = <0x0d00>;
92 		#clock-cells = <0>;
96 		reg = <0x0200>;
100 		#clock-cells = <0>;
104 		reg = <0x0070>;