Lines Matching +full:0 +full:d00

78           enum: [ 0, 1, 2, 3 ]
97       - const: drv-0
115   '^regulators(-[0-9])?$':
133     // For a TCS whose RSC base address is 0x179C0000 and is at a DRV id of
134     // 2, the register offsets for DRV2 start at 0D00, the register
136     // DRV0: 0x179C0000
137     // DRV2: 0x179C0000 + 0x10000 = 0x179D0000
138     // DRV2: 0x179C0000 + 0x10000 * 2 = 0x179E0000
139     // TCS-OFFSET: 0xD00
145         reg = <0x179c0000 0x10000>,
146               <0x179d0000 0x10000>,
147               <0x179e0000 0x10000>;
148         reg-names = "drv-0", "drv-1", "drv-2";
153         qcom,tcs-offset = <0xd00>;
163     // For a TCS whose RSC base address is 0xAF20000 and is at DRV id of 0, the
166     // DRV0: 0xAF20000
167     // TCS-OFFSET: 0x1C00
173         reg = <0xaf20000 0x10000>;
174         reg-names = "drv-0";
177         qcom,tcs-offset = <0x1c00>;
178         qcom,drv-id = <0>;
179         qcom,tcs-config = <ACTIVE_TCS  0>,
182                           <CONTROL_TCS 0>;
193         reg = <0x18200000 0x10000>,
194               <0x18210000 0x10000>,
195               <0x18220000 0x10000>;
196         reg-names = "drv-0", "drv-1", "drv-2";
201         qcom,tcs-offset = <0xd00>;
206                           <CONTROL_TCS 0>;