Home
last modified time | relevance | path

Searched +full:0 +full:- +full:64 (Results 1 – 25 of 1131) sorted by relevance

12345678910>>...46

/freebsd/sys/contrib/device-tree/src/arm/nvidia/
H A Dtegra30-peripherals-opp.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 core_opp_table: opp-table-core {
5 compatible = "operating-points-v2";
6 opp-shared;
8 core_opp_950: opp-950000 {
9 opp-microvolt = <950000 950000 1350000>;
10 opp-level = <950000>;
13 core_opp_1000: opp-1000000 {
14 opp-microvolt = <1000000 1000000 1350000>;
15 opp-level = <1000000>;
[all …]
H A Dtegra124-peripherals-opp.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 emc_icc_dvfs_opp_table: opp-table-emc {
5 compatible = "operating-points-v2";
7 opp-12750000-800 {
8 opp-microvolt = <800000 800000 1150000>;
9 opp-hz = /bits/ 64 <12750000>;
10 opp-supported-hw = <0x0003>;
13 opp-12750000-950 {
14 opp-microvolt = <950000 950000 1150000>;
15 opp-hz = /bits/ 64 <12750000>;
[all …]
H A Dtegra20-peripherals-opp.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 core_opp_table: opp-table-core {
5 compatible = "operating-points-v2";
6 opp-shared;
8 core_opp_950: opp-950000 {
9 opp-microvolt = <950000 950000 1300000>;
10 opp-level = <950000>;
13 core_opp_1000: opp-1000000 {
14 opp-microvolt = <1000000 1000000 1300000>;
15 opp-level = <1000000>;
[all …]
H A Dtegra30-cpu-opp.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 cpu0_opp_table: opp-table-cpu0 {
5 compatible = "operating-points-v2";
6 opp-shared;
8 opp-51000000-800 {
9 clock-latency-ns = <100000>;
10 opp-supported-hw = <0x1F 0x31FE>;
11 opp-hz = /bits/ 64 <51000000>;
14 opp-51000000-850 {
15 clock-latency-ns = <100000>;
[all …]
H A Dtegra20-cpu-opp.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 cpu0_opp_table: opp-table-cpu0 {
5 compatible = "operating-points-v2";
6 opp-shared;
8 opp-216000000-750 {
9 clock-latency-ns = <400000>;
10 opp-supported-hw = <0x0F 0x0003>;
11 opp-hz = /bits/ 64 <216000000>;
12 opp-suspend;
15 opp-216000000-800 {
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/nvidia/
H A Dtegra132-peripherals-opp.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 emc_icc_dvfs_opp_table: opp-table-dvfs0 {
6 compatible = "operating-points-v2";
8 opp-12750000-800 {
9 opp-microvolt = <800000 800000 1150000>;
10 opp-hz = /bits/ 64 <12750000>;
11 opp-supported-hw = <0x0003>;
14 opp-12750000-950 {
15 opp-microvolt = <950000 950000 1150000>;
16 opp-hz = /bits/ 64 <12750000>;
[all …]
/freebsd/cddl/contrib/opensolaris/cmd/dtrace/test/tst/common/aggs/
H A Dtst.quantmany.d.out3 value ------------- Distribution ------------- count
4 0 | 0
7 4 | 0
10 value ------------- Distribution ------------- count
11 -4 | 0
12 -2 @@@@| -2
13 -1 | 0
14 0 | 0
18 8 | 0
21 value ------------- Distribution ------------- count
[all …]
/freebsd/sbin/pfctl/
H A Dpf.os3 # -------------------------
7 # (C) Copyright 2000-2003 by Michal Zalewski <lcamtuf@coredump.cx>
34 # - Window size (WSS) - a highly OS dependent setting used for TCP/IP
53 # - Overall packet size - a function of all IP and TCP options and bugs.
57 # - Initial TTL - We check the actual TTL of a received packet. It can't
61 # NEW SIGNATURE: *Never* copy TTL from a p0f-reported signature literally.
65 # 32, 64, 128, or 255, but it should be noted that some obscure devices
70 # - Don't fragment flag (DF) - some modern OSes set this to implement PMTU
75 # - Maximum segment size (MSS) - this setting is usually link-dependent. P0f
84 # - Window scaling (WSCALE) - this feature is used to scale WSS.
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/qcom/
H A Dsa8540p.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
9 /delete-node/ &cpu0_opp_table;
10 /delete-node/ &cpu4_opp_table;
13 cpu0_opp_table: opp-table-cpu0 {
14 compatible = "operating-points-v2";
15 opp-shared;
17 opp-300000000 {
18 opp-hz = /bits/ 64 <300000000>;
19 opp-peak-kBps = <(300000 * 32)>;
21 opp-403200000 {
[all …]
H A Dmsm8996pro.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
9 /delete-node/ opp-table-cluster0;
10 /delete-node/ opp-table-cluster1;
14 * nibble of supported hw, so speed bin 0 becomes 0x10, speed bin 1
15 * becomes 0x20, speed 2 becomes 0x40.
18 cluster0_opp: opp-table-cluster0 {
19 compatible = "operating-points-v2-kryo-cpu";
20 nvmem-cells = <&speedbin_efuse>;
21 opp-shared;
23 opp-307200000 {
[all …]
/freebsd/contrib/llvm-project/clang/lib/Headers/
H A Dmmintrin.h1 /*===---- mmintrin.h - MMX intrinsics --------------------------------------===
3 * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
5 * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 *===-----------------------------------------------------------------------===
26 __attribute__((__always_inline__, __nodebug__, __target__("mmx,no-evex512"), \
27 __min_vector_width__(64)))
37 __target__("mmx,no-evex512")))
42 /// Constructs a 64-bit integer vector, setting the lower 32 bits to the
43 /// value of the 32-bit integer parameter and setting the upper 32 bits to 0.
50 /// A 32-bit integer value.
[all …]
/freebsd/sys/contrib/device-tree/Bindings/opp/
H A Dqcom-nvmem-cpufreq.txt8 defines the voltage and frequency value based on the msm-id in SMEM
10 The qcom-cpufreq-nvmem driver reads the msm-id and efuse value from the SoC
13 operating-points-v2 table when it is parsed by the OPP framework.
16 --------------------
18 - operating-points-v2: Phandle to the operating-points-v2 table to use.
20 In 'operating-points-v2' table:
21 - compatible: Should be
22 - 'operating-points-v2-kryo-cpu' for apq8096, msm8996, msm8974,
26 --------------------
28 - power-domains: A phandle pointing to the PM domain specifier which provides
[all …]
/freebsd/tests/sys/netpfil/pf/
H A Dnat64.sh2 # SPDX-License-Identifier: BSD-2-Clause
36 ifconfig ${epair}a inet6 2001:db8::2/64 up no_dad
37 route -6 add default 2001:db8::1
40 jexec rtr ifconfig ${epair}b inet6 2001:db8::1/64 up no_dad
48 atf_check -s exit:0 -o ignore \
49 ping6 -c 1 2001:db8::1
50 atf_check -s exit:0 -o ignore \
51 jexec dst ping -c 1 192.0.2.1
53 jexec rtr pfctl -e
56 "set state-policy if-bound" \
[all …]
/freebsd/contrib/file/magic/Magdir/
H A Dmach2 #------------------------------------------------------------
4 # Mach has two magic numbers, 0xcafebabe and 0xfeedface.
8 #------------------------------------------------------------
9 # if set, it's for the 64-bit version of the architecture
10 # yes, this is separate from the low-order magic number bit
11 # it's also separate from the "64-bit libraries" bit in the
14 # Reference: https://opensource.apple.com/source/cctools/cctools-949.0.1/
15 # include/mach-o/loader.h
17 0 name mach-o-cpu
18 >0 belong&0xff000000 0
[all …]
/freebsd/sys/crypto/openssl/arm/
H A Dsha512-armv4.S1 /* Do not modify. This file is auto-generated from sha512-armv4.pl. */
2 @ Copyright 2007-2020 The OpenSSL Project Authors. All Rights Reserved.
22 @ by gcc 3.4 and it spends ~72 clock cycles per byte [on single-issue
27 @ Rescheduling for dual-issue pipeline resulted in 6% improvement on
32 @ Profiler-assisted and platform-specific optimization resulted in 7%
38 @ one byte in 23.3 cycles or ~60% faster than integer-only code.
44 @ Technical writers asserted that 3-way S4 pipeline can sustain
46 @ not be observed, see http://www.openssl.org/~appro/Snapdragon-S4.html
47 @ for further details. On side note Cortex-A15 processes one byte in
53 @ h[0-7], namely with most significant dword at *lower* address, which
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/broadcom/
H A Dbcm2712.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
2 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #address-cells = <2>;
8 #size-cells = <2>;
10 interrupt-parent = <&gicv2>;
14 clk_osc: clk-osc {
15 compatible = "fixed-clock";
16 #clock-cells = <0>;
17 clock-output-names = "osc";
18 clock-frequency = <54000000>;
[all …]
/freebsd/sys/dev/bwn/
H A Dif_bwn_phy_lp.c1 /*-
2 * Copyright (c) 2009-2010 Weongyo Jeong <weongyo@freebsd.org>
155 { 0x6f, 0x3c, 0x3c, 0x4, 0x5, 0x5, 0x5, 0x5, 0x77, 0x80, 0x80, 0x70 },
156 { 0x6f, 0x2c, 0x2c, 0x4, 0x5, 0x5, 0x5, 0x5, 0x77, 0x80, 0x80, 0x70 },
157 { 0x6f, 0x1c, 0x1c, 0x4, 0x5, 0x5, 0x5, 0x5, 0x77, 0x80, 0x80, 0x70 },
158 { 0x6e, 0x1c, 0x1c, 0x4, 0x5, 0x5, 0x5, 0x5, 0x77, 0x80, 0x80, 0x70 },
159 { 0x6e, 0xc, 0xc, 0x4, 0x5, 0x5, 0x5, 0x5, 0x77, 0x80, 0x80, 0x70 },
160 { 0x6a, 0xc, 0xc, 0, 0x2, 0x5, 0xd, 0xd, 0x77, 0x80, 0x20, 0 },
161 { 0x6a, 0xc, 0xc, 0, 0x1, 0x5, 0xd, 0xc, 0x77, 0x80, 0x20, 0 },
162 { 0x6a, 0xc, 0xc, 0, 0x1, 0x4, 0xc, 0xc, 0x77, 0x80, 0x20, 0 },
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/amazon/
H A Dalpine-v3.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 compatible = "amazon,al-alpine-v3";
14 interrupt-parent = <&gic>;
16 #address-cells = <2>;
17 #size-cells = <2>;
20 #address-cells = <1>;
21 #size-cells = <0>;
23 cpu@0 {
[all …]
/freebsd/crypto/libecc/
H A D.travis.yml4 - bionic
9 …- secure: "jhz0JLrLjWABZfT/mWiwuddUMvJNdrkIWJEqFGtGLO/x/nbiFD8ooHl/Sb+JSOsr8obXYMVmO+7ubTOLeqAbfaq…
12 …- echo -n | openssl s_client -connect https://scan.coverity.com:443 | sed -ne '/-BEGIN CERTIFICATE…
19 - make
20 - gcc
21 - clang
22 - qemu-user-static
23 - wine-stable
24 - wine32
25 - wine64
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/amd/
H A Damd-seattle-cpus.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 #address-cells = <0x1>;
6 #size-cells = <0x0>;
8 cpu-map {
43 CPU0: cpu@0 {
45 compatible = "arm,cortex-a57";
46 reg = <0x0>;
47 enable-method = "psci";
49 i-cache-size = <0xC000>;
50 i-cache-line-size = <64>;
[all …]
/freebsd/sys/contrib/openzfs/module/icp/asm-arm/sha2/
H A Dsha512-armv7.S2 * Copyright 2004-2022 The OpenSSL Project Authors. All Rights Reserved.
8 * https://www.apache.org/licenses/LICENSE-2.0
18 * Portions Copyright (c) 2022 Tino Reichardt <milky-zfs@mcmilk.de>
19 * - modified assembly to fit into OpenZFS
31 # define VFP_ABI_PUSH vstmdb sp!,{d8-d15}
32 # define VFP_ABI_POP vldmia sp!,{d8-d15}
39 # define LO 0
43 # define HI 0
61 WORD64(0x428a2f98,0xd728ae22, 0x71374491,0x23ef65cd)
62 WORD64(0xb5c0fbcf,0xec4d3b2f, 0xe9b5dba5,0x8189dbbc)
[all …]
/freebsd/lib/libpmc/pmu-events/arch/x86/ivytown/
H A Duncore-cache.json4 "Counter": "0,1,2,3",
10 … "BriefDescription": "All LLC Misses (code+ data rd + data wr - including demand and prefetch)",
11 "Counter": "0,1",
12 "EventCode": "0x34",
14 "Filter": "filter_state=0x1",
16 "ScaleUnit": "64Bytes",
17 "UMask": "0x11",
22 "Counter": "0,1",
23 "EventCode": "0x37",
26 "ScaleUnit": "64Bytes",
[all …]
/freebsd/usr.sbin/bhyve/gdb/
H A Damd64.xml2 <!-- Copyright (C) 2010-2017 Free Software Foundation, Inc.
6 notice and this notice are preserved. -->
8 <!-- x86_64 64bit -->
10 <!DOCTYPE target SYSTEM "gdb-target.dtd">
35 <field name="CF" start="0" end="0"/>
38 <!-- General registers -->
40 <reg name="rax" bitsize="64" type="int64" regnum="0"/>
41 <reg name="rbx" bitsize="64" type="int64"/>
42 <reg name="rcx" bitsize="64" type="int64"/>
43 <reg name="rdx" bitsize="64" type="int64"/>
[all …]
/freebsd/sys/dts/arm/
H A Dannapurna-alpine.dts1 /*-
28 /dts-v1/;
32 #address-cells = <1>;
33 #size-cells = <1>;
40 #address-cells = <1>;
41 #size-cells = <0>;
43 cpu@0 {
45 compatible = "arm,cortex-a15";
46 reg = <0x0>;
47 d-cache-line-size = <64>; // 64 bytes
[all …]
/freebsd/sys/contrib/device-tree/src/arm/broadcom/
H A Dbcm2837.dtsi2 #include "bcm2835-common.dtsi"
8 ranges = <0x7e000000 0x3f000000 0x1000000>,
9 <0x40000000 0x40000000 0x00001000>;
10 dma-ranges = <0xc0000000 0x00000000 0x3f000000>;
12 local_intc: interrupt-controller@40000000 {
13 compatible = "brcm,bcm2836-l1-intc";
14 reg = <0x40000000 0x100>;
15 interrupt-controller;
16 #interrupt-cells = <2>;
17 interrupt-parent = <&local_intc>;
[all …]

12345678910>>...46