Home
last modified time | relevance | path

Searched +full:0 +full:- +full:63 (Results 1 – 25 of 1074) sorted by relevance

12345678910>>...43

/freebsd/contrib/netbsd-tests/ipf/input/
H A Df132 # 1.1.1.1,1025 -> 2.1.1.1,25 TTL=63 TCP DF,FO=0 SYN
7 # 1.1.1.1,1025 -> 2.1.1.1,25 TTL=63 TCP MF ACK
12 # 1.1.1.1,1025 -> 2.1.1.1,25 TTL=63 TCP FO=2 ACK
15 0000 0000 0001 0203 0405 0607 0809 0a0b 0c0d 0e0f 1011 1213
17 # 1.1.1.1,1024 -> 2.1.1.1,25 TTL=63 TCP DF MF FO=0 SYN
22 # 1.1.1.1,1025 -> 2.1.1.1,25 TTL=63 TCP DF FO=0
27 # 1.1.1.1 -> 2.1.1.1 TTL=63 TCP DF FO=1 SYN
32 # 1.1.1.1 -> 2.1.1.1 TTL=63 UDP DF MF FO=0
36 # 1.1.1.1,53 -> 2.1.1.1,53 TTL=63 UDP MF FO=0
41 # 1.1.1.1,53 -> 2.1.1.1,53 TTL=63 UDP MF FO=0
[all …]
H A Df121 # 1.1.1.1,1025 -> 2.1.1.1,25 TTL=63 TCP DF SYN
6 # 1.1.1.1,1025 -> 2.1.1.1,25 TTL=63 TCP DF ACK
11 # 1.1.1.1,1025 -> 2.1.1.1,25 TTL=63 TCP DF MF FO=0 ACK
16 # 1.1.1.1,1025 -> 2.1.1.1,25 TTL=63 TCP DF FO=0
21 # 1.1.1.1 -> 2.1.1.1 TTL=63 TCP DF FO=1 ACK
26 # 1.1.1.1 -> 2.1.1.1 TTL=63 UDP DF MF FO=0
30 # 1.1.1.1,53 -> 2.1.1.1,53 TTL=63 UDP MF FO=0
35 # 1.1.1.1,1 -> 2.1.1.1,1 TTL=63 UDP MF FO=0
40 # 1.1.1.1,53 -> 2.1.1.1,53 TTL=63 UDP MF FO=0
/freebsd/sys/dts/arm/
H A Dimx53x.dtsi34 #address-cells = <1>;
35 #size-cells = <1>;
43 #address-cells = <1>;
44 #size-cells = <0>;
46 cpu@0 {
49 reg = <0x0>;
50 d-cache-line-size = <32>;
51 i-cache-line-size = <32>;
52 d-cache-size = <0x8000>;
53 i-cache-size = <0x8000>;
[all …]
H A Ddigi-ccwmx53.dts30 * Digi ConnectCore Wi-i.MX53
33 /dts-v1/;
37 model = "Digi ConnectCore Wi-i.MX53";
38 compatible = "digi,imx53-ccwm53", "fsl,imx53";
42 reg = <0x70000000 0x10000000
43 0xB0000000 0x10000000>;
59 clock-frequency = <216000000>;
63 clock-frequency = <216000000>;
76 clock-frequency = <0>; /* won't load w/o this */
80 clock-frequency = <0>; /* won't load w/o this */
[all …]
/freebsd/sys/dev/irdma/
H A Dirdma_defs.h1 /*-
2 * SPDX-License-Identifier: GPL-2.0 or Linux-OpenIB
4 * Copyright (c) 2015 - 2023 Intel Corporation
16 * - Redistributions of source code must retain the above
20 * - Redistributions in binary form must reproduce the above
50 #define IRDMA_IRD_HW_SIZE_4 0
56 #define IRDMA_QP_STATE_INVALID 0
81 #define RDMA_OPCODE_M 0x0f
84 #define CQE_MAJOR_DRV 0x8000
90 #define IRDMA_BYTE_0 0
[all …]
H A Dirdma_uda_d.h1 /*-
2 * SPDX-License-Identifier: GPL-2.0 or Linux-OpenIB
4 * Copyright (c) 2016 - 2021 Intel Corporation
16 * - Redistributions of source code must retain the above
20 * - Redistributions in binary form must reproduce the above
38 #define IRDMA_E_UDA_SQ_L4T_UNKNOWN 0
43 #define IRDMA_E_UDA_SQ_IIPT_UNKNOWN 0
63 #define IRDMA_UDA_QPSQ_AHIDX_S 0
64 #define IRDMA_UDA_QPSQ_AHIDX GENMASK_ULL(16, 0)
69 #define IRDMA_UDA_QPSQ_MULTICAST_S 63
[all …]
/freebsd/cddl/contrib/opensolaris/cmd/dtrace/test/tst/common/aggs/
H A Dtst.neglquant.d33 @["j-church"] = lquantize(1, 0, 10, 1, 100);
34 @["j-church"] = lquantize(1, 0, 10, 1, -99);
35 @["j-church"] = lquantize(1, 0, 10, 1, -1);
41 @["k-ingleside"] = lquantize(1, 0, 10, 1, -val);
46 @["l-taraval"] = lquantize(0, 0, 10, 1, -val);
47 @["l-taraval"] = lquantize(-1, 0, 10, 1, -val);
48 @["l-taraval"] = lquantize(1, 0, 10, 1, val);
49 @["l-taraval"] = lquantize(1, 0, 10, 1, val);
54 @["m-oceanview"] = lquantize(1, 0, 10, 1, (1 << 63) - 1);
55 @["m-oceanview"] = lquantize(1, 0, 10, 1);
[all …]
/freebsd/contrib/netbsd-tests/ipf/regress/
H A Dp6.whois6 MICROSOFT CORPORATION (MICRO-101)
7 MICROSOFT CORPORATION (MICRO-97)
8 MICROSOFT CORPORATION (MICRO-100)
9 Microsoft Corporation (MICRO-111)
10 MICROSOFT CORPORATION (MICRO-117)
11 Microsoft Corporation (ZM23-ARIN) noc@microsoft.com +1-425-882-8080
12 Microsoft (ZM39-ARIN) noc@microsoft.com +1-425-882-8080
13 Microsoft Corp (AS8068) MICROSOFT-CORP---MSN-AS-BLOCK 8068 - 8075
15 Microsoft Corp (AS14719) MICROSOFT-CORP-BCENTRAL 14719
16 Microsoft Corp (AS3598) MICROSOFT-CORP-AS 3598
[all …]
/freebsd/sys/powerpc/pseries/
H A Dphyp-hvcall.h1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
37 #define H_SUCCESS 0
38 #define H_BUSY 1 /* Hardware Busy -- Retry Later. */
78 #define H_HARDWARE -1 /* Error. */
79 #define H_FUNCTION -2 /* Not supported. */
80 #define H_PRIVILEGE -3 /* Caller not in privileged mode. */
81 #define H_PARAMETER -4 /* Outside valid range for partition or conflicting. */
82 #define H_BAD_MODE -5 /* Illegal MSR value. */
83 #define H_PTEG_FULL -6 /* The requested pteg was full. */
[all …]
/freebsd/contrib/netbsd-tests/include/
H A Dd_bitstring_64.out5 0 0 1 0
6 1 0 2 1
7 2 0 4 1
8 3 0 8 1
9 4 0 16 1
10 5 0 32 1
11 6 0 64 1
12 7 0 128 1
68 63 7 128 8
71 be: 0 -1 0000000000000000000000000000000000000000000000000000000000000000
[all …]
H A Dd_bitstring_67.out5 0 0 1 0
6 1 0 2 1
7 2 0 4 1
8 3 0 8 1
9 4 0 16 1
10 5 0 32 1
11 6 0 64 1
12 7 0 128 1
68 63 7 128 8
74 be: 0 -1 0000000000000000000000000000000000000000000000000000000000000000000
[all …]
/freebsd/contrib/llvm-project/clang/lib/Headers/
H A Dfmaintrin.h1 /*===---- fmaintrin.h - FMA intrinsics -------------------------------------===
3 * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
5 * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 *===-----------------------------------------------------------------------===
21 /// Computes a multiply-add of 128-bit vectors of [4 x float].
29 /// A 128-bit vector of [4 x float] containing the multiplicand.
31 /// A 128-bit vector of [4 x float] containing the multiplier.
33 /// A 128-bit vector of [4 x float] containing the addend.
34 /// \returns A 128-bit vector of [4 x float] containing the result.
41 /// Computes a multiply-add of 128-bit vectors of [2 x double].
[all …]
H A Draointintrin.h1 /*===----------------------- raointintrin.h - RAOINT ------------------------===
3 * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
5 * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 *===-----------------------------------------------------------------------===
20 /// Atomically add a 32-bit value at memory operand \a __A and a 32-bit \a __B,
31 /// A pointer to a 32-bit memory location.
33 /// A 32-bit integer value.
36 /// MEM[__A+31:__A] := MEM[__A+31:__A] + __B[31:0]
42 /// Atomically and a 32-bit value at memory operand \a __A and a 32-bit \a __B,
53 /// A pointer to a 32-bit memory location.
[all …]
/freebsd/tests/sys/opencrypto/
H A Dpoly1305_test.c1 /*-
33 #include <atf-c.h>
53 ":01:03:80:8a:fb:0d:b2:fd:4a:bf:f6:af:41:49:f5:1b",
55 "43 72 79 70 74 6f 67 72 61 70 68 69 63 20 46 6f "
56 "72 75 6d 20 52 65 73 65 61 72 63 68 20 47 72 6f "
59 .expected_tag_hex = "a8:06:1d:c1:30:51:36:c6:c2:2b:8b:af:0c:01:27:a9",
84 "63 61 74 69 6f 6e 20 61 73 20 61 6c 6c 20 6f 72 "
89 "74 68 69 6e 20 74 68 65 20 63 6f 6e 74 65 78 74 "
90 "20 6f 66 20 61 6e 20 49 45 54 46 20 61 63 74 69 "
91 "76 69 74 79 20 69 73 20 63 6f 6e 73 69 64 65 72 "
[all …]
/freebsd/contrib/llvm-project/llvm/include/llvm/Support/
H A DBase64.h1 //===--- Base64.h - Base64 Encoder/Decoder ----------------------*- C++ -*-===//
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
30 size_t i = 0, j = 0; in encodeBase64()
35 Buffer[j + 0] = Table[(x >> 18) & 63]; in encodeBase64()
36 Buffer[j + 1] = Table[(x >> 12) & 63]; in encodeBase64()
37 Buffer[j + 2] = Table[(x >> 6) & 63]; in encodeBase64()
38 Buffer[j + 3] = Table[x & 63]; in encodeBase64()
[all …]
/freebsd/sys/contrib/openzfs/module/icp/asm-ppc64/blake3/
H A Db3_ppc64le_sse41.S9 * or https://opensource.org/licenses/CDDL-1.0.
23 * Based on BLAKE3 v1.3.1, https://github.com/BLAKE3-team/BLAKE3
24 * Copyright (c) 2019-2022 Samuel Neves
25 * Copyright (c) 2022 Tino Reichardt <milky-zfs@mcmilk.de>
27 * This is converted assembly: SSE4.1 -> POWER8 PPC64 Little Endian
28 * Used tools: SIMDe https://github.com/simd-everywhere/simde
52 .byte 0
56 .byte 0
108 .byte 0
113 .byte 0
[all …]
H A Db3_ppc64le_sse2.S9 * or https://opensource.org/licenses/CDDL-1.0.
23 * Based on BLAKE3 v1.3.1, https://github.com/BLAKE3-team/BLAKE3
24 * Copyright (c) 2019-2022 Samuel Neves and Matthew Krupcale
25 * Copyright (c) 2022 Tino Reichardt <milky-zfs@mcmilk.de>
27 * This is converted assembly: SSE2 -> POWER8 PPC64 Little Endian
28 * Used tools: SIMDe https://github.com/simd-everywhere/simde
74 .byte 0
87 .byte 0
108 .byte 0
121 .byte 0
[all …]
/freebsd/share/examples/libvgl/
H A Ddemo.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 1991-1997 Søren Schmidt
55 xsize=VGLDisplay->Xsize; in main()
56 ysize=VGLDisplay->Ysize; in main()
61 VGLClear(tmp, 0); in main()
64 for (y=0; y<ysize; y++) in main()
65 VGLLine(VGLDisplay, 0, y, xsize-1, y, y/2 % 256); in main()
68 VGLLine(VGLDisplay, 0, 0, xsize-1, ysize-1, 63); in main()
69 VGLLine(VGLDisplay, 0, ysize-1, xsize-1, 0, 63); in main()
[all …]
/freebsd/sys/contrib/dev/iwlwififw/
H A DWHENCE1 Driver: iwlwifi - Intel Wireless Wifi
3 File: iwlwifi-3945-2.ucode
6 File: iwlwifi-4965-2.ucode
9 File: iwlwifi-5000-1.ucode
12 File: iwlwifi-5000-2.ucode
15 File: iwlwifi-5000-5.ucode
18 File: iwlwifi-5150-2.ucode
21 File: iwlwifi-1000-3.ucode
24 File: iwlwifi-1000-5.ucode
27 File: iwlwifi-6000-4.ucode
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCInstrDFP.td1 //===-- PPCInstrDFP.td - PowerPC Decimal Floating Point ----*- tablegen -*-===//
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
16 let mayRaiseFPException = 1, hasSideEffects = 0 in {
22 defm DADDQ : XForm_28r<63, 2, (outs fpairrc:$RST), (ins fpairrc:$RA, fpairrc:$RB),
29 defm DSUBQ : XForm_28r<63, 514, (outs fpairrc:$RST), (ins fpairrc:$RA, fpairrc:$RB),
36 defm DMULQ : XForm_28r<63, 34, (outs fpairrc:$RST), (ins fpairrc:$RA, fpairrc:$RB),
43 defm DDIVQ : XForm_28r<63, 546, (outs fpairrc:$RST), (ins fpairrc:$RA, fpairrc:$RB),
[all …]
/freebsd/sys/contrib/device-tree/Bindings/net/
H A Dcavium-pip.txt10 - compatible: "cavium,octeon-3860-pip"
14 - reg: The base address of the PIP's register bank.
16 - #address-cells: Must be <1>.
18 - #size-cells: Must be <0>.
21 - compatible: "cavium,octeon-3860-pip-interface"
25 - reg: The interface number.
27 - #address-cells: Must be <1>.
29 - #size-cells: Must be <0>.
32 - compatible: "cavium,octeon-3860-pip-port"
36 - reg: The port number within the interface group.
[all …]
/freebsd/contrib/ofed/libirdma/
H A Dirdma_defs.h1 /*-
2 * SPDX-License-Identifier: GPL-2.0 or Linux-OpenIB
4 * Copyright (c) 2015 - 2023 Intel Corporation
16 * - Redistributions of source code must retain the above
20 * - Redistributions in binary form must reproduce the above
38 #define IRDMA_BYTE_0 0
74 #define IRDMA_CQE_QTYPE_RQ 0
87 #define IRDMA_FEATURE_RTS_AE BIT_ULL(0)
92 #define IRDMAQP_OP_RDMA_WRITE 0x00
93 #define IRDMAQP_OP_RDMA_READ 0x01
[all …]
/freebsd/sys/contrib/device-tree/Bindings/interrupt-controller/
H A Driscv,aplic.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/riscv,aplic.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: RISC-V Advanced Platform Level Interrupt Controller (APLIC)
10 - Anup Patel <anup@brainfault.org>
13 The RISC-V advanced interrupt architecture (AIA) defines an advanced
15 in a RISC-V platform. The RISC-V AIA specification can be found at
16 https://github.com/riscv/riscv-aia.
18 The RISC-V APLIC is implemented as hierarchical APLIC domains where all
[all …]
/freebsd/sys/contrib/device-tree/src/arm/nxp/imx/
H A Dimx53.dtsi1 // SPDX-License-Identifier: GPL-2.0+
6 #include "imx53-pinfunc.h"
7 #include <dt-bindings/clock/imx5-clock.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/interrupt-controlle
[all...]
/freebsd/sys/contrib/device-tree/Bindings/mips/cavium/
H A Dciu2.txt4 - compatible: "cavium,octeon-6880-ciu2"
8 - interrupt-controller: This is an interrupt controller.
10 - reg: The base address of the CIU's register bank.
12 - #interrupt-cells: Must be <2>. The first cell is the bank within
13 the CIU and may have a value between 0 and 63. The second cell is
14 the bit within the bank and may also have a value between 0 and 63.
17 interrupt-controller@1070100000000 {
18 compatible = "cavium,octeon-6880-ciu2";
19 interrupt-controller;
21 * 1) Controller register (0..63)
[all …]

12345678910>>...43