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/linux/drivers/media/platform/samsung/exynos-gsc/
H A Dgsc-regs.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (c) 2011 - 2012 Samsung Electronics Co., Ltd.
6 * Samsung EXYNOS5 SoC series G-Scaler driver
12 #include "gsc-core.h"
16 writel(GSC_SW_RESET_SRESET, dev->regs + GSC_SW_RESET); in gsc_hw_set_sw_reset()
22 u32 cfg; in gsc_wait_reset() local
25 cfg = readl(dev->regs + GSC_SW_RESET); in gsc_wait_reset()
26 if (!cfg) in gsc_wait_reset()
31 return -EBUSY; in gsc_wait_reset()
36 u32 cfg; in gsc_hw_set_frm_done_irq_mask() local
[all …]
/linux/drivers/media/platform/samsung/exynos4-is/
H A Dfimc-reg.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2010 - 2013 Samsung Electronics Co., Ltd.
13 #include <media/drv-intf/exynos-fimc.h>
14 #include "media-dev.h"
16 #include "fimc-reg.h"
17 #include "fimc-core.h"
21 u32 cfg; in fimc_hw_reset() local
23 cfg = readl(dev->regs + FIMC_REG_CISRCFMT); in fimc_hw_reset()
24 cfg |= FIMC_REG_CISRCFMT_ITU601_8BIT; in fimc_hw_reset()
25 writel(cfg, dev->regs + FIMC_REG_CISRCFMT); in fimc_hw_reset()
[all …]
H A Dfimc-lite-reg.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Register interface file for EXYNOS FIMC-LITE (camera interface) driver
12 #include <media/drv-intf/exynos-fimc.h>
14 #include "fimc-lite-reg.h"
15 #include "fimc-lite.h"
16 #include "fimc-core.h"
23 u32 cfg; in flite_hw_reset() local
25 cfg = readl(dev->regs + FLITE_REG_CIGCTRL); in flite_hw_reset()
26 cfg |= FLITE_REG_CIGCTRL_SWRST_REQ; in flite_hw_reset()
27 writel(cfg, dev->regs + FLITE_REG_CIGCTRL); in flite_hw_reset()
[all …]
/linux/drivers/phy/
H A Dphy-core-mipi-dphy.c1 /* SPDX-License-Identifier: GPL-2.0 */
13 #include <linux/phy/phy-mipi-dphy.h>
16 * Minimum D-PHY timings based on MIPI D-PHY specification. Derived
18 * of the D-PHY specification (v1.2).
24 struct phy_configure_opts_mipi_dphy *cfg) in phy_mipi_dphy_calc_config() argument
28 if (!cfg) in phy_mipi_dphy_calc_config()
29 return -EINVAL; in phy_mipi_dphy_calc_config()
39 cfg->clk_miss = 0; in phy_mipi_dphy_calc_config()
40 cfg->clk_post = 60000 + 52 * ui; in phy_mipi_dphy_calc_config()
41 cfg->clk_pre = 8; in phy_mipi_dphy_calc_config()
[all …]
/linux/drivers/media/platform/samsung/s3c-camif/
H A Dcamif-regs.c1 // SPDX-License-Identifier: GPL-2.0-only
11 #include "camif-regs.h"
13 #define camif_write(_camif, _off, _val) writel(_val, (_camif)->io_base + (_off))
14 #define camif_read(_camif, _off) readl((_camif)->io_base + (_off))
18 u32 cfg; in camif_hw_reset() local
20 cfg = camif_read(camif, S3C_CAMIF_REG_CISRCFMT); in camif_hw_reset()
21 cfg |= CISRCFMT_ITU601_8BIT; in camif_hw_reset()
22 camif_write(camif, S3C_CAMIF_REG_CISRCFMT, cfg); in camif_hw_reset()
25 cfg = camif_read(camif, S3C_CAMIF_REG_CIGCTRL); in camif_hw_reset()
26 cfg |= CIGCTRL_SWRST; in camif_hw_reset()
[all …]
/linux/tools/testing/selftests/drivers/net/hw/
H A Dcsum.py2 # SPDX-License-Identifier: GPL-2.0
12 def test_receive(cfg, ipv4=False, extra_args=None): argument
14 if not cfg.have_rx_csum:
15 raise KsftSkipEx(f"Test requires rx checksum offload on {cfg.ifname}")
18 ip_args = f"-4 -S {cfg.remote_v4} -D {cfg.v4}"
20 ip_args = f"-6 -S {cfg.remote_v6} -D {cfg.v6}"
22 rx_cmd = f"{cfg.bin_local} -i {cfg.ifname} -n 100 {ip_args} -r 1 -R {extra_args}"
23 tx_cmd = f"{cfg.bin_remote} -i {cfg.ifname} -n 100 {ip_args} -r 1 -T {extra_args}"
27 cmd(tx_cmd, host=cfg.remote)
30 def test_transmit(cfg, ipv4=False, extra_args=None): argument
[all …]
H A Drss_ctx.py2 # SPDX-License-Identifier: GPL-2.0
22 def _rss_key_check(cfg, data=None, context=0): argument
24 data = get_rss(cfg, context=context)
25 if 'rss-hash-key' not in data:
27 non_zero = [x for x in data['rss-hash-key'] if x != 0]
28 ksft_eq(bool(non_zero), True, comment=f"RSS key is all zero {data['rss-hash-key']}")
31 def get_rss(cfg, context=0): argument
32 return ethtool(f"-x {cfg.ifname} context {context}", json=True)[0]
35 def get_drop_err_sum(cfg): argument
36 stats = ip("-s -s link show dev " + cfg.ifname, json=True)[0]
[all …]
/linux/tools/testing/selftests/bpf/prog_tests/
H A Dcore_extern.c1 // SPDX-License-Identifier: GPL-2.0
21 #define CFG "CONFIG_BPF_SYSCALL=n\n" macro
25 const char *cfg; member
32 .cfg = "CONFIG_BPF_SYSCALL=n\n"
54 { .name = "tristate (y)", .cfg = CFG"CONFIG_TRISTATE=y\n",
56 { .name = "tristate (n)", .cfg = CFG"CONFIG_TRISTATE=n\n",
58 { .name = "tristate (m)", .cfg = CFG"CONFIG_TRISTATE=m\n",
60 { .name = "tristate (int)", .fails = 1, .cfg = CFG"CONFIG_TRISTATE=1" },
61 { .name = "tristate (bad)", .fails = 1, .cfg = CFG"CONFIG_TRISTATE=M" },
63 { .name = "bool (y)", .cfg = CFG"CONFIG_BOOL=y\n",
[all …]
/linux/drivers/pci/
H A Decam.c1 // SPDX-License-Identifier: GPL-2.0
11 #include <linux/pci-ecam.h>
15 * On 64-bit systems, we do a single ioremap for the whole config space
16 * since we have enough virtual address range available. On 32-bit, we
23 * - reserve mem region
24 * - alloc struct pci_config_window with space for all mappings
25 * - ioremap the config space
31 unsigned int bus_shift = ops->bus_shift; in pci_ecam_create()
32 struct pci_config_window *cfg; in pci_ecam_create() local
37 if (busr->start > busr->end) in pci_ecam_create()
[all …]
/linux/drivers/net/ethernet/marvell/octeontx2/af/
H A Drpm.c1 // SPDX-License-Identifier: GPL-2.0
81 return (rpm->pdev->device == PCI_DEVID_CN10KB_RPM); in is_dev_rpm2()
129 u64 cfg, last; in rpm_lmac_tx_enable() local
132 return -ENODEV; in rpm_lmac_tx_enable()
134 cfg = rpm_read(rpm, lmac_id, RPMX_MTI_MAC100X_COMMAND_CONFIG); in rpm_lmac_tx_enable()
135 last = cfg; in rpm_lmac_tx_enable()
137 cfg |= RPM_TX_EN; in rpm_lmac_tx_enable()
139 cfg &= ~(RPM_TX_EN); in rpm_lmac_tx_enable()
141 if (cfg != last) in rpm_lmac_tx_enable()
142 rpm_write(rpm, lmac_id, RPMX_MTI_MAC100X_COMMAND_CONFIG, cfg); in rpm_lmac_tx_enable()
[all …]
H A Dcgx.c1 // SPDX-License-Identifier: GPL-2.0
24 #define DRV_NAME "Marvell-CGX/RPM"
80 return (cgx->pdev->device == PCI_DEVID_CN10K_RPM) || in is_dev_rpm()
81 (cgx->pdev->device == PCI_DEVID_CN10KB_RPM); in is_dev_rpm()
86 if (!cgx || lmac_id < 0 || lmac_id >= cgx->max_lmac_per_mac) in is_lmac_valid()
88 return test_bit(lmac_id, &cgx->lmac_bmap); in is_lmac_valid()
98 for_each_set_bit(tmp, &cgx->lmac_bmap, cgx->max_lmac_per_mac) { in get_sequence_id_of_lmac()
112 return ((struct cgx *)cgxd)->mac_ops; in get_mac_ops()
117 writeq(val, cgx->reg_base + (lmac << cgx->mac_ops->lmac_offset) + in cgx_write()
123 return readq(cgx->reg_base + (lmac << cgx->mac_ops->lmac_offset) + in cgx_read()
[all …]
/linux/sound/pci/hda/
H A Dhda_auto_parser.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * BIOS auto-parser helper functions for HD-audio
38 return (int)(a->seq - b->seq); in compare_seq()
55 /* add the found input-pin to the cfg->inputs[] table */
56 static void add_auto_cfg_input_pin(struct hda_codec *codec, struct auto_pin_cfg *cfg, in add_auto_cfg_input_pin() argument
59 if (cfg->num_inputs < AUTO_CFG_MAX_INS) { in add_auto_cfg_input_pin()
60 cfg->inputs[cfg->num_inputs].pin = nid; in add_auto_cfg_input_pin()
61 cfg->inputs[cfg->num_inputs].type = type; in add_auto_cfg_input_pin()
62 cfg->inputs[cfg->num_inputs].has_boost_on_pin = in add_auto_cfg_input_pin()
64 cfg->num_inputs++; in add_auto_cfg_input_pin()
[all …]
/linux/drivers/gpu/drm/msm/hdmi/
H A Dhdmi_phy_8996.c1 // SPDX-License-Identifier: GPL-2.0-only
6 #include <linux/clk-provider.h>
83 return platform_get_drvdata(pll->pdev); in pll_get_phy()
89 writel(data, pll->mmio_qserdes_com + offset); in hdmi_pll_write()
94 return readl(pll->mmio_qserdes_com + offset); in hdmi_pll_read()
100 writel(data, pll->mmio_qserdes_tx[channel] + offset); in hdmi_tx_chan_write()
154 return dividend - 1; in pll_get_pll_cmp()
179 vco_optimal_index = -1; in pll_get_post_div()
201 if (vco_optimal_index == -1) { in pll_get_post_div()
207 pd->vco_freq = vco_optimal; in pll_get_post_div()
[all …]
/linux/drivers/net/ethernet/marvell/octeon_ep/
H A Doctep_config.h1 /* SPDX-License-Identifier: GPL-2.0 */
60 #define CFG_GET_IQ_CFG(cfg) ((cfg)->iq) argument
61 #define CFG_GET_IQ_NUM_DESC(cfg) ((cfg)->iq.num_descs) argument
62 #define CFG_GET_IQ_INSTR_TYPE(cfg) ((cfg)->iq.instr_type) argument
63 #define CFG_GET_IQ_INSTR_SIZE(cfg) (64) argument
64 #define CFG_GET_IQ_DB_MIN(cfg) ((cfg)->iq.db_min) argument
65 #define CFG_GET_IQ_INTR_THRESHOLD(cfg) ((cfg)->iq.intr_threshold) argument
67 #define CFG_GET_OQ_NUM_DESC(cfg) ((cfg)->oq.num_descs) argument
68 #define CFG_GET_OQ_BUF_SIZE(cfg) ((cfg)->oq.buf_size) argument
69 #define CFG_GET_OQ_REFILL_THRESHOLD(cfg) ((cfg)->oq.refill_threshold) argument
[all …]
/linux/drivers/net/wireless/microchip/wilc1000/
H A Dwlan_cfg.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2012 - 2018 Microchip Technology Inc., and its subsidiaries.
142 struct wilc_cfg *cfg = &wl->cfg; in wilc_wlan_parse_response_frame() local
150 while (cfg->b[i].id != WID_NIL && cfg->b[i].id != wid) in wilc_wlan_parse_response_frame()
153 if (cfg->b[i].id == wid) in wilc_wlan_parse_response_frame()
154 cfg->b[i].val = info[4]; in wilc_wlan_parse_response_frame()
160 while (cfg->hw[i].id != WID_NIL && cfg->hw[i].id != wid) in wilc_wlan_parse_response_frame()
163 if (cfg->hw[i].id == wid) in wilc_wlan_parse_response_frame()
164 cfg->hw[i].val = get_unaligned_le16(&info[4]); in wilc_wlan_parse_response_frame()
170 while (cfg->w[i].id != WID_NIL && cfg->w[i].id != wid) in wilc_wlan_parse_response_frame()
[all …]
/linux/drivers/net/ethernet/cavium/liquidio/
H A Docteon_config.h7 * Copyright (c) 2003-2016 Cavium, Inc.
14 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
25 /*--------------------------CONFIG VALUES------------------------*/
121 #define CFG_GET_IQ_CFG(cfg) ((cfg)->iq) argument
122 #define CFG_GET_IQ_MAX_Q(cfg) ((cfg)->iq.max_iqs) argument
123 #define CFG_GET_IQ_PENDING_LIST_SIZE(cfg) ((cfg)->iq.pending_list_size) argument
124 #define CFG_GET_IQ_INSTR_TYPE(cfg) ((cfg)->iq.instr_type) argument
125 #define CFG_GET_IQ_DB_MIN(cfg) ((cfg)->iq.db_min) argument
126 #define CFG_GET_IQ_DB_TIMEOUT(cfg) ((cfg)->iq.db_timeout) argument
128 #define CFG_GET_IQ_INTR_PKT(cfg) ((cfg)->iq.iq_intr_pkt) argument
[all …]
/linux/drivers/scsi/cxlflash/
H A Dmain.c1 // SPDX-License-Identifier: GPL-2.0-or-later
41 * process_cmd_err() - command error handler
49 struct afu *afu = cmd->parent; in process_cmd_err()
50 struct cxlflash_cfg *cfg = afu->parent; in process_cmd_err() local
51 struct device *dev = &cfg->dev->dev; in process_cmd_err()
55 ioasa = &(cmd->sa); in process_cmd_err()
57 if (ioasa->rc.flags & SISL_RC_FLAGS_UNDERRUN) { in process_cmd_err()
58 resid = ioasa->resid; in process_cmd_err()
64 if (ioasa->rc.flags & SISL_RC_FLAGS_OVERRUN) { in process_cmd_err()
67 scp->result = (DID_ERROR << 16); in process_cmd_err()
[all …]
/linux/sound/soc/intel/avs/
H A Dpath.c1 // SPDX-License-Identifier: GPL-2.0-only
18 /* Must be called with adev->comp_list_mutex held. */
24 list_for_each_entry(acomp, &adev->comp_list, node) in avs_path_find_tplg()
25 if (!strcmp(acomp->tplg->name, name)) in avs_path_find_tplg()
26 return acomp->tplg; in avs_path_find_tplg()
35 list_for_each_entry(mod, &ppl->mod_list, node) in avs_path_find_module()
36 if (mod->template->id == template_id) in avs_path_find_module()
46 list_for_each_entry(ppl, &path->ppl_list, node) in avs_path_find_pipeline()
47 if (ppl->template->id == template_id) in avs_path_find_pipeline()
63 list_for_each_entry(pos, &tplg->path_tmpl_list, node) { in avs_path_find_path()
[all …]
/linux/drivers/net/ethernet/marvell/octeon_ep_vf/
H A Doctep_vf_config.h1 /* SPDX-License-Identifier: GPL-2.0 */
51 #define OCTEP_VF_MAX_MTU (10000 - (ETH_HLEN + ETH_FCS_LEN))
56 #define CFG_GET_IQ_CFG(cfg) ((cfg)->iq) argument
57 #define CFG_GET_IQ_NUM_DESC(cfg) ((cfg)->iq.num_descs) argument
58 #define CFG_GET_IQ_INSTR_TYPE(cfg) ((cfg)->iq.instr_type) argument
59 #define CFG_GET_IQ_INSTR_SIZE(cfg) (64) argument
60 #define CFG_GET_IQ_DB_MIN(cfg) ((cfg)->iq.db_min) argument
61 #define CFG_GET_IQ_INTR_THRESHOLD(cfg) ((cfg)->iq.intr_threshold) argument
63 #define CFG_GET_OQ_NUM_DESC(cfg) ((cfg)->oq.num_descs) argument
64 #define CFG_GET_OQ_BUF_SIZE(cfg) ((cfg)->oq.buf_size) argument
[all …]
/linux/net/bridge/
H A Dbr_mdb.c1 // SPDX-License-Identifier: GPL-2.0
23 *timer = br_timer_value(&pmctx->ip4_mc_router_timer); in br_ip4_rports_get_timer()
24 return !hlist_unhashed(&pmctx->ip4_rlist); in br_ip4_rports_get_timer()
32 *timer = br_timer_value(&pmctx->ip6_mc_router_timer); in br_ip6_rports_get_timer()
33 return !hlist_unhashed(&pmctx->ip6_rlist); in br_ip6_rports_get_timer()
56 hlist_for_each_entry_rcu(pmctx, &brmctx->ip4_mc_router_list, in br_rports_size()
61 hlist_for_each_entry_rcu(pmctx, &brmctx->ip6_mc_router_list, in br_rports_size()
73 u16 vid = brmctx->vlan ? brmctx->vlan->vid : 0; in br_rports_fill_info()
79 if (!brmctx->multicast_router || !br_rports_have_mc_router(brmctx)) in br_rports_fill_info()
84 return -EMSGSIZE; in br_rports_fill_info()
[all …]
/linux/drivers/net/ethernet/cavium/thunder/
H A Dthunder_xcv.c1 // SPDX-License-Identifier: GPL-2.0-only
67 u64 cfg; in xcv_init_hw() local
70 cfg = readq_relaxed(xcv->reg_base + XCV_RESET); in xcv_init_hw()
71 cfg &= ~DLL_RESET; in xcv_init_hw()
72 writeq_relaxed(cfg, xcv->reg_base + XCV_RESET); in xcv_init_hw()
75 cfg = readq_relaxed(xcv->reg_base + XCV_RESET); in xcv_init_hw()
76 cfg &= ~CLK_RESET; in xcv_init_hw()
77 writeq_relaxed(cfg, xcv->reg_base + XCV_RESET); in xcv_init_hw()
81 /* Configure DLL - enable or bypass in xcv_init_hw()
84 cfg = readq_relaxed(xcv->reg_base + XCV_DLL_CTL); in xcv_init_hw()
[all …]
/linux/net/netfilter/
H A Dxt_hashlimit.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * xt_hashlimit - Netfilter module to limit the number of packets per time
6 * (C) 2003-2004 by Harald Welte <laforge@netfilter.org>
7 * (C) 2006-2012 Patrick McHardy <kaber@trash.net>
8 * Copyright © CC Computer Consultants GmbH, 2007 - 2008
50 MODULE_DESCRIPTION("Xtables: per hash-bucket rate-limit match");
90 /* static / read-only parts in the beginning */
122 struct hashlimit_cfg3 cfg; /* config */ member
142 struct hashlimit_cfg1 *cfg = (struct hashlimit_cfg1 *)from; in cfg_copy() local
144 to->mode = cfg->mode; in cfg_copy()
[all …]
/linux/drivers/iommu/
H A Dio-pgtable-arm.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * CPU-agnostic ARM page table allocator.
10 #define pr_fmt(fmt) "arm-lpae io-pgtable: " fmt
14 #include <linux/io-pgtable.h>
19 #include <linux/dma-mapping.h>
23 #include "io-pgtable-arm.h"
24 #include "iommu-pages.h"
42 (((ARM_LPAE_MAX_LEVELS - (l)) * (d)->bits_per_level) + \
46 (sizeof(arm_lpae_iopte) << (d)->bits_per_level)
48 (sizeof(arm_lpae_iopte) << (d)->pgd_bits)
[all …]
/linux/arch/x86/pci/
H A Dmmconfig_64.c1 // SPDX-License-Identifier: GPL-2.0
3 * mmconfig.c - Low-level direct PCI config space access via MMCONFIG
21 struct pci_mmcfg_region *cfg = pci_mmconfig_lookup(seg, bus); in pci_dev_base() local
23 if (cfg && cfg->virt) in pci_dev_base()
24 return cfg->virt + (PCI_MMCFG_BUS_OFFSET(bus) | (devfn << 12)); in pci_dev_base()
33 /* Why do we have this when nobody checks it. How about a BUG()!? -AK */ in pci_mmcfg_read()
35 err: *value = -1; in pci_mmcfg_read()
36 return -EINVAL; in pci_mmcfg_read()
67 /* Why do we have this when nobody checks it. How about a BUG()!? -AK */ in pci_mmcfg_write()
69 return -EINVAL; in pci_mmcfg_write()
[all …]
/linux/drivers/net/ethernet/netronome/nfp/crypto/
H A Dipsec.c1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
92 struct nfp_ipsec_aesgcm { /* AES-GCM-ESP fields */
135 unsigned int offset = nn->tlv_caps.mbox_off + NFP_NET_CFG_MBOX_SIMPLE_VAL; in nfp_net_ipsec_cfg()
136 struct nfp_ipsec_cfg_mssg *msg = (struct nfp_ipsec_cfg_mssg *)entry->msg; in nfp_net_ipsec_cfg()
143 msg_size = ARRAY_SIZE(msg->raw); in nfp_net_ipsec_cfg()
145 nn_writel(nn, offset + 4 * i, msg->raw[i]); in nfp_net_ipsec_cfg()
147 ret = nfp_net_mbox_reconfig(nn, entry->cmd); in nfp_net_ipsec_cfg()
155 msg->raw[i] = nn_readl(nn, offset + 4 * i); in nfp_net_ipsec_cfg()
159 switch (msg->rsp) { in nfp_net_ipsec_cfg()
163 return -EINVAL; in nfp_net_ipsec_cfg()
[all …]

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