Lines Matching +full:- +full:cfg
1 // SPDX-License-Identifier: GPL-2.0
24 #define DRV_NAME "Marvell-CGX/RPM"
80 return (cgx->pdev->device == PCI_DEVID_CN10K_RPM) || in is_dev_rpm()
81 (cgx->pdev->device == PCI_DEVID_CN10KB_RPM); in is_dev_rpm()
86 if (!cgx || lmac_id < 0 || lmac_id >= cgx->max_lmac_per_mac) in is_lmac_valid()
88 return test_bit(lmac_id, &cgx->lmac_bmap); in is_lmac_valid()
98 for_each_set_bit(tmp, &cgx->lmac_bmap, cgx->max_lmac_per_mac) { in get_sequence_id_of_lmac()
112 return ((struct cgx *)cgxd)->mac_ops; in get_mac_ops()
117 writeq(val, cgx->reg_base + (lmac << cgx->mac_ops->lmac_offset) + in cgx_write()
123 return readq(cgx->reg_base + (lmac << cgx->mac_ops->lmac_offset) + in cgx_read()
129 if (!cgx || lmac_id >= cgx->max_lmac_per_mac) in lmac_pdata()
132 return cgx->lmac_idmap[lmac_id]; in lmac_pdata()
138 int idmax = -ENODEV; in cgx_get_cgxcnt_max()
141 if (cgx_dev->cgx_id > idmax) in cgx_get_cgxcnt_max()
142 idmax = cgx_dev->cgx_id; in cgx_get_cgxcnt_max()
155 return -ENODEV; in cgx_get_lmac_cnt()
157 return cgx->lmac_count; in cgx_get_lmac_cnt()
165 if (cgx_dev->cgx_id == cgx_id) in cgx_get_pdata()
197 return -EINVAL; in cgx_get_cgxid()
199 return cgx->cgx_id; in cgx_get_cgxid()
205 u64 cfg; in cgx_lmac_get_p2x() local
207 cfg = cgx_read(cgx_dev, lmac_id, CGXX_CMRX_CFG); in cgx_lmac_get_p2x()
209 return (cfg & CMR_P2X_SEL_MASK) >> CMR_P2X_SEL_SHIFT; in cgx_lmac_get_p2x()
223 return -ENODEV; in cgx_get_link_info()
225 *linfo = lmac->link_info; in cgx_get_link_info()
235 u64 cfg; in cgx_lmac_addr_set() local
238 return -ENODEV; in cgx_lmac_addr_set()
241 mac_ops = cgx_dev->mac_ops; in cgx_lmac_addr_set()
244 /* memcpy(&cfg, mac_addr, 6); */ in cgx_lmac_addr_set()
246 cfg = ether_addr_to_u64(mac_addr); in cgx_lmac_addr_set()
250 index = id * lmac->mac_to_index_bmap.max; in cgx_lmac_addr_set()
253 cfg | CGX_DMAC_CAM_ADDR_ENABLE | ((u64)lmac_id << 49)); in cgx_lmac_addr_set()
255 cfg = cgx_read(cgx_dev, lmac_id, CGXX_CMRX_RX_DMAC_CTL0); in cgx_lmac_addr_set()
256 cfg |= (CGX_DMAC_CTL0_CAM_ENABLE | CGX_DMAC_BCAST_MODE | in cgx_lmac_addr_set()
258 cgx_write(cgx_dev, lmac_id, CGXX_CMRX_RX_DMAC_CTL0, cfg); in cgx_lmac_addr_set()
273 mac_ops = cgx->mac_ops; in cgx_read_dmac_ctrl()
287 mac_ops = cgx->mac_ops; in cgx_read_dmac_entry()
297 u64 cfg = 0; in cgx_lmac_addr_add() local
301 return -ENODEV; in cgx_lmac_addr_add()
303 mac_ops = cgx_dev->mac_ops; in cgx_lmac_addr_add()
305 idx = rvu_alloc_rsrc(&lmac->mac_to_index_bmap); in cgx_lmac_addr_add()
311 index = id * lmac->mac_to_index_bmap.max + idx; in cgx_lmac_addr_add()
313 cfg = ether_addr_to_u64(mac_addr); in cgx_lmac_addr_add()
314 cfg |= CGX_DMAC_CAM_ADDR_ENABLE; in cgx_lmac_addr_add()
315 cfg |= ((u64)lmac_id << 49); in cgx_lmac_addr_add()
316 cgx_write(cgx_dev, 0, (CGXX_CMRX_RX_DMAC_CAM0 + (index * 0x8)), cfg); in cgx_lmac_addr_add()
318 cfg = cgx_read(cgx_dev, lmac_id, CGXX_CMRX_RX_DMAC_CTL0); in cgx_lmac_addr_add()
319 cfg |= (CGX_DMAC_BCAST_MODE | CGX_DMAC_CAM_ACCEPT); in cgx_lmac_addr_add()
322 cfg &= ~GENMASK_ULL(2, 1); in cgx_lmac_addr_add()
323 cfg |= CGX_DMAC_MCAST_MODE_CAM; in cgx_lmac_addr_add()
324 lmac->mcast_filters_count++; in cgx_lmac_addr_add()
325 } else if (!lmac->mcast_filters_count) { in cgx_lmac_addr_add()
326 cfg |= CGX_DMAC_MCAST_MODE; in cgx_lmac_addr_add()
329 cgx_write(cgx_dev, lmac_id, CGXX_CMRX_RX_DMAC_CTL0, cfg); in cgx_lmac_addr_add()
340 u64 cfg; in cgx_lmac_addr_reset() local
343 return -ENODEV; in cgx_lmac_addr_reset()
345 mac_ops = cgx_dev->mac_ops; in cgx_lmac_addr_reset()
349 set_bit(0, lmac->mac_to_index_bmap.bmap); in cgx_lmac_addr_reset()
353 index = id * lmac->mac_to_index_bmap.max + index; in cgx_lmac_addr_reset()
357 cfg = cgx_read(cgx_dev, lmac_id, CGXX_CMRX_RX_DMAC_CTL0); in cgx_lmac_addr_reset()
358 cfg &= ~CGX_DMAC_CAM_ACCEPT; in cgx_lmac_addr_reset()
359 cfg |= (CGX_DMAC_BCAST_MODE | CGX_DMAC_MCAST_MODE); in cgx_lmac_addr_reset()
360 cgx_write(cgx_dev, lmac_id, CGXX_CMRX_RX_DMAC_CTL0, cfg); in cgx_lmac_addr_reset()
374 u64 cfg; in cgx_lmac_addr_update() local
379 return -ENODEV; in cgx_lmac_addr_update()
381 mac_ops = cgx_dev->mac_ops; in cgx_lmac_addr_update()
383 if (index >= lmac->mac_to_index_bmap.max) in cgx_lmac_addr_update()
384 return -EINVAL; in cgx_lmac_addr_update()
387 if (!test_bit(index, lmac->mac_to_index_bmap.bmap)) in cgx_lmac_addr_update()
388 return -EINVAL; in cgx_lmac_addr_update()
392 index = id * lmac->mac_to_index_bmap.max + index; in cgx_lmac_addr_update()
394 cfg = cgx_read(cgx_dev, 0, (CGXX_CMRX_RX_DMAC_CAM0 + (index * 0x8))); in cgx_lmac_addr_update()
395 cfg &= ~CGX_RX_DMAC_ADR_MASK; in cgx_lmac_addr_update()
396 cfg |= ether_addr_to_u64(mac_addr); in cgx_lmac_addr_update()
398 cgx_write(cgx_dev, 0, (CGXX_CMRX_RX_DMAC_CAM0 + (index * 0x8)), cfg); in cgx_lmac_addr_update()
408 u64 cfg; in cgx_lmac_addr_del() local
412 return -ENODEV; in cgx_lmac_addr_del()
414 mac_ops = cgx_dev->mac_ops; in cgx_lmac_addr_del()
416 if (index >= lmac->mac_to_index_bmap.max) in cgx_lmac_addr_del()
417 return -EINVAL; in cgx_lmac_addr_del()
423 rvu_free_rsrc(&lmac->mac_to_index_bmap, index); in cgx_lmac_addr_del()
427 index = id * lmac->mac_to_index_bmap.max + index; in cgx_lmac_addr_del()
430 cfg = cgx_read(cgx_dev, 0, (CGXX_CMRX_RX_DMAC_CAM0 + (index * 0x8))); in cgx_lmac_addr_del()
432 u64_to_ether_addr(cfg, mac); in cgx_lmac_addr_del()
434 lmac->mcast_filters_count--; in cgx_lmac_addr_del()
436 if (!lmac->mcast_filters_count) { in cgx_lmac_addr_del()
437 cfg = cgx_read(cgx_dev, lmac_id, CGXX_CMRX_RX_DMAC_CTL0); in cgx_lmac_addr_del()
438 cfg &= ~GENMASK_ULL(2, 1); in cgx_lmac_addr_del()
439 cfg |= CGX_DMAC_MCAST_MODE; in cgx_lmac_addr_del()
440 cgx_write(cgx_dev, lmac_id, CGXX_CMRX_RX_DMAC_CTL0, cfg); in cgx_lmac_addr_del()
454 return lmac->mac_to_index_bmap.max; in cgx_lmac_addr_max_entries_get()
465 u64 cfg; in cgx_lmac_addr_get() local
468 mac_ops = cgx_dev->mac_ops; in cgx_lmac_addr_get()
472 index = id * lmac->mac_to_index_bmap.max; in cgx_lmac_addr_get()
474 cfg = cgx_read(cgx_dev, 0, CGXX_CMRX_RX_DMAC_CAM0 + index * 0x8); in cgx_lmac_addr_get()
475 return cfg & CGX_RX_DMAC_ADR_MASK; in cgx_lmac_addr_get()
483 return -ENODEV; in cgx_set_pkind()
485 cgx_write(cgx, lmac_id, cgx->mac_ops->rxid_map_offset, (pkind & 0x3F)); in cgx_set_pkind()
492 u64 cfg; in cgx_get_lmac_type() local
494 cfg = cgx_read(cgx, lmac_id, CGXX_CMRX_CFG); in cgx_get_lmac_type()
495 return (cfg >> CGX_LMAC_TYPE_SHIFT) & CGX_LMAC_TYPE_MASK; in cgx_get_lmac_type()
504 fifo_len = cgx->mac_ops->fifo_len; in cgx_get_lmac_fifo_len()
505 num_lmacs = cgx->mac_ops->get_nr_lmacs(cgx); in cgx_get_lmac_fifo_len()
529 u64 cfg; in cgx_lmac_internal_loopback() local
532 return -ENODEV; in cgx_lmac_internal_loopback()
535 if (lmac->lmac_type == LMAC_MODE_SGMII || in cgx_lmac_internal_loopback()
536 lmac->lmac_type == LMAC_MODE_QSGMII) { in cgx_lmac_internal_loopback()
537 cfg = cgx_read(cgx, lmac_id, CGXX_GMP_PCS_MRX_CTL); in cgx_lmac_internal_loopback()
539 cfg |= CGXX_GMP_PCS_MRX_CTL_LBK; in cgx_lmac_internal_loopback()
541 cfg &= ~CGXX_GMP_PCS_MRX_CTL_LBK; in cgx_lmac_internal_loopback()
542 cgx_write(cgx, lmac_id, CGXX_GMP_PCS_MRX_CTL, cfg); in cgx_lmac_internal_loopback()
544 cfg = cgx_read(cgx, lmac_id, CGXX_SPUX_CONTROL1); in cgx_lmac_internal_loopback()
546 cfg |= CGXX_SPUX_CONTROL1_LBK; in cgx_lmac_internal_loopback()
548 cfg &= ~CGXX_SPUX_CONTROL1_LBK; in cgx_lmac_internal_loopback()
549 cgx_write(cgx, lmac_id, CGXX_SPUX_CONTROL1, cfg); in cgx_lmac_internal_loopback()
561 u64 cfg = 0; in cgx_lmac_promisc_config() local
567 max_dmac = lmac->mac_to_index_bmap.max; in cgx_lmac_promisc_config()
570 mac_ops = cgx->mac_ops; in cgx_lmac_promisc_config()
573 cfg = cgx_read(cgx, lmac_id, CGXX_CMRX_RX_DMAC_CTL0); in cgx_lmac_promisc_config()
574 cfg &= ~CGX_DMAC_CAM_ACCEPT; in cgx_lmac_promisc_config()
575 cfg |= (CGX_DMAC_BCAST_MODE | CGX_DMAC_MCAST_MODE); in cgx_lmac_promisc_config()
576 cgx_write(cgx, lmac_id, CGXX_CMRX_RX_DMAC_CTL0, cfg); in cgx_lmac_promisc_config()
580 cfg = cgx_read(cgx, 0, in cgx_lmac_promisc_config()
582 cfg &= ~CGX_DMAC_CAM_ADDR_ENABLE; in cgx_lmac_promisc_config()
584 (CGXX_CMRX_RX_DMAC_CAM0 + index * 0x8), cfg); in cgx_lmac_promisc_config()
588 cfg = cgx_read(cgx, lmac_id, CGXX_CMRX_RX_DMAC_CTL0); in cgx_lmac_promisc_config()
589 cfg |= CGX_DMAC_CAM_ACCEPT | CGX_DMAC_MCAST_MODE; in cgx_lmac_promisc_config()
590 cgx_write(cgx, lmac_id, CGXX_CMRX_RX_DMAC_CTL0, cfg); in cgx_lmac_promisc_config()
593 cfg = cgx_read(cgx, 0, in cgx_lmac_promisc_config()
595 if ((cfg & CGX_RX_DMAC_ADR_MASK) != 0) { in cgx_lmac_promisc_config()
596 cfg |= CGX_DMAC_CAM_ADDR_ENABLE; in cgx_lmac_promisc_config()
600 cfg); in cgx_lmac_promisc_config()
610 u64 cfg; in cgx_lmac_get_pause_frm_status() local
616 return -ENODEV; in cgx_lmac_get_pause_frm_status()
618 cfg = cgx_read(cgx, lmac_id, CGXX_SMUX_RX_FRM_CTL); in cgx_lmac_get_pause_frm_status()
619 *rx_pause = !!(cfg & CGX_SMUX_RX_FRM_CTL_CTL_BCK); in cgx_lmac_get_pause_frm_status()
621 cfg = cgx_read(cgx, lmac_id, CGXX_SMUX_TX_CTL); in cgx_lmac_get_pause_frm_status()
622 *tx_pause = !!(cfg & CGX_SMUX_TX_CTL_L2P_BP_CONV); in cgx_lmac_get_pause_frm_status()
633 u64 cfg; in cgx_lmac_enadis_rx_pause_fwding() local
643 if (!bitmap_weight(lmac->rx_fc_pfvf_bmap.bmap, lmac->rx_fc_pfvf_bmap.max)) in cgx_lmac_enadis_rx_pause_fwding()
651 cfg = cgx_read(cgx, lmac_id, CGXX_GMP_GMI_RXX_FRM_CTL); in cgx_lmac_enadis_rx_pause_fwding()
652 cfg |= CGX_GMP_GMI_RXX_FRM_CTL_CTL_BCK; in cgx_lmac_enadis_rx_pause_fwding()
653 cgx_write(cgx, lmac_id, CGXX_GMP_GMI_RXX_FRM_CTL, cfg); in cgx_lmac_enadis_rx_pause_fwding()
655 cfg = cgx_read(cgx, lmac_id, CGXX_SMUX_RX_FRM_CTL); in cgx_lmac_enadis_rx_pause_fwding()
656 cfg |= CGX_SMUX_RX_FRM_CTL_CTL_BCK; in cgx_lmac_enadis_rx_pause_fwding()
657 cgx_write(cgx, lmac_id, CGXX_SMUX_RX_FRM_CTL, cfg); in cgx_lmac_enadis_rx_pause_fwding()
659 cfg = cgx_read(cgx, lmac_id, CGXX_SMUX_CBFC_CTL); in cgx_lmac_enadis_rx_pause_fwding()
660 cfg |= CGXX_SMUX_CBFC_CTL_BCK_EN; in cgx_lmac_enadis_rx_pause_fwding()
661 cgx_write(cgx, lmac_id, CGXX_SMUX_CBFC_CTL, cfg); in cgx_lmac_enadis_rx_pause_fwding()
666 cfg = cgx_read(cgx, lmac_id, CGXX_GMP_GMI_RXX_FRM_CTL); in cgx_lmac_enadis_rx_pause_fwding()
667 cfg &= ~CGX_GMP_GMI_RXX_FRM_CTL_CTL_BCK; in cgx_lmac_enadis_rx_pause_fwding()
668 cgx_write(cgx, lmac_id, CGXX_GMP_GMI_RXX_FRM_CTL, cfg); in cgx_lmac_enadis_rx_pause_fwding()
670 cfg = cgx_read(cgx, lmac_id, CGXX_SMUX_RX_FRM_CTL); in cgx_lmac_enadis_rx_pause_fwding()
671 cfg &= ~CGX_SMUX_RX_FRM_CTL_CTL_BCK; in cgx_lmac_enadis_rx_pause_fwding()
672 cgx_write(cgx, lmac_id, CGXX_SMUX_RX_FRM_CTL, cfg); in cgx_lmac_enadis_rx_pause_fwding()
674 cfg = cgx_read(cgx, lmac_id, CGXX_SMUX_CBFC_CTL); in cgx_lmac_enadis_rx_pause_fwding()
675 cfg &= ~CGXX_SMUX_CBFC_CTL_BCK_EN; in cgx_lmac_enadis_rx_pause_fwding()
676 cgx_write(cgx, lmac_id, CGXX_SMUX_CBFC_CTL, cfg); in cgx_lmac_enadis_rx_pause_fwding()
686 return -ENODEV; in cgx_get_rx_stats()
696 return -ENODEV; in cgx_get_tx_stats()
703 return ((struct cgx *)cgxd)->hw_features; in cgx_features_get()
712 return -ENODEV; in cgx_stats_reset()
716 /* pass lmac as 0 for CGX_CMR_RX_STAT9-12 */ in cgx_stats_reset()
732 if (!linfo->fec) in cgx_set_fec_stats_count()
735 switch (linfo->lmac_type_id) { in cgx_set_fec_stats_count()
749 if (linfo->fec == OTX2_FEC_BASER) in cgx_set_fec_stats_count()
765 return -ENODEV; in cgx_get_fec_stats()
767 if (cgx->lmac_idmap[lmac_id]->link_info.fec == OTX2_FEC_NONE) in cgx_get_fec_stats()
771 cgx_set_fec_stats_count(&cgx->lmac_idmap[lmac_id]->link_info); in cgx_get_fec_stats()
772 if (cgx->lmac_idmap[lmac_id]->link_info.fec == OTX2_FEC_BASER) { in cgx_get_fec_stats()
780 rsp->fec_corr_blks += in cgx_get_fec_stats()
782 rsp->fec_uncorr_blks += in cgx_get_fec_stats()
791 u64 cfg; in cgx_lmac_rx_tx_enable() local
794 return -ENODEV; in cgx_lmac_rx_tx_enable()
796 cfg = cgx_read(cgx, lmac_id, CGXX_CMRX_CFG); in cgx_lmac_rx_tx_enable()
798 cfg |= DATA_PKT_RX_EN | DATA_PKT_TX_EN; in cgx_lmac_rx_tx_enable()
800 cfg &= ~(DATA_PKT_RX_EN | DATA_PKT_TX_EN); in cgx_lmac_rx_tx_enable()
801 cgx_write(cgx, lmac_id, CGXX_CMRX_CFG, cfg); in cgx_lmac_rx_tx_enable()
808 u64 cfg, last; in cgx_lmac_tx_enable() local
811 return -ENODEV; in cgx_lmac_tx_enable()
813 cfg = cgx_read(cgx, lmac_id, CGXX_CMRX_CFG); in cgx_lmac_tx_enable()
814 last = cfg; in cgx_lmac_tx_enable()
816 cfg |= DATA_PKT_TX_EN; in cgx_lmac_tx_enable()
818 cfg &= ~DATA_PKT_TX_EN; in cgx_lmac_tx_enable()
820 if (cfg != last) in cgx_lmac_tx_enable()
821 cgx_write(cgx, lmac_id, CGXX_CMRX_CFG, cfg); in cgx_lmac_tx_enable()
829 u64 cfg; in cgx_lmac_enadis_pause_frm() local
835 return -ENODEV; in cgx_lmac_enadis_pause_frm()
837 cfg = cgx_read(cgx, lmac_id, CGXX_GMP_GMI_RXX_FRM_CTL); in cgx_lmac_enadis_pause_frm()
838 cfg &= ~CGX_GMP_GMI_RXX_FRM_CTL_CTL_BCK; in cgx_lmac_enadis_pause_frm()
839 cfg |= rx_pause ? CGX_GMP_GMI_RXX_FRM_CTL_CTL_BCK : 0x0; in cgx_lmac_enadis_pause_frm()
840 cgx_write(cgx, lmac_id, CGXX_GMP_GMI_RXX_FRM_CTL, cfg); in cgx_lmac_enadis_pause_frm()
842 cfg = cgx_read(cgx, lmac_id, CGXX_SMUX_RX_FRM_CTL); in cgx_lmac_enadis_pause_frm()
843 cfg &= ~CGX_SMUX_RX_FRM_CTL_CTL_BCK; in cgx_lmac_enadis_pause_frm()
844 cfg |= rx_pause ? CGX_SMUX_RX_FRM_CTL_CTL_BCK : 0x0; in cgx_lmac_enadis_pause_frm()
845 cgx_write(cgx, lmac_id, CGXX_SMUX_RX_FRM_CTL, cfg); in cgx_lmac_enadis_pause_frm()
847 cfg = cgx_read(cgx, lmac_id, CGXX_SMUX_TX_CTL); in cgx_lmac_enadis_pause_frm()
848 cfg &= ~CGX_SMUX_TX_CTL_L2P_BP_CONV; in cgx_lmac_enadis_pause_frm()
849 cfg |= tx_pause ? CGX_SMUX_TX_CTL_L2P_BP_CONV : 0x0; in cgx_lmac_enadis_pause_frm()
850 cgx_write(cgx, lmac_id, CGXX_SMUX_TX_CTL, cfg); in cgx_lmac_enadis_pause_frm()
852 cfg = cgx_read(cgx, 0, CGXX_CMR_RX_OVR_BP); in cgx_lmac_enadis_pause_frm()
854 cfg &= ~CGX_CMR_RX_OVR_BP_EN(lmac_id); in cgx_lmac_enadis_pause_frm()
856 cfg |= CGX_CMR_RX_OVR_BP_EN(lmac_id); in cgx_lmac_enadis_pause_frm()
857 cfg &= ~CGX_CMR_RX_OVR_BP_BP(lmac_id); in cgx_lmac_enadis_pause_frm()
859 cgx_write(cgx, 0, CGXX_CMR_RX_OVR_BP, cfg); in cgx_lmac_enadis_pause_frm()
866 u64 cfg; in cgx_lmac_pause_frm_config() local
875 cfg = cgx_read(cgx, lmac_id, CGXX_SMUX_TX_PAUSE_PKT_INTERVAL); in cgx_lmac_pause_frm_config()
876 cfg &= ~0xFFFFULL; in cgx_lmac_pause_frm_config()
878 cfg | (DEFAULT_PAUSE_TIME / 2)); in cgx_lmac_pause_frm_config()
883 cfg = cgx_read(cgx, lmac_id, in cgx_lmac_pause_frm_config()
885 cfg &= ~0xFFFFULL; in cgx_lmac_pause_frm_config()
887 cfg | (DEFAULT_PAUSE_TIME / 2)); in cgx_lmac_pause_frm_config()
891 cfg = cgx_read(cgx, lmac_id, CGXX_SMUX_RX_FRM_CTL); in cgx_lmac_pause_frm_config()
892 cfg &= ~CGX_SMUX_RX_FRM_CTL_CTL_BCK; in cgx_lmac_pause_frm_config()
893 cgx_write(cgx, lmac_id, CGXX_SMUX_RX_FRM_CTL, cfg); in cgx_lmac_pause_frm_config()
895 cfg = cgx_read(cgx, lmac_id, CGXX_GMP_GMI_RXX_FRM_CTL); in cgx_lmac_pause_frm_config()
896 cfg &= ~CGX_GMP_GMI_RXX_FRM_CTL_CTL_BCK; in cgx_lmac_pause_frm_config()
897 cgx_write(cgx, lmac_id, CGXX_GMP_GMI_RXX_FRM_CTL, cfg); in cgx_lmac_pause_frm_config()
900 cfg = cgx_read(cgx, lmac_id, CGXX_SMUX_TX_CTL); in cgx_lmac_pause_frm_config()
901 cfg &= ~CGX_SMUX_TX_CTL_L2P_BP_CONV; in cgx_lmac_pause_frm_config()
902 cgx_write(cgx, lmac_id, CGXX_SMUX_TX_CTL, cfg); in cgx_lmac_pause_frm_config()
904 cfg = cgx_read(cgx, 0, CGXX_CMR_RX_OVR_BP); in cgx_lmac_pause_frm_config()
905 cfg |= CGX_CMR_RX_OVR_BP_EN(lmac_id); in cgx_lmac_pause_frm_config()
906 cfg &= ~CGX_CMR_RX_OVR_BP_BP(lmac_id); in cgx_lmac_pause_frm_config()
907 cgx_write(cgx, 0, CGXX_CMR_RX_OVR_BP, cfg); in cgx_lmac_pause_frm_config()
910 cfg = cgx_read(cgx, lmac_id, CGXX_SMUX_CBFC_CTL); in cgx_lmac_pause_frm_config()
911 cfg = FIELD_SET(CGX_PFC_CLASS_MASK, 0, cfg); in cgx_lmac_pause_frm_config()
912 cgx_write(cgx, lmac_id, CGXX_SMUX_CBFC_CTL, cfg); in cgx_lmac_pause_frm_config()
923 return -ENODEV; in verify_lmac_fc_cfg()
926 clear_bit(pfvf_idx, lmac->rx_fc_pfvf_bmap.bmap); in verify_lmac_fc_cfg()
928 set_bit(pfvf_idx, lmac->rx_fc_pfvf_bmap.bmap); in verify_lmac_fc_cfg()
931 clear_bit(pfvf_idx, lmac->tx_fc_pfvf_bmap.bmap); in verify_lmac_fc_cfg()
933 set_bit(pfvf_idx, lmac->tx_fc_pfvf_bmap.bmap); in verify_lmac_fc_cfg()
936 if (!rx_pause && bitmap_weight(lmac->rx_fc_pfvf_bmap.bmap, lmac->rx_fc_pfvf_bmap.max)) { in verify_lmac_fc_cfg()
937 dev_warn(&cgx->pdev->dev, in verify_lmac_fc_cfg()
939 return -EPERM; in verify_lmac_fc_cfg()
942 if (!tx_pause && bitmap_weight(lmac->tx_fc_pfvf_bmap.bmap, lmac->tx_fc_pfvf_bmap.max)) { in verify_lmac_fc_cfg()
943 dev_warn(&cgx->pdev->dev, in verify_lmac_fc_cfg()
945 return -EPERM; in verify_lmac_fc_cfg()
955 u64 cfg; in cgx_lmac_pfc_config() local
958 return -ENODEV; in cgx_lmac_pfc_config()
964 cfg = cgx_read(cgx, lmac_id, CGXX_SMUX_CBFC_CTL); in cgx_lmac_pfc_config()
965 pfc_en |= FIELD_GET(CGX_PFC_CLASS_MASK, cfg); in cgx_lmac_pfc_config()
968 cfg |= (CGXX_SMUX_CBFC_CTL_RX_EN | in cgx_lmac_pfc_config()
972 cfg &= ~(CGXX_SMUX_CBFC_CTL_RX_EN | in cgx_lmac_pfc_config()
978 cfg |= CGXX_SMUX_CBFC_CTL_TX_EN; in cgx_lmac_pfc_config()
979 cfg = FIELD_SET(CGX_PFC_CLASS_MASK, pfc_en, cfg); in cgx_lmac_pfc_config()
981 cfg &= ~CGXX_SMUX_CBFC_CTL_TX_EN; in cgx_lmac_pfc_config()
982 cfg = FIELD_SET(CGX_PFC_CLASS_MASK, 0, cfg); in cgx_lmac_pfc_config()
985 cgx_write(cgx, lmac_id, CGXX_SMUX_CBFC_CTL, cfg); in cgx_lmac_pfc_config()
988 cfg = cgx_lmac_addr_get(cgx->cgx_id, lmac_id); in cgx_lmac_pfc_config()
989 cgx_write(cgx, lmac_id, CGXX_SMUX_SMAC, cfg); in cgx_lmac_pfc_config()
998 u64 cfg; in cgx_lmac_get_pfc_frm_cfg() local
1001 return -ENODEV; in cgx_lmac_get_pfc_frm_cfg()
1003 cfg = cgx_read(cgx, lmac_id, CGXX_SMUX_CBFC_CTL); in cgx_lmac_get_pfc_frm_cfg()
1005 *rx_pause = !!(cfg & CGXX_SMUX_CBFC_CTL_RX_EN); in cgx_lmac_get_pfc_frm_cfg()
1006 *tx_pause = !!(cfg & CGXX_SMUX_CBFC_CTL_TX_EN); in cgx_lmac_get_pfc_frm_cfg()
1014 u64 cfg; in cgx_lmac_ptp_config() local
1021 cfg = cgx_read(cgx, lmac_id, CGXX_GMP_GMI_RXX_FRM_CTL); in cgx_lmac_ptp_config()
1022 cfg |= CGX_GMP_GMI_RXX_FRM_CTL_PTP_MODE; in cgx_lmac_ptp_config()
1023 cgx_write(cgx, lmac_id, CGXX_GMP_GMI_RXX_FRM_CTL, cfg); in cgx_lmac_ptp_config()
1025 cfg = cgx_read(cgx, lmac_id, CGXX_SMUX_RX_FRM_CTL); in cgx_lmac_ptp_config()
1026 cfg |= CGX_SMUX_RX_FRM_CTL_PTP_MODE; in cgx_lmac_ptp_config()
1027 cgx_write(cgx, lmac_id, CGXX_SMUX_RX_FRM_CTL, cfg); in cgx_lmac_ptp_config()
1030 cfg = cgx_read(cgx, lmac_id, CGXX_GMP_GMI_RXX_FRM_CTL); in cgx_lmac_ptp_config()
1031 cfg &= ~CGX_GMP_GMI_RXX_FRM_CTL_PTP_MODE; in cgx_lmac_ptp_config()
1032 cgx_write(cgx, lmac_id, CGXX_GMP_GMI_RXX_FRM_CTL, cfg); in cgx_lmac_ptp_config()
1034 cfg = cgx_read(cgx, lmac_id, CGXX_SMUX_RX_FRM_CTL); in cgx_lmac_ptp_config()
1035 cfg &= ~CGX_SMUX_RX_FRM_CTL_PTP_MODE; in cgx_lmac_ptp_config()
1036 cgx_write(cgx, lmac_id, CGXX_SMUX_RX_FRM_CTL, cfg); in cgx_lmac_ptp_config()
1043 struct cgx *cgx = lmac->cgx; in cgx_fwi_cmd_send()
1049 err = mutex_lock_interruptible(&lmac->cmd_lock); in cgx_fwi_cmd_send()
1054 cmd = cgx_read(cgx, lmac->lmac_id, CGX_COMMAND_REG); in cgx_fwi_cmd_send()
1056 err = -EBUSY; in cgx_fwi_cmd_send()
1064 lmac->cmd_pend = true; in cgx_fwi_cmd_send()
1067 cgx_write(cgx, lmac->lmac_id, CGX_COMMAND_REG, req); in cgx_fwi_cmd_send()
1070 if (!wait_event_timeout(lmac->wq_cmd_cmplt, !lmac->cmd_pend, in cgx_fwi_cmd_send()
1072 dev = &cgx->pdev->dev; in cgx_fwi_cmd_send()
1074 cgx->cgx_id, lmac->lmac_id, FIELD_GET(CMDREG_ID, req)); in cgx_fwi_cmd_send()
1081 *resp = lmac->resp; in cgx_fwi_cmd_send()
1084 mutex_unlock(&lmac->cmd_lock); in cgx_fwi_cmd_send()
1096 return -ENODEV; in cgx_fwi_cmd_generic()
1103 return -EIO; in cgx_fwi_cmd_generic()
1150 if (args->duplex == DUPLEX_UNKNOWN) in set_mod_args()
1151 args->duplex = duplex; in set_mod_args()
1152 if (args->speed == SPEED_UNKNOWN) in set_mod_args()
1153 args->speed = speed; in set_mod_args()
1154 if (args->an == AUTONEG_UNKNOWN) in set_mod_args()
1155 args->an = autoneg; in set_mod_args()
1156 args->mode = mode; in set_mod_args()
1157 args->ports = 0; in set_mod_args()
1252 linfo->link_up = FIELD_GET(RESP_LINKSTAT_UP, lstat); in link_status_user_format()
1253 linfo->full_duplex = FIELD_GET(RESP_LINKSTAT_FDUPLEX, lstat); in link_status_user_format()
1254 linfo->speed = cgx_speed_mbps[FIELD_GET(RESP_LINKSTAT_SPEED, lstat)]; in link_status_user_format()
1255 linfo->an = FIELD_GET(RESP_LINKSTAT_AN, lstat); in link_status_user_format()
1256 linfo->fec = FIELD_GET(RESP_LINKSTAT_FEC, lstat); in link_status_user_format()
1257 linfo->lmac_type_id = FIELD_GET(RESP_LINKSTAT_LMAC_TYPE, lstat); in link_status_user_format()
1259 if (linfo->lmac_type_id >= LMAC_MODE_MAX) { in link_status_user_format()
1260 dev_err(&cgx->pdev->dev, "Unknown lmac_type_id %d reported by firmware on cgx port%d:%d", in link_status_user_format()
1261 linfo->lmac_type_id, cgx->cgx_id, lmac_id); in link_status_user_format()
1262 strscpy(linfo->lmac_type, "Unknown", sizeof(linfo->lmac_type)); in link_status_user_format()
1266 strscpy(linfo->lmac_type, cgx_lmactype_string[linfo->lmac_type_id], in link_status_user_format()
1267 sizeof(linfo->lmac_type)); in link_status_user_format()
1275 struct cgx *cgx = lmac->cgx; in cgx_link_change_handler()
1280 dev = &cgx->pdev->dev; in cgx_link_change_handler()
1282 link_status_user_format(lstat, &event.link_uinfo, cgx, lmac->lmac_id); in cgx_link_change_handler()
1285 event.cgx_id = cgx->cgx_id; in cgx_link_change_handler()
1286 event.lmac_id = lmac->lmac_id; in cgx_link_change_handler()
1289 lmac->link_info = event.link_uinfo; in cgx_link_change_handler()
1290 linfo = &lmac->link_info; in cgx_link_change_handler()
1296 spin_lock(&lmac->event_cb_lock); in cgx_link_change_handler()
1298 if (!lmac->event_cb.notify_link_chg) { in cgx_link_change_handler()
1300 cgx->cgx_id, lmac->lmac_id); in cgx_link_change_handler()
1303 cgx->cgx_id, lmac->lmac_id, err_type); in cgx_link_change_handler()
1306 cgx->cgx_id, lmac->lmac_id, in cgx_link_change_handler()
1307 linfo->link_up ? "UP" : "DOWN", linfo->speed); in cgx_link_change_handler()
1311 if (lmac->event_cb.notify_link_chg(&event, lmac->event_cb.data)) in cgx_link_change_handler()
1314 spin_unlock(&lmac->event_cb_lock); in cgx_link_change_handler()
1344 cgx = lmac->cgx; in cgx_fwi_event_handler()
1347 offset = cgx->mac_ops->int_register; in cgx_fwi_event_handler()
1348 clear_bit = cgx->mac_ops->int_ena_bit; in cgx_fwi_event_handler()
1350 event = cgx_read(cgx, lmac->lmac_id, CGX_EVENT_REG); in cgx_fwi_event_handler()
1360 lmac->resp = event; in cgx_fwi_event_handler()
1371 lmac->cmd_pend = false; in cgx_fwi_event_handler()
1372 wake_up(&lmac->wq_cmd_cmplt); in cgx_fwi_event_handler()
1384 cgx_write(lmac->cgx, lmac->lmac_id, CGX_EVENT_REG, 0); in cgx_fwi_event_handler()
1385 cgx_write(lmac->cgx, lmac->lmac_id, offset, clear_bit); in cgx_fwi_event_handler()
1400 return -ENODEV; in cgx_lmac_evh_register()
1402 lmac->event_cb = *cb; in cgx_lmac_evh_register()
1415 return -ENODEV; in cgx_lmac_evh_unregister()
1417 spin_lock_irqsave(&lmac->event_cb_lock, flags); in cgx_lmac_evh_unregister()
1418 lmac->event_cb.notify_link_chg = NULL; in cgx_lmac_evh_unregister()
1419 lmac->event_cb.data = NULL; in cgx_lmac_evh_unregister()
1420 spin_unlock_irqrestore(&lmac->event_cb_lock, flags); in cgx_lmac_evh_unregister()
1434 return -ENXIO; in cgx_get_fwdata_base()
1436 first_lmac = find_first_bit(&cgx->lmac_bmap, cgx->max_lmac_per_mac); in cgx_get_fwdata_base()
1452 return -ENODEV; in cgx_set_link_mode()
1457 return -EINVAL; in cgx_set_link_mode()
1477 return -ENXIO; in cgx_set_fec()
1485 cgx->lmac_idmap[lmac_id]->link_info.fec = in cgx_set_fec()
1487 return cgx->lmac_idmap[lmac_id]->link_info.fec; in cgx_set_fec()
1496 return -ENODEV; in cgx_get_phy_fec_stats()
1525 int first_lmac = find_first_bit(&cgx->lmac_bmap, cgx->max_lmac_per_mac); in cgx_fwi_read_version()
1534 struct device *dev = &cgx->pdev->dev; in cgx_lmac_verify_fwi_version()
1539 if (!cgx->lmac_count) in cgx_lmac_verify_fwi_version()
1551 return -EIO; in cgx_lmac_verify_fwi_version()
1559 struct device *dev = &cgx->pdev->dev; in cgx_lmac_linkup_work()
1563 for_each_set_bit(i, &cgx->lmac_bmap, cgx->max_lmac_per_mac) { in cgx_lmac_linkup_work()
1567 cgx->cgx_id, i); in cgx_lmac_linkup_work()
1576 return -ENODEV; in cgx_lmac_linkup_start()
1578 queue_work(cgx->cgx_cmd_workq, &cgx->cgx_cmd_work); in cgx_lmac_linkup_start()
1586 u64 cfg; in cgx_lmac_reset() local
1589 return -ENODEV; in cgx_lmac_reset()
1592 cfg = 0xff; in cgx_lmac_reset()
1593 cgx_write(cgxd, lmac_id, CGXX_CMRX_RX_LOGL_XON, cfg); in cgx_lmac_reset()
1603 struct mac_ops *mac_ops = cgx->mac_ops; in cgx_configure_interrupt()
1608 irq = pci_irq_vector(cgx->pdev, mac_ops->lmac_fwi + in cgx_configure_interrupt()
1609 cnt * mac_ops->irq_offset); in cgx_configure_interrupt()
1610 offset = mac_ops->int_set_reg; in cgx_configure_interrupt()
1611 ena_bit = mac_ops->int_ena_bit; in cgx_configure_interrupt()
1618 err = request_irq(irq, cgx_fwi_event_handler, 0, lmac->name, lmac); in cgx_configure_interrupt()
1623 cgx_write(cgx, lmac->lmac_id, offset, ena_bit); in cgx_configure_interrupt()
1638 return cgx->lmac_idmap[lmac_index]->lmac_id; in cgx_get_lmacid()
1645 return cgx->lmac_bmap; in cgx_get_lmac_bmap()
1657 if (cgx->mac_ops->non_contiguous_serdes_lane) { in cgx_lmac_init()
1666 if (cgx->lmac_count > cgx->max_lmac_per_mac) in cgx_lmac_init()
1667 cgx->lmac_count = cgx->max_lmac_per_mac; in cgx_lmac_init()
1669 for (i = 0; i < cgx->lmac_count; i++) { in cgx_lmac_init()
1672 return -ENOMEM; in cgx_lmac_init()
1673 lmac->name = kcalloc(1, sizeof("cgx_fwi_xxx_yyy"), GFP_KERNEL); in cgx_lmac_init()
1674 if (!lmac->name) { in cgx_lmac_init()
1675 err = -ENOMEM; in cgx_lmac_init()
1678 sprintf(lmac->name, "cgx_fwi_%d_%d", cgx->cgx_id, i); in cgx_lmac_init()
1679 if (cgx->mac_ops->non_contiguous_serdes_lane) { in cgx_lmac_init()
1680 lmac->lmac_id = __ffs64(lmac_list); in cgx_lmac_init()
1681 lmac_list &= ~BIT_ULL(lmac->lmac_id); in cgx_lmac_init()
1683 lmac->lmac_id = i; in cgx_lmac_init()
1686 lmac->cgx = cgx; in cgx_lmac_init()
1687 lmac->mac_to_index_bmap.max = in cgx_lmac_init()
1688 cgx->mac_ops->dmac_filter_count / in cgx_lmac_init()
1689 cgx->lmac_count; in cgx_lmac_init()
1691 err = rvu_alloc_bitmap(&lmac->mac_to_index_bmap); in cgx_lmac_init()
1696 set_bit(0, lmac->mac_to_index_bmap.bmap); in cgx_lmac_init()
1698 lmac->rx_fc_pfvf_bmap.max = 128; in cgx_lmac_init()
1699 err = rvu_alloc_bitmap(&lmac->rx_fc_pfvf_bmap); in cgx_lmac_init()
1703 lmac->tx_fc_pfvf_bmap.max = 128; in cgx_lmac_init()
1704 err = rvu_alloc_bitmap(&lmac->tx_fc_pfvf_bmap); in cgx_lmac_init()
1708 init_waitqueue_head(&lmac->wq_cmd_cmplt); in cgx_lmac_init()
1709 mutex_init(&lmac->cmd_lock); in cgx_lmac_init()
1710 spin_lock_init(&lmac->event_cb_lock); in cgx_lmac_init()
1711 err = cgx_configure_interrupt(cgx, lmac, lmac->lmac_id, false); in cgx_lmac_init()
1716 cgx->lmac_idmap[lmac->lmac_id] = lmac; in cgx_lmac_init()
1717 set_bit(lmac->lmac_id, &cgx->lmac_bmap); in cgx_lmac_init()
1718 cgx->mac_ops->mac_pause_frm_config(cgx, lmac->lmac_id, true); in cgx_lmac_init()
1719 lmac->lmac_type = cgx->mac_ops->get_lmac_type(cgx, lmac->lmac_id); in cgx_lmac_init()
1725 rvu_free_bitmap(&lmac->tx_fc_pfvf_bmap); in cgx_lmac_init()
1727 rvu_free_bitmap(&lmac->rx_fc_pfvf_bmap); in cgx_lmac_init()
1729 rvu_free_bitmap(&lmac->mac_to_index_bmap); in cgx_lmac_init()
1731 kfree(lmac->name); in cgx_lmac_init()
1742 if (cgx->cgx_cmd_workq) { in cgx_lmac_exit()
1743 destroy_workqueue(cgx->cgx_cmd_workq); in cgx_lmac_exit()
1744 cgx->cgx_cmd_workq = NULL; in cgx_lmac_exit()
1748 for_each_set_bit(i, &cgx->lmac_bmap, cgx->max_lmac_per_mac) { in cgx_lmac_exit()
1749 lmac = cgx->lmac_idmap[i]; in cgx_lmac_exit()
1752 cgx->mac_ops->mac_pause_frm_config(cgx, lmac->lmac_id, false); in cgx_lmac_exit()
1753 cgx_configure_interrupt(cgx, lmac, lmac->lmac_id, true); in cgx_lmac_exit()
1754 kfree(lmac->mac_to_index_bmap.bmap); in cgx_lmac_exit()
1755 kfree(lmac->name); in cgx_lmac_exit()
1764 u64 cfg; in cgx_populate_features() local
1766 cfg = cgx_read(cgx, 0, CGX_CONST); in cgx_populate_features()
1767 cgx->mac_ops->fifo_len = FIELD_GET(CGX_CONST_RXFIFO_SIZE, cfg); in cgx_populate_features()
1768 cgx->max_lmac_per_mac = FIELD_GET(CGX_CONST_MAX_LMACS, cfg); in cgx_populate_features()
1771 cgx->hw_features = (RVU_LMAC_FEAT_DMACF | RVU_MAC_RPM | in cgx_populate_features()
1774 cgx->hw_features = (RVU_LMAC_FEAT_FC | RVU_LMAC_FEAT_HIGIG2 | in cgx_populate_features()
1780 if (cgx->pdev->subsystem_device == PCI_SUBSYS_DEVID_CNF10KB_RPM || in cgx_get_rxid_mapoffset()
1822 struct device *dev = &pdev->dev; in cgx_probe()
1828 return -ENOMEM; in cgx_probe()
1829 cgx->pdev = pdev; in cgx_probe()
1835 cgx->mac_ops = rpm_get_mac_ops(cgx); in cgx_probe()
1837 cgx->mac_ops = &cgx_mac_ops; in cgx_probe()
1839 cgx->mac_ops->rxid_map_offset = cgx_get_rxid_mapoffset(cgx); in cgx_probe()
1855 cgx->reg_base = pcim_iomap(pdev, PCI_CFG_REG_BAR_NUM, 0); in cgx_probe()
1856 if (!cgx->reg_base) { in cgx_probe()
1858 err = -ENOMEM; in cgx_probe()
1862 cgx->lmac_count = cgx->mac_ops->get_nr_lmacs(cgx); in cgx_probe()
1863 if (!cgx->lmac_count) { in cgx_probe()
1864 dev_notice(dev, "CGX %d LMAC count is zero, skipping probe\n", cgx->cgx_id); in cgx_probe()
1865 err = -EOPNOTSUPP; in cgx_probe()
1869 nvec = pci_msix_vec_count(cgx->pdev); in cgx_probe()
1877 cgx->cgx_id = (pci_resource_start(pdev, PCI_CFG_REG_BAR_NUM) >> 24) in cgx_probe()
1881 INIT_WORK(&cgx->cgx_cmd_work, cgx_lmac_linkup_work); in cgx_probe()
1882 cgx->cgx_cmd_workq = alloc_workqueue("cgx_cmd_workq", 0, 0); in cgx_probe()
1883 if (!cgx->cgx_cmd_workq) { in cgx_probe()
1885 err = -ENOMEM; in cgx_probe()
1889 list_add(&cgx->cgx_list, &cgx_list); in cgx_probe()
1894 mutex_init(&cgx->lock); in cgx_probe()
1904 list_del(&cgx->cgx_list); in cgx_probe()
1921 list_del(&cgx->cgx_list); in cgx_remove()