1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Copyright (C) 2012 Invensense, Inc.
4 */
5
6 #include <linux/module.h>
7 #include <linux/slab.h>
8 #include <linux/i2c.h>
9 #include <linux/err.h>
10 #include <linux/delay.h>
11 #include <linux/sysfs.h>
12 #include <linux/jiffies.h>
13 #include <linux/irq.h>
14 #include <linux/interrupt.h>
15 #include <linux/acpi.h>
16 #include <linux/platform_device.h>
17 #include <linux/regulator/consumer.h>
18 #include <linux/math64.h>
19 #include <linux/minmax.h>
20 #include <linux/pm.h>
21 #include <linux/pm_runtime.h>
22 #include <linux/property.h>
23
24 #include <linux/iio/common/inv_sensors_timestamp.h>
25 #include <linux/iio/iio.h>
26
27 #include "inv_mpu_iio.h"
28 #include "inv_mpu_magn.h"
29
30 /*
31 * this is the gyro scale translated from dynamic range plus/minus
32 * {250, 500, 1000, 2000} to rad/s
33 */
34 static const int gyro_scale_6050[] = {133090, 266181, 532362, 1064724};
35
36 /*
37 * this is the accel scale translated from dynamic range plus/minus
38 * {2, 4, 8, 16} to m/s^2
39 */
40 static const int accel_scale[] = {598, 1196, 2392, 4785};
41
42 static const struct inv_mpu6050_reg_map reg_set_icm20602 = {
43 .sample_rate_div = INV_MPU6050_REG_SAMPLE_RATE_DIV,
44 .lpf = INV_MPU6050_REG_CONFIG,
45 .accel_lpf = INV_MPU6500_REG_ACCEL_CONFIG_2,
46 .user_ctrl = INV_MPU6050_REG_USER_CTRL,
47 .fifo_en = INV_MPU6050_REG_FIFO_EN,
48 .gyro_config = INV_MPU6050_REG_GYRO_CONFIG,
49 .accl_config = INV_MPU6050_REG_ACCEL_CONFIG,
50 .fifo_count_h = INV_MPU6050_REG_FIFO_COUNT_H,
51 .fifo_r_w = INV_MPU6050_REG_FIFO_R_W,
52 .raw_gyro = INV_MPU6050_REG_RAW_GYRO,
53 .raw_accl = INV_MPU6050_REG_RAW_ACCEL,
54 .temperature = INV_MPU6050_REG_TEMPERATURE,
55 .int_enable = INV_MPU6050_REG_INT_ENABLE,
56 .int_status = INV_MPU6050_REG_INT_STATUS,
57 .pwr_mgmt_1 = INV_MPU6050_REG_PWR_MGMT_1,
58 .pwr_mgmt_2 = INV_MPU6050_REG_PWR_MGMT_2,
59 .int_pin_cfg = INV_MPU6050_REG_INT_PIN_CFG,
60 .accl_offset = INV_MPU6500_REG_ACCEL_OFFSET,
61 .gyro_offset = INV_MPU6050_REG_GYRO_OFFSET,
62 .i2c_if = INV_ICM20602_REG_I2C_IF,
63 };
64
65 static const struct inv_mpu6050_reg_map reg_set_6500 = {
66 .sample_rate_div = INV_MPU6050_REG_SAMPLE_RATE_DIV,
67 .lpf = INV_MPU6050_REG_CONFIG,
68 .accel_lpf = INV_MPU6500_REG_ACCEL_CONFIG_2,
69 .user_ctrl = INV_MPU6050_REG_USER_CTRL,
70 .fifo_en = INV_MPU6050_REG_FIFO_EN,
71 .gyro_config = INV_MPU6050_REG_GYRO_CONFIG,
72 .accl_config = INV_MPU6050_REG_ACCEL_CONFIG,
73 .fifo_count_h = INV_MPU6050_REG_FIFO_COUNT_H,
74 .fifo_r_w = INV_MPU6050_REG_FIFO_R_W,
75 .raw_gyro = INV_MPU6050_REG_RAW_GYRO,
76 .raw_accl = INV_MPU6050_REG_RAW_ACCEL,
77 .temperature = INV_MPU6050_REG_TEMPERATURE,
78 .int_enable = INV_MPU6050_REG_INT_ENABLE,
79 .int_status = INV_MPU6050_REG_INT_STATUS,
80 .pwr_mgmt_1 = INV_MPU6050_REG_PWR_MGMT_1,
81 .pwr_mgmt_2 = INV_MPU6050_REG_PWR_MGMT_2,
82 .int_pin_cfg = INV_MPU6050_REG_INT_PIN_CFG,
83 .accl_offset = INV_MPU6500_REG_ACCEL_OFFSET,
84 .gyro_offset = INV_MPU6050_REG_GYRO_OFFSET,
85 .i2c_if = 0,
86 };
87
88 static const struct inv_mpu6050_reg_map reg_set_6050 = {
89 .sample_rate_div = INV_MPU6050_REG_SAMPLE_RATE_DIV,
90 .lpf = INV_MPU6050_REG_CONFIG,
91 .user_ctrl = INV_MPU6050_REG_USER_CTRL,
92 .fifo_en = INV_MPU6050_REG_FIFO_EN,
93 .gyro_config = INV_MPU6050_REG_GYRO_CONFIG,
94 .accl_config = INV_MPU6050_REG_ACCEL_CONFIG,
95 .fifo_count_h = INV_MPU6050_REG_FIFO_COUNT_H,
96 .fifo_r_w = INV_MPU6050_REG_FIFO_R_W,
97 .raw_gyro = INV_MPU6050_REG_RAW_GYRO,
98 .raw_accl = INV_MPU6050_REG_RAW_ACCEL,
99 .temperature = INV_MPU6050_REG_TEMPERATURE,
100 .int_enable = INV_MPU6050_REG_INT_ENABLE,
101 .pwr_mgmt_1 = INV_MPU6050_REG_PWR_MGMT_1,
102 .pwr_mgmt_2 = INV_MPU6050_REG_PWR_MGMT_2,
103 .int_pin_cfg = INV_MPU6050_REG_INT_PIN_CFG,
104 .accl_offset = INV_MPU6050_REG_ACCEL_OFFSET,
105 .gyro_offset = INV_MPU6050_REG_GYRO_OFFSET,
106 .i2c_if = 0,
107 };
108
109 static const struct inv_mpu6050_chip_config chip_config_6050 = {
110 .clk = INV_CLK_INTERNAL,
111 .fsr = INV_MPU6050_FSR_2000DPS,
112 .lpf = INV_MPU6050_FILTER_20HZ,
113 .divider = INV_MPU6050_FIFO_RATE_TO_DIVIDER(50),
114 .gyro_en = true,
115 .accl_en = true,
116 .temp_en = true,
117 .magn_en = false,
118 .gyro_fifo_enable = false,
119 .accl_fifo_enable = false,
120 .temp_fifo_enable = false,
121 .magn_fifo_enable = false,
122 .accl_fs = INV_MPU6050_FS_02G,
123 .user_ctrl = 0,
124 };
125
126 static const struct inv_mpu6050_chip_config chip_config_6500 = {
127 .clk = INV_CLK_PLL,
128 .fsr = INV_MPU6050_FSR_2000DPS,
129 .lpf = INV_MPU6050_FILTER_20HZ,
130 .divider = INV_MPU6050_FIFO_RATE_TO_DIVIDER(50),
131 .gyro_en = true,
132 .accl_en = true,
133 .temp_en = true,
134 .magn_en = false,
135 .gyro_fifo_enable = false,
136 .accl_fifo_enable = false,
137 .temp_fifo_enable = false,
138 .magn_fifo_enable = false,
139 .accl_fs = INV_MPU6050_FS_02G,
140 .user_ctrl = 0,
141 };
142
143 /* Indexed by enum inv_devices */
144 static const struct inv_mpu6050_hw hw_info[] = {
145 {
146 .whoami = INV_MPU6050_WHOAMI_VALUE,
147 .name = "MPU6050",
148 .reg = ®_set_6050,
149 .config = &chip_config_6050,
150 .fifo_size = 1024,
151 .temp = {INV_MPU6050_TEMP_OFFSET, INV_MPU6050_TEMP_SCALE},
152 .startup_time = {INV_MPU6050_GYRO_STARTUP_TIME, INV_MPU6050_ACCEL_STARTUP_TIME},
153 },
154 {
155 .whoami = INV_MPU6500_WHOAMI_VALUE,
156 .name = "MPU6500",
157 .reg = ®_set_6500,
158 .config = &chip_config_6500,
159 .fifo_size = 512,
160 .temp = {INV_MPU6500_TEMP_OFFSET, INV_MPU6500_TEMP_SCALE},
161 .startup_time = {INV_MPU6500_GYRO_STARTUP_TIME, INV_MPU6500_ACCEL_STARTUP_TIME},
162 },
163 {
164 .whoami = INV_MPU6515_WHOAMI_VALUE,
165 .name = "MPU6515",
166 .reg = ®_set_6500,
167 .config = &chip_config_6500,
168 .fifo_size = 512,
169 .temp = {INV_MPU6500_TEMP_OFFSET, INV_MPU6500_TEMP_SCALE},
170 .startup_time = {INV_MPU6500_GYRO_STARTUP_TIME, INV_MPU6500_ACCEL_STARTUP_TIME},
171 },
172 {
173 .whoami = INV_MPU6880_WHOAMI_VALUE,
174 .name = "MPU6880",
175 .reg = ®_set_6500,
176 .config = &chip_config_6500,
177 .fifo_size = 4096,
178 .temp = {INV_MPU6500_TEMP_OFFSET, INV_MPU6500_TEMP_SCALE},
179 .startup_time = {INV_MPU6500_GYRO_STARTUP_TIME, INV_MPU6500_ACCEL_STARTUP_TIME},
180 },
181 {
182 .whoami = INV_MPU6000_WHOAMI_VALUE,
183 .name = "MPU6000",
184 .reg = ®_set_6050,
185 .config = &chip_config_6050,
186 .fifo_size = 1024,
187 .temp = {INV_MPU6050_TEMP_OFFSET, INV_MPU6050_TEMP_SCALE},
188 .startup_time = {INV_MPU6050_GYRO_STARTUP_TIME, INV_MPU6050_ACCEL_STARTUP_TIME},
189 },
190 {
191 .whoami = INV_MPU9150_WHOAMI_VALUE,
192 .name = "MPU9150",
193 .reg = ®_set_6050,
194 .config = &chip_config_6050,
195 .fifo_size = 1024,
196 .temp = {INV_MPU6050_TEMP_OFFSET, INV_MPU6050_TEMP_SCALE},
197 .startup_time = {INV_MPU6050_GYRO_STARTUP_TIME, INV_MPU6050_ACCEL_STARTUP_TIME},
198 },
199 {
200 .whoami = INV_MPU9250_WHOAMI_VALUE,
201 .name = "MPU9250",
202 .reg = ®_set_6500,
203 .config = &chip_config_6500,
204 .fifo_size = 512,
205 .temp = {INV_MPU6500_TEMP_OFFSET, INV_MPU6500_TEMP_SCALE},
206 .startup_time = {INV_MPU6500_GYRO_STARTUP_TIME, INV_MPU6500_ACCEL_STARTUP_TIME},
207 },
208 {
209 .whoami = INV_MPU9255_WHOAMI_VALUE,
210 .name = "MPU9255",
211 .reg = ®_set_6500,
212 .config = &chip_config_6500,
213 .fifo_size = 512,
214 .temp = {INV_MPU6500_TEMP_OFFSET, INV_MPU6500_TEMP_SCALE},
215 .startup_time = {INV_MPU6500_GYRO_STARTUP_TIME, INV_MPU6500_ACCEL_STARTUP_TIME},
216 },
217 {
218 .whoami = INV_ICM20608_WHOAMI_VALUE,
219 .name = "ICM20608",
220 .reg = ®_set_6500,
221 .config = &chip_config_6500,
222 .fifo_size = 512,
223 .temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE},
224 .startup_time = {INV_MPU6500_GYRO_STARTUP_TIME, INV_MPU6500_ACCEL_STARTUP_TIME},
225 },
226 {
227 .whoami = INV_ICM20608D_WHOAMI_VALUE,
228 .name = "ICM20608D",
229 .reg = ®_set_6500,
230 .config = &chip_config_6500,
231 .fifo_size = 512,
232 .temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE},
233 .startup_time = {INV_MPU6500_GYRO_STARTUP_TIME, INV_MPU6500_ACCEL_STARTUP_TIME},
234 },
235 {
236 .whoami = INV_ICM20609_WHOAMI_VALUE,
237 .name = "ICM20609",
238 .reg = ®_set_6500,
239 .config = &chip_config_6500,
240 .fifo_size = 4 * 1024,
241 .temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE},
242 .startup_time = {INV_MPU6500_GYRO_STARTUP_TIME, INV_MPU6500_ACCEL_STARTUP_TIME},
243 },
244 {
245 .whoami = INV_ICM20689_WHOAMI_VALUE,
246 .name = "ICM20689",
247 .reg = ®_set_6500,
248 .config = &chip_config_6500,
249 .fifo_size = 4 * 1024,
250 .temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE},
251 .startup_time = {INV_MPU6500_GYRO_STARTUP_TIME, INV_MPU6500_ACCEL_STARTUP_TIME},
252 },
253 {
254 .whoami = INV_ICM20600_WHOAMI_VALUE,
255 .name = "ICM20600",
256 .reg = ®_set_icm20602,
257 .config = &chip_config_6500,
258 .fifo_size = 1008,
259 .temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE},
260 .startup_time = {INV_ICM20602_GYRO_STARTUP_TIME, INV_ICM20602_ACCEL_STARTUP_TIME},
261 },
262 {
263 .whoami = INV_ICM20602_WHOAMI_VALUE,
264 .name = "ICM20602",
265 .reg = ®_set_icm20602,
266 .config = &chip_config_6500,
267 .fifo_size = 1008,
268 .temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE},
269 .startup_time = {INV_ICM20602_GYRO_STARTUP_TIME, INV_ICM20602_ACCEL_STARTUP_TIME},
270 },
271 {
272 .whoami = INV_ICM20690_WHOAMI_VALUE,
273 .name = "ICM20690",
274 .reg = ®_set_6500,
275 .config = &chip_config_6500,
276 .fifo_size = 1024,
277 .temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE},
278 .startup_time = {INV_ICM20690_GYRO_STARTUP_TIME, INV_ICM20690_ACCEL_STARTUP_TIME},
279 },
280 { .whoami = INV_IAM20380_WHOAMI_VALUE,
281 .name = "IAM20380",
282 .reg = ®_set_6500,
283 .config = &chip_config_6500,
284 .fifo_size = 512,
285 .temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE},
286 .startup_time = {INV_MPU6500_GYRO_STARTUP_TIME, INV_MPU6500_ACCEL_STARTUP_TIME},
287 },
288 {
289 .whoami = INV_IAM20680_WHOAMI_VALUE,
290 .name = "IAM20680",
291 .reg = ®_set_6500,
292 .config = &chip_config_6500,
293 .fifo_size = 512,
294 .temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE},
295 .startup_time = {INV_MPU6500_GYRO_STARTUP_TIME, INV_MPU6500_ACCEL_STARTUP_TIME},
296 },
297 {
298 .whoami = INV_IAM20680HP_WHOAMI_VALUE,
299 .name = "IAM20680HP",
300 .reg = ®_set_6500,
301 .config = &chip_config_6500,
302 .fifo_size = 4 * 1024,
303 .temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE},
304 .startup_time = {INV_MPU6500_GYRO_STARTUP_TIME, INV_MPU6500_ACCEL_STARTUP_TIME},
305 },
306 {
307 .whoami = INV_IAM20680HT_WHOAMI_VALUE,
308 .name = "IAM20680HT",
309 .reg = ®_set_6500,
310 .config = &chip_config_6500,
311 .fifo_size = 4 * 1024,
312 .temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE},
313 .startup_time = {INV_MPU6500_GYRO_STARTUP_TIME, INV_MPU6500_ACCEL_STARTUP_TIME},
314 },
315 };
316
inv_mpu6050_pwr_mgmt_1_write(struct inv_mpu6050_state * st,bool sleep,bool cycle,int clock,int temp_dis)317 static int inv_mpu6050_pwr_mgmt_1_write(struct inv_mpu6050_state *st, bool sleep,
318 bool cycle, int clock, int temp_dis)
319 {
320 u8 val;
321
322 if (clock < 0)
323 clock = st->chip_config.clk;
324 if (temp_dis < 0)
325 temp_dis = !st->chip_config.temp_en;
326
327 val = clock & INV_MPU6050_BIT_CLK_MASK;
328 if (temp_dis)
329 val |= INV_MPU6050_BIT_TEMP_DIS;
330 if (sleep)
331 val |= INV_MPU6050_BIT_SLEEP;
332 if (cycle)
333 val |= INV_MPU6050_BIT_CYCLE;
334
335 dev_dbg(regmap_get_device(st->map), "pwr_mgmt_1: 0x%x\n", val);
336 return regmap_write(st->map, st->reg->pwr_mgmt_1, val);
337 }
338
inv_mpu6050_clock_switch(struct inv_mpu6050_state * st,unsigned int clock)339 static int inv_mpu6050_clock_switch(struct inv_mpu6050_state *st,
340 unsigned int clock)
341 {
342 int ret;
343
344 switch (st->chip_type) {
345 case INV_MPU6050:
346 case INV_MPU6000:
347 case INV_MPU9150:
348 /* old chips: switch clock manually */
349 ret = inv_mpu6050_pwr_mgmt_1_write(st, false, false, clock, -1);
350 if (ret)
351 return ret;
352 st->chip_config.clk = clock;
353 break;
354 default:
355 /* automatic clock switching, nothing to do */
356 break;
357 }
358
359 return 0;
360 }
361
inv_mpu6050_switch_engine(struct inv_mpu6050_state * st,bool en,unsigned int mask)362 int inv_mpu6050_switch_engine(struct inv_mpu6050_state *st, bool en,
363 unsigned int mask)
364 {
365 unsigned int sleep, val;
366 u8 pwr_mgmt2, user_ctrl;
367 int ret;
368
369 /* delete useless requests */
370 if (mask & INV_MPU6050_SENSOR_ACCL && en == st->chip_config.accl_en)
371 mask &= ~INV_MPU6050_SENSOR_ACCL;
372 if (mask & INV_MPU6050_SENSOR_GYRO && en == st->chip_config.gyro_en)
373 mask &= ~INV_MPU6050_SENSOR_GYRO;
374 if (mask & INV_MPU6050_SENSOR_TEMP && en == st->chip_config.temp_en)
375 mask &= ~INV_MPU6050_SENSOR_TEMP;
376 if (mask & INV_MPU6050_SENSOR_MAGN && en == st->chip_config.magn_en)
377 mask &= ~INV_MPU6050_SENSOR_MAGN;
378 if (mask & INV_MPU6050_SENSOR_WOM && en == st->chip_config.wom_en)
379 mask &= ~INV_MPU6050_SENSOR_WOM;
380
381 /* force accel on if WoM is on and not going off */
382 if (!en && (mask & INV_MPU6050_SENSOR_ACCL) && st->chip_config.wom_en &&
383 !(mask & INV_MPU6050_SENSOR_WOM))
384 mask &= ~INV_MPU6050_SENSOR_ACCL;
385
386 if (mask == 0)
387 return 0;
388
389 /* turn on/off temperature sensor */
390 if (mask & INV_MPU6050_SENSOR_TEMP) {
391 ret = inv_mpu6050_pwr_mgmt_1_write(st, false, false, -1, !en);
392 if (ret)
393 return ret;
394 st->chip_config.temp_en = en;
395 }
396
397 /* update user_crtl for driving magnetometer */
398 if (mask & INV_MPU6050_SENSOR_MAGN) {
399 user_ctrl = st->chip_config.user_ctrl;
400 if (en)
401 user_ctrl |= INV_MPU6050_BIT_I2C_MST_EN;
402 else
403 user_ctrl &= ~INV_MPU6050_BIT_I2C_MST_EN;
404 ret = regmap_write(st->map, st->reg->user_ctrl, user_ctrl);
405 if (ret)
406 return ret;
407 st->chip_config.user_ctrl = user_ctrl;
408 st->chip_config.magn_en = en;
409 }
410
411 /* manage accel & gyro engines */
412 if (mask & (INV_MPU6050_SENSOR_ACCL | INV_MPU6050_SENSOR_GYRO)) {
413 /* compute power management 2 current value */
414 pwr_mgmt2 = 0;
415 if (!st->chip_config.accl_en)
416 pwr_mgmt2 |= INV_MPU6050_BIT_PWR_ACCL_STBY;
417 if (!st->chip_config.gyro_en)
418 pwr_mgmt2 |= INV_MPU6050_BIT_PWR_GYRO_STBY;
419
420 /* update to new requested value */
421 if (mask & INV_MPU6050_SENSOR_ACCL) {
422 if (en)
423 pwr_mgmt2 &= ~INV_MPU6050_BIT_PWR_ACCL_STBY;
424 else
425 pwr_mgmt2 |= INV_MPU6050_BIT_PWR_ACCL_STBY;
426 }
427 if (mask & INV_MPU6050_SENSOR_GYRO) {
428 if (en)
429 pwr_mgmt2 &= ~INV_MPU6050_BIT_PWR_GYRO_STBY;
430 else
431 pwr_mgmt2 |= INV_MPU6050_BIT_PWR_GYRO_STBY;
432 }
433
434 /* switch clock to internal when turning gyro off */
435 if (mask & INV_MPU6050_SENSOR_GYRO && !en) {
436 ret = inv_mpu6050_clock_switch(st, INV_CLK_INTERNAL);
437 if (ret)
438 return ret;
439 }
440
441 /* update sensors engine */
442 dev_dbg(regmap_get_device(st->map), "pwr_mgmt_2: 0x%x\n",
443 pwr_mgmt2);
444 ret = regmap_write(st->map, st->reg->pwr_mgmt_2, pwr_mgmt2);
445 if (ret)
446 return ret;
447 if (mask & INV_MPU6050_SENSOR_ACCL)
448 st->chip_config.accl_en = en;
449 if (mask & INV_MPU6050_SENSOR_GYRO)
450 st->chip_config.gyro_en = en;
451
452 /* compute required time to have sensors stabilized */
453 sleep = 0;
454 if (en) {
455 if (mask & INV_MPU6050_SENSOR_ACCL) {
456 if (sleep < st->hw->startup_time.accel)
457 sleep = st->hw->startup_time.accel;
458 }
459 if (mask & INV_MPU6050_SENSOR_GYRO) {
460 if (sleep < st->hw->startup_time.gyro)
461 sleep = st->hw->startup_time.gyro;
462 }
463 } else {
464 if (mask & INV_MPU6050_SENSOR_GYRO) {
465 if (sleep < INV_MPU6050_GYRO_DOWN_TIME)
466 sleep = INV_MPU6050_GYRO_DOWN_TIME;
467 }
468 }
469 if (sleep)
470 msleep(sleep);
471
472 /* switch clock to PLL when turning gyro on */
473 if (mask & INV_MPU6050_SENSOR_GYRO && en) {
474 ret = inv_mpu6050_clock_switch(st, INV_CLK_PLL);
475 if (ret)
476 return ret;
477 }
478 }
479
480 /* enable/disable accel intelligence control */
481 if (mask & INV_MPU6050_SENSOR_WOM) {
482 val = en ? INV_MPU6500_BIT_ACCEL_INTEL_EN |
483 INV_MPU6500_BIT_ACCEL_INTEL_MODE : 0;
484 ret = regmap_write(st->map, INV_MPU6500_REG_ACCEL_INTEL_CTRL, val);
485 if (ret)
486 return ret;
487 st->chip_config.wom_en = en;
488 }
489
490 return 0;
491 }
492
inv_mpu6050_set_power_itg(struct inv_mpu6050_state * st,bool power_on)493 static int inv_mpu6050_set_power_itg(struct inv_mpu6050_state *st,
494 bool power_on)
495 {
496 int result;
497
498 result = inv_mpu6050_pwr_mgmt_1_write(st, !power_on, false, -1, -1);
499 if (result)
500 return result;
501
502 if (power_on)
503 usleep_range(INV_MPU6050_REG_UP_TIME_MIN,
504 INV_MPU6050_REG_UP_TIME_MAX);
505
506 return 0;
507 }
508
inv_mpu6050_set_gyro_fsr(struct inv_mpu6050_state * st,enum inv_mpu6050_fsr_e val)509 static int inv_mpu6050_set_gyro_fsr(struct inv_mpu6050_state *st,
510 enum inv_mpu6050_fsr_e val)
511 {
512 unsigned int gyro_shift;
513 u8 data;
514
515 switch (st->chip_type) {
516 case INV_ICM20690:
517 gyro_shift = INV_ICM20690_GYRO_CONFIG_FSR_SHIFT;
518 break;
519 default:
520 gyro_shift = INV_MPU6050_GYRO_CONFIG_FSR_SHIFT;
521 break;
522 }
523
524 data = val << gyro_shift;
525 return regmap_write(st->map, st->reg->gyro_config, data);
526 }
527
inv_mpu6050_set_accel_lpf_regs(struct inv_mpu6050_state * st,enum inv_mpu6050_filter_e val)528 static int inv_mpu6050_set_accel_lpf_regs(struct inv_mpu6050_state *st,
529 enum inv_mpu6050_filter_e val)
530 {
531 switch (st->chip_type) {
532 case INV_MPU6050:
533 case INV_MPU6000:
534 case INV_MPU9150:
535 /* old chips, nothing to do */
536 return 0;
537 case INV_ICM20689:
538 case INV_ICM20690:
539 case INV_IAM20680HT:
540 case INV_IAM20680HP:
541 /* set FIFO size to maximum value */
542 val |= INV_ICM20689_BITS_FIFO_SIZE_MAX;
543 break;
544 default:
545 break;
546 }
547
548 return regmap_write(st->map, st->reg->accel_lpf, val);
549 }
550
551 /*
552 * inv_mpu6050_set_lpf_regs() - set low pass filter registers, chip dependent
553 *
554 * MPU60xx/MPU9150 use only 1 register for accelerometer + gyroscope
555 * MPU6500 and above have a dedicated register for accelerometer
556 */
inv_mpu6050_set_lpf_regs(struct inv_mpu6050_state * st,enum inv_mpu6050_filter_e val)557 static int inv_mpu6050_set_lpf_regs(struct inv_mpu6050_state *st,
558 enum inv_mpu6050_filter_e val)
559 {
560 int result;
561
562 result = regmap_write(st->map, st->reg->lpf, val);
563 if (result)
564 return result;
565
566 /* set accel lpf */
567 return inv_mpu6050_set_accel_lpf_regs(st, val);
568 }
569
570 /*
571 * inv_mpu6050_init_config() - Initialize hardware, disable FIFO.
572 *
573 * Initial configuration:
574 * FSR: ± 2000DPS
575 * DLPF: 20Hz
576 * FIFO rate: 50Hz
577 * Clock source: Gyro PLL
578 */
inv_mpu6050_init_config(struct iio_dev * indio_dev)579 static int inv_mpu6050_init_config(struct iio_dev *indio_dev)
580 {
581 int result;
582 u8 d;
583 struct inv_mpu6050_state *st = iio_priv(indio_dev);
584 struct inv_sensors_timestamp_chip timestamp;
585
586 result = inv_mpu6050_set_gyro_fsr(st, st->chip_config.fsr);
587 if (result)
588 return result;
589
590 result = inv_mpu6050_set_lpf_regs(st, st->chip_config.lpf);
591 if (result)
592 return result;
593
594 d = st->chip_config.divider;
595 result = regmap_write(st->map, st->reg->sample_rate_div, d);
596 if (result)
597 return result;
598
599 d = (st->chip_config.accl_fs << INV_MPU6050_ACCL_CONFIG_FSR_SHIFT);
600 result = regmap_write(st->map, st->reg->accl_config, d);
601 if (result)
602 return result;
603
604 result = regmap_write(st->map, st->reg->int_pin_cfg, st->irq_mask);
605 if (result)
606 return result;
607
608 /* clock jitter is +/- 2% */
609 timestamp.clock_period = NSEC_PER_SEC / INV_MPU6050_INTERNAL_FREQ_HZ;
610 timestamp.jitter = 20;
611 timestamp.init_period =
612 NSEC_PER_SEC / INV_MPU6050_DIVIDER_TO_FIFO_RATE(st->chip_config.divider);
613 inv_sensors_timestamp_init(&st->timestamp, ×tamp);
614
615 /* magn chip init, noop if not present in the chip */
616 result = inv_mpu_magn_probe(st);
617 if (result)
618 return result;
619
620 return 0;
621 }
622
inv_mpu6050_sensor_set(struct inv_mpu6050_state * st,int reg,int axis,int val)623 static int inv_mpu6050_sensor_set(struct inv_mpu6050_state *st, int reg,
624 int axis, int val)
625 {
626 int ind;
627 __be16 d = cpu_to_be16(val);
628
629 ind = (axis - IIO_MOD_X) * 2;
630
631 return regmap_bulk_write(st->map, reg + ind, &d, sizeof(d));
632 }
633
inv_mpu6050_sensor_show(struct inv_mpu6050_state * st,int reg,int axis,int * val)634 static int inv_mpu6050_sensor_show(struct inv_mpu6050_state *st, int reg,
635 int axis, int *val)
636 {
637 int ind, result;
638 __be16 d;
639
640 ind = (axis - IIO_MOD_X) * 2;
641 result = regmap_bulk_read(st->map, reg + ind, &d, sizeof(d));
642 if (result)
643 return result;
644 *val = (short)be16_to_cpup(&d);
645
646 return IIO_VAL_INT;
647 }
648
inv_mpu6050_read_channel_data(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int * val)649 static int inv_mpu6050_read_channel_data(struct iio_dev *indio_dev,
650 struct iio_chan_spec const *chan,
651 int *val)
652 {
653 struct inv_mpu6050_state *st = iio_priv(indio_dev);
654 struct device *pdev = regmap_get_device(st->map);
655 unsigned int freq_hz, period_us, min_sleep_us, max_sleep_us;
656 int result;
657 int ret;
658
659 /* compute sample period */
660 freq_hz = INV_MPU6050_DIVIDER_TO_FIFO_RATE(st->chip_config.divider);
661 period_us = 1000000 / freq_hz;
662
663 result = pm_runtime_resume_and_get(pdev);
664 if (result)
665 return result;
666
667 switch (chan->type) {
668 case IIO_ANGL_VEL:
669 if (!st->chip_config.gyro_en) {
670 result = inv_mpu6050_switch_engine(st, true,
671 INV_MPU6050_SENSOR_GYRO);
672 if (result)
673 goto error_power_off;
674 /* need to wait 2 periods to have first valid sample */
675 min_sleep_us = 2 * period_us;
676 max_sleep_us = 2 * (period_us + period_us / 2);
677 usleep_range(min_sleep_us, max_sleep_us);
678 }
679 ret = inv_mpu6050_sensor_show(st, st->reg->raw_gyro,
680 chan->channel2, val);
681 break;
682 case IIO_ACCEL:
683 if (!st->chip_config.accl_en) {
684 result = inv_mpu6050_switch_engine(st, true,
685 INV_MPU6050_SENSOR_ACCL);
686 if (result)
687 goto error_power_off;
688 /* wait 1 period for first sample availability */
689 min_sleep_us = period_us;
690 max_sleep_us = period_us + period_us / 2;
691 usleep_range(min_sleep_us, max_sleep_us);
692 }
693 ret = inv_mpu6050_sensor_show(st, st->reg->raw_accl,
694 chan->channel2, val);
695 break;
696 case IIO_TEMP:
697 /* temperature sensor work only with accel and/or gyro */
698 if (!st->chip_config.accl_en && !st->chip_config.gyro_en) {
699 result = -EBUSY;
700 goto error_power_off;
701 }
702 if (!st->chip_config.temp_en) {
703 result = inv_mpu6050_switch_engine(st, true,
704 INV_MPU6050_SENSOR_TEMP);
705 if (result)
706 goto error_power_off;
707 /* wait 1 period for first sample availability */
708 min_sleep_us = period_us;
709 max_sleep_us = period_us + period_us / 2;
710 usleep_range(min_sleep_us, max_sleep_us);
711 }
712 ret = inv_mpu6050_sensor_show(st, st->reg->temperature,
713 IIO_MOD_X, val);
714 break;
715 case IIO_MAGN:
716 if (!st->chip_config.magn_en) {
717 result = inv_mpu6050_switch_engine(st, true,
718 INV_MPU6050_SENSOR_MAGN);
719 if (result)
720 goto error_power_off;
721 /* frequency is limited for magnetometer */
722 if (freq_hz > INV_MPU_MAGN_FREQ_HZ_MAX) {
723 freq_hz = INV_MPU_MAGN_FREQ_HZ_MAX;
724 period_us = 1000000 / freq_hz;
725 }
726 /* need to wait 2 periods to have first valid sample */
727 min_sleep_us = 2 * period_us;
728 max_sleep_us = 2 * (period_us + period_us / 2);
729 usleep_range(min_sleep_us, max_sleep_us);
730 }
731 ret = inv_mpu_magn_read(st, chan->channel2, val);
732 break;
733 default:
734 ret = -EINVAL;
735 break;
736 }
737
738 pm_runtime_mark_last_busy(pdev);
739 pm_runtime_put_autosuspend(pdev);
740
741 return ret;
742
743 error_power_off:
744 pm_runtime_put_autosuspend(pdev);
745 return result;
746 }
747
748 static int
inv_mpu6050_read_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int * val,int * val2,long mask)749 inv_mpu6050_read_raw(struct iio_dev *indio_dev,
750 struct iio_chan_spec const *chan,
751 int *val, int *val2, long mask)
752 {
753 struct inv_mpu6050_state *st = iio_priv(indio_dev);
754 int ret = 0;
755
756 switch (mask) {
757 case IIO_CHAN_INFO_RAW:
758 if (!iio_device_claim_direct(indio_dev))
759 return -EBUSY;
760 mutex_lock(&st->lock);
761 ret = inv_mpu6050_read_channel_data(indio_dev, chan, val);
762 mutex_unlock(&st->lock);
763 iio_device_release_direct(indio_dev);
764 return ret;
765 case IIO_CHAN_INFO_SCALE:
766 switch (chan->type) {
767 case IIO_ANGL_VEL:
768 mutex_lock(&st->lock);
769 *val = 0;
770 *val2 = gyro_scale_6050[st->chip_config.fsr];
771 mutex_unlock(&st->lock);
772
773 return IIO_VAL_INT_PLUS_NANO;
774 case IIO_ACCEL:
775 mutex_lock(&st->lock);
776 *val = 0;
777 *val2 = accel_scale[st->chip_config.accl_fs];
778 mutex_unlock(&st->lock);
779
780 return IIO_VAL_INT_PLUS_MICRO;
781 case IIO_TEMP:
782 *val = st->hw->temp.scale / 1000000;
783 *val2 = st->hw->temp.scale % 1000000;
784 return IIO_VAL_INT_PLUS_MICRO;
785 case IIO_MAGN:
786 return inv_mpu_magn_get_scale(st, chan, val, val2);
787 default:
788 return -EINVAL;
789 }
790 case IIO_CHAN_INFO_OFFSET:
791 switch (chan->type) {
792 case IIO_TEMP:
793 *val = st->hw->temp.offset;
794 return IIO_VAL_INT;
795 default:
796 return -EINVAL;
797 }
798 case IIO_CHAN_INFO_CALIBBIAS:
799 switch (chan->type) {
800 case IIO_ANGL_VEL:
801 mutex_lock(&st->lock);
802 ret = inv_mpu6050_sensor_show(st, st->reg->gyro_offset,
803 chan->channel2, val);
804 mutex_unlock(&st->lock);
805 return ret;
806 case IIO_ACCEL:
807 mutex_lock(&st->lock);
808 ret = inv_mpu6050_sensor_show(st, st->reg->accl_offset,
809 chan->channel2, val);
810 mutex_unlock(&st->lock);
811 return ret;
812
813 default:
814 return -EINVAL;
815 }
816 default:
817 return -EINVAL;
818 }
819 }
820
inv_mpu6050_write_gyro_scale(struct inv_mpu6050_state * st,int val,int val2)821 static int inv_mpu6050_write_gyro_scale(struct inv_mpu6050_state *st, int val,
822 int val2)
823 {
824 int result, i;
825
826 if (val != 0)
827 return -EINVAL;
828
829 for (i = 0; i < ARRAY_SIZE(gyro_scale_6050); ++i) {
830 if (gyro_scale_6050[i] == val2) {
831 result = inv_mpu6050_set_gyro_fsr(st, i);
832 if (result)
833 return result;
834
835 st->chip_config.fsr = i;
836 return 0;
837 }
838 }
839
840 return -EINVAL;
841 }
842
inv_write_raw_get_fmt(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,long mask)843 static int inv_write_raw_get_fmt(struct iio_dev *indio_dev,
844 struct iio_chan_spec const *chan, long mask)
845 {
846 switch (mask) {
847 case IIO_CHAN_INFO_SCALE:
848 switch (chan->type) {
849 case IIO_ANGL_VEL:
850 return IIO_VAL_INT_PLUS_NANO;
851 default:
852 return IIO_VAL_INT_PLUS_MICRO;
853 }
854 default:
855 return IIO_VAL_INT_PLUS_MICRO;
856 }
857
858 return -EINVAL;
859 }
860
inv_mpu6050_write_accel_scale(struct inv_mpu6050_state * st,int val,int val2)861 static int inv_mpu6050_write_accel_scale(struct inv_mpu6050_state *st, int val,
862 int val2)
863 {
864 int result, i;
865 u8 d;
866
867 if (val != 0)
868 return -EINVAL;
869
870 for (i = 0; i < ARRAY_SIZE(accel_scale); ++i) {
871 if (accel_scale[i] == val2) {
872 d = (i << INV_MPU6050_ACCL_CONFIG_FSR_SHIFT);
873 result = regmap_write(st->map, st->reg->accl_config, d);
874 if (result)
875 return result;
876
877 st->chip_config.accl_fs = i;
878 return 0;
879 }
880 }
881
882 return -EINVAL;
883 }
884
inv_mpu6050_write_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int val,int val2,long mask)885 static int inv_mpu6050_write_raw(struct iio_dev *indio_dev,
886 struct iio_chan_spec const *chan,
887 int val, int val2, long mask)
888 {
889 struct inv_mpu6050_state *st = iio_priv(indio_dev);
890 struct device *pdev = regmap_get_device(st->map);
891 int result;
892
893 /*
894 * we should only update scale when the chip is disabled, i.e.
895 * not running
896 */
897 if (!iio_device_claim_direct(indio_dev))
898 return -EBUSY;
899
900 mutex_lock(&st->lock);
901 result = pm_runtime_resume_and_get(pdev);
902 if (result)
903 goto error_write_raw_unlock;
904
905 switch (mask) {
906 case IIO_CHAN_INFO_SCALE:
907 switch (chan->type) {
908 case IIO_ANGL_VEL:
909 result = inv_mpu6050_write_gyro_scale(st, val, val2);
910 break;
911 case IIO_ACCEL:
912 result = inv_mpu6050_write_accel_scale(st, val, val2);
913 break;
914 default:
915 result = -EINVAL;
916 break;
917 }
918 break;
919 case IIO_CHAN_INFO_CALIBBIAS:
920 switch (chan->type) {
921 case IIO_ANGL_VEL:
922 result = inv_mpu6050_sensor_set(st,
923 st->reg->gyro_offset,
924 chan->channel2, val);
925 break;
926 case IIO_ACCEL:
927 result = inv_mpu6050_sensor_set(st,
928 st->reg->accl_offset,
929 chan->channel2, val);
930 break;
931 default:
932 result = -EINVAL;
933 break;
934 }
935 break;
936 default:
937 result = -EINVAL;
938 break;
939 }
940
941 pm_runtime_mark_last_busy(pdev);
942 pm_runtime_put_autosuspend(pdev);
943 error_write_raw_unlock:
944 mutex_unlock(&st->lock);
945 iio_device_release_direct(indio_dev);
946
947 return result;
948 }
949
inv_mpu6050_convert_wom_to_roc(unsigned int threshold,unsigned int freq_div)950 static u64 inv_mpu6050_convert_wom_to_roc(unsigned int threshold, unsigned int freq_div)
951 {
952 /* 4mg per LSB converted in m/s² in micro (1000000) */
953 const unsigned int convert = 4U * 9807U;
954 u64 value;
955
956 value = threshold * convert;
957
958 /* compute the differential by multiplying by the frequency */
959 return div_u64(value * INV_MPU6050_INTERNAL_FREQ_HZ, freq_div);
960 }
961
inv_mpu6050_convert_roc_to_wom(u64 roc,unsigned int freq_div)962 static unsigned int inv_mpu6050_convert_roc_to_wom(u64 roc, unsigned int freq_div)
963 {
964 /* 4mg per LSB converted in m/s² in micro (1000000) */
965 const unsigned int convert = 4U * 9807U;
966 u64 value;
967
968 /* return 0 only if roc is 0 */
969 if (roc == 0)
970 return 0;
971
972 value = div_u64(roc * freq_div, convert * INV_MPU6050_INTERNAL_FREQ_HZ);
973
974 /* limit value to 8 bits and prevent 0 */
975 return min(255, max(1, value));
976 }
977
inv_mpu6050_set_wom_int(struct inv_mpu6050_state * st,bool on)978 static int inv_mpu6050_set_wom_int(struct inv_mpu6050_state *st, bool on)
979 {
980 unsigned int reg_val, val;
981
982 switch (st->chip_type) {
983 case INV_MPU6050:
984 case INV_MPU6500:
985 case INV_MPU6515:
986 case INV_MPU6880:
987 case INV_MPU6000:
988 case INV_MPU9150:
989 case INV_MPU9250:
990 case INV_MPU9255:
991 reg_val = INV_MPU6500_BIT_WOM_INT_EN;
992 break;
993 default:
994 reg_val = INV_ICM20608_BIT_WOM_INT_EN;
995 break;
996 }
997
998 val = on ? reg_val : 0;
999
1000 return regmap_update_bits(st->map, st->reg->int_enable, reg_val, val);
1001 }
1002
inv_mpu6050_set_wom_threshold(struct inv_mpu6050_state * st,u64 value,unsigned int freq_div)1003 static int inv_mpu6050_set_wom_threshold(struct inv_mpu6050_state *st, u64 value,
1004 unsigned int freq_div)
1005 {
1006 unsigned int threshold;
1007 int result;
1008
1009 /* convert roc to wom threshold and convert back to handle clipping */
1010 threshold = inv_mpu6050_convert_roc_to_wom(value, freq_div);
1011 value = inv_mpu6050_convert_wom_to_roc(threshold, freq_div);
1012
1013 dev_dbg(regmap_get_device(st->map), "wom_threshold: 0x%x\n", threshold);
1014
1015 switch (st->chip_type) {
1016 case INV_ICM20609:
1017 case INV_ICM20689:
1018 case INV_ICM20600:
1019 case INV_ICM20602:
1020 case INV_ICM20690:
1021 st->data[0] = threshold;
1022 st->data[1] = threshold;
1023 st->data[2] = threshold;
1024 result = regmap_bulk_write(st->map, INV_ICM20609_REG_ACCEL_WOM_X_THR,
1025 st->data, 3);
1026 break;
1027 default:
1028 result = regmap_write(st->map, INV_MPU6500_REG_WOM_THRESHOLD, threshold);
1029 break;
1030 }
1031 if (result)
1032 return result;
1033
1034 st->chip_config.roc_threshold = value;
1035
1036 return 0;
1037 }
1038
inv_mpu6050_set_lp_odr(struct inv_mpu6050_state * st,unsigned int freq_div,unsigned int * lp_div)1039 static int inv_mpu6050_set_lp_odr(struct inv_mpu6050_state *st, unsigned int freq_div,
1040 unsigned int *lp_div)
1041 {
1042 static const unsigned int freq_dividers[] = {2, 4, 8, 16, 32, 64, 128, 256};
1043 static const unsigned int reg_values[] = {
1044 INV_MPU6050_LPOSC_500HZ, INV_MPU6050_LPOSC_250HZ,
1045 INV_MPU6050_LPOSC_125HZ, INV_MPU6050_LPOSC_62HZ,
1046 INV_MPU6050_LPOSC_31HZ, INV_MPU6050_LPOSC_16HZ,
1047 INV_MPU6050_LPOSC_8HZ, INV_MPU6050_LPOSC_4HZ,
1048 };
1049 unsigned int val, i;
1050
1051 switch (st->chip_type) {
1052 case INV_ICM20609:
1053 case INV_ICM20689:
1054 case INV_ICM20600:
1055 case INV_ICM20602:
1056 case INV_ICM20690:
1057 /* nothing to do */
1058 *lp_div = INV_MPU6050_FREQ_DIVIDER(st);
1059 return 0;
1060 default:
1061 break;
1062 }
1063
1064 /* found the nearest superior frequency divider */
1065 i = ARRAY_SIZE(reg_values) - 1;
1066 val = reg_values[i];
1067 *lp_div = freq_dividers[i];
1068 for (i = 0; i < ARRAY_SIZE(freq_dividers); ++i) {
1069 if (freq_div <= freq_dividers[i]) {
1070 val = reg_values[i];
1071 *lp_div = freq_dividers[i];
1072 break;
1073 }
1074 }
1075
1076 dev_dbg(regmap_get_device(st->map), "lp_odr: 0x%x\n", val);
1077 return regmap_write(st->map, INV_MPU6500_REG_LP_ODR, val);
1078 }
1079
inv_mpu6050_set_wom_lp(struct inv_mpu6050_state * st,bool on)1080 static int inv_mpu6050_set_wom_lp(struct inv_mpu6050_state *st, bool on)
1081 {
1082 unsigned int lp_div;
1083 int result;
1084
1085 if (on) {
1086 /* set low power ODR */
1087 result = inv_mpu6050_set_lp_odr(st, INV_MPU6050_FREQ_DIVIDER(st), &lp_div);
1088 if (result)
1089 return result;
1090 /* disable accel low pass filter */
1091 result = inv_mpu6050_set_accel_lpf_regs(st, INV_MPU6050_FILTER_NOLPF);
1092 if (result)
1093 return result;
1094 /* update wom threshold with new low-power frequency divider */
1095 result = inv_mpu6050_set_wom_threshold(st, st->chip_config.roc_threshold, lp_div);
1096 if (result)
1097 return result;
1098 /* set cycle mode */
1099 result = inv_mpu6050_pwr_mgmt_1_write(st, false, true, -1, -1);
1100 } else {
1101 /* disable cycle mode */
1102 result = inv_mpu6050_pwr_mgmt_1_write(st, false, false, -1, -1);
1103 if (result)
1104 return result;
1105 /* restore wom threshold */
1106 result = inv_mpu6050_set_wom_threshold(st, st->chip_config.roc_threshold,
1107 INV_MPU6050_FREQ_DIVIDER(st));
1108 if (result)
1109 return result;
1110 /* restore accel low pass filter */
1111 result = inv_mpu6050_set_accel_lpf_regs(st, st->chip_config.lpf);
1112 }
1113
1114 return result;
1115 }
1116
inv_mpu6050_enable_wom(struct inv_mpu6050_state * st,bool en)1117 static int inv_mpu6050_enable_wom(struct inv_mpu6050_state *st, bool en)
1118 {
1119 struct device *pdev = regmap_get_device(st->map);
1120 unsigned int mask;
1121 int result;
1122
1123 if (en) {
1124 result = pm_runtime_resume_and_get(pdev);
1125 if (result)
1126 return result;
1127
1128 mask = INV_MPU6050_SENSOR_ACCL | INV_MPU6050_SENSOR_WOM;
1129 result = inv_mpu6050_switch_engine(st, true, mask);
1130 if (result)
1131 goto error_suspend;
1132
1133 result = inv_mpu6050_set_wom_int(st, true);
1134 if (result)
1135 goto error_suspend;
1136 } else {
1137 result = inv_mpu6050_set_wom_int(st, false);
1138 if (result)
1139 dev_err(pdev, "error %d disabling WoM interrupt bit", result);
1140
1141 /* disable only WoM and let accel be disabled by autosuspend */
1142 result = inv_mpu6050_switch_engine(st, false, INV_MPU6050_SENSOR_WOM);
1143 if (result) {
1144 dev_err(pdev, "error %d disabling WoM force off", result);
1145 /* force WoM off */
1146 st->chip_config.wom_en = false;
1147 }
1148
1149 pm_runtime_mark_last_busy(pdev);
1150 pm_runtime_put_autosuspend(pdev);
1151 }
1152
1153 return result;
1154
1155 error_suspend:
1156 pm_runtime_mark_last_busy(pdev);
1157 pm_runtime_put_autosuspend(pdev);
1158 return result;
1159 }
1160
inv_mpu6050_read_event_config(struct iio_dev * indio_dev,const struct iio_chan_spec * chan,enum iio_event_type type,enum iio_event_direction dir)1161 static int inv_mpu6050_read_event_config(struct iio_dev *indio_dev,
1162 const struct iio_chan_spec *chan,
1163 enum iio_event_type type,
1164 enum iio_event_direction dir)
1165 {
1166 struct inv_mpu6050_state *st = iio_priv(indio_dev);
1167
1168 /* support only WoM (accel roc rising) event */
1169 if (chan->type != IIO_ACCEL || type != IIO_EV_TYPE_ROC ||
1170 dir != IIO_EV_DIR_RISING)
1171 return -EINVAL;
1172
1173 guard(mutex)(&st->lock);
1174
1175 return st->chip_config.wom_en ? 1 : 0;
1176 }
1177
inv_mpu6050_write_event_config(struct iio_dev * indio_dev,const struct iio_chan_spec * chan,enum iio_event_type type,enum iio_event_direction dir,bool state)1178 static int inv_mpu6050_write_event_config(struct iio_dev *indio_dev,
1179 const struct iio_chan_spec *chan,
1180 enum iio_event_type type,
1181 enum iio_event_direction dir,
1182 bool state)
1183 {
1184 struct inv_mpu6050_state *st = iio_priv(indio_dev);
1185
1186 /* support only WoM (accel roc rising) event */
1187 if (chan->type != IIO_ACCEL || type != IIO_EV_TYPE_ROC ||
1188 dir != IIO_EV_DIR_RISING)
1189 return -EINVAL;
1190
1191 guard(mutex)(&st->lock);
1192
1193 if (st->chip_config.wom_en == state)
1194 return 0;
1195
1196 return inv_mpu6050_enable_wom(st, state);
1197 }
1198
inv_mpu6050_read_event_value(struct iio_dev * indio_dev,const struct iio_chan_spec * chan,enum iio_event_type type,enum iio_event_direction dir,enum iio_event_info info,int * val,int * val2)1199 static int inv_mpu6050_read_event_value(struct iio_dev *indio_dev,
1200 const struct iio_chan_spec *chan,
1201 enum iio_event_type type,
1202 enum iio_event_direction dir,
1203 enum iio_event_info info,
1204 int *val, int *val2)
1205 {
1206 struct inv_mpu6050_state *st = iio_priv(indio_dev);
1207 u32 rem;
1208
1209 /* support only WoM (accel roc rising) event value */
1210 if (chan->type != IIO_ACCEL || type != IIO_EV_TYPE_ROC ||
1211 dir != IIO_EV_DIR_RISING || info != IIO_EV_INFO_VALUE)
1212 return -EINVAL;
1213
1214 guard(mutex)(&st->lock);
1215
1216 /* return value in micro */
1217 *val = div_u64_rem(st->chip_config.roc_threshold, 1000000U, &rem);
1218 *val2 = rem;
1219
1220 return IIO_VAL_INT_PLUS_MICRO;
1221 }
1222
inv_mpu6050_write_event_value(struct iio_dev * indio_dev,const struct iio_chan_spec * chan,enum iio_event_type type,enum iio_event_direction dir,enum iio_event_info info,int val,int val2)1223 static int inv_mpu6050_write_event_value(struct iio_dev *indio_dev,
1224 const struct iio_chan_spec *chan,
1225 enum iio_event_type type,
1226 enum iio_event_direction dir,
1227 enum iio_event_info info,
1228 int val, int val2)
1229 {
1230 struct inv_mpu6050_state *st = iio_priv(indio_dev);
1231 struct device *pdev = regmap_get_device(st->map);
1232 u64 value;
1233 int result;
1234
1235 /* support only WoM (accel roc rising) event value */
1236 if (chan->type != IIO_ACCEL || type != IIO_EV_TYPE_ROC ||
1237 dir != IIO_EV_DIR_RISING || info != IIO_EV_INFO_VALUE)
1238 return -EINVAL;
1239
1240 if (val < 0 || val2 < 0)
1241 return -EINVAL;
1242
1243 guard(mutex)(&st->lock);
1244
1245 result = pm_runtime_resume_and_get(pdev);
1246 if (result)
1247 return result;
1248
1249 value = (u64)val * 1000000ULL + (u64)val2;
1250 result = inv_mpu6050_set_wom_threshold(st, value, INV_MPU6050_FREQ_DIVIDER(st));
1251
1252 pm_runtime_mark_last_busy(pdev);
1253 pm_runtime_put_autosuspend(pdev);
1254
1255 return result;
1256 }
1257
1258 /*
1259 * inv_mpu6050_set_lpf() - set low pass filer based on fifo rate.
1260 *
1261 * Based on the Nyquist principle, the bandwidth of the low
1262 * pass filter must not exceed the signal sampling rate divided
1263 * by 2, or there would be aliasing.
1264 * This function basically search for the correct low pass
1265 * parameters based on the fifo rate, e.g, sampling frequency.
1266 *
1267 * lpf is set automatically when setting sampling rate to avoid any aliases.
1268 */
inv_mpu6050_set_lpf(struct inv_mpu6050_state * st,int rate)1269 static int inv_mpu6050_set_lpf(struct inv_mpu6050_state *st, int rate)
1270 {
1271 static const int hz[] = {400, 200, 90, 40, 20, 10};
1272 static const int d[] = {
1273 INV_MPU6050_FILTER_200HZ, INV_MPU6050_FILTER_100HZ,
1274 INV_MPU6050_FILTER_45HZ, INV_MPU6050_FILTER_20HZ,
1275 INV_MPU6050_FILTER_10HZ, INV_MPU6050_FILTER_5HZ
1276 };
1277 int i, result;
1278 u8 data;
1279
1280 data = INV_MPU6050_FILTER_5HZ;
1281 for (i = 0; i < ARRAY_SIZE(hz); ++i) {
1282 if (rate >= hz[i]) {
1283 data = d[i];
1284 break;
1285 }
1286 }
1287 result = inv_mpu6050_set_lpf_regs(st, data);
1288 if (result)
1289 return result;
1290 st->chip_config.lpf = data;
1291
1292 return 0;
1293 }
1294
1295 /*
1296 * inv_mpu6050_fifo_rate_store() - Set fifo rate.
1297 */
1298 static ssize_t
inv_mpu6050_fifo_rate_store(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)1299 inv_mpu6050_fifo_rate_store(struct device *dev, struct device_attribute *attr,
1300 const char *buf, size_t count)
1301 {
1302 int fifo_rate;
1303 u32 fifo_period;
1304 bool fifo_on;
1305 u8 d;
1306 int result;
1307 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
1308 struct inv_mpu6050_state *st = iio_priv(indio_dev);
1309 struct device *pdev = regmap_get_device(st->map);
1310
1311 if (kstrtoint(buf, 10, &fifo_rate))
1312 return -EINVAL;
1313 if (fifo_rate < INV_MPU6050_MIN_FIFO_RATE ||
1314 fifo_rate > INV_MPU6050_MAX_FIFO_RATE)
1315 return -EINVAL;
1316
1317 /* compute the chip sample rate divider */
1318 d = INV_MPU6050_FIFO_RATE_TO_DIVIDER(fifo_rate);
1319 /* compute back the fifo rate to handle truncation cases */
1320 fifo_rate = INV_MPU6050_DIVIDER_TO_FIFO_RATE(d);
1321 fifo_period = NSEC_PER_SEC / fifo_rate;
1322
1323 mutex_lock(&st->lock);
1324 if (d == st->chip_config.divider) {
1325 result = 0;
1326 goto fifo_rate_fail_unlock;
1327 }
1328
1329 fifo_on = st->chip_config.accl_fifo_enable ||
1330 st->chip_config.gyro_fifo_enable ||
1331 st->chip_config.magn_fifo_enable;
1332 result = inv_sensors_timestamp_update_odr(&st->timestamp, fifo_period, fifo_on);
1333 if (result)
1334 goto fifo_rate_fail_unlock;
1335
1336 result = pm_runtime_resume_and_get(pdev);
1337 if (result)
1338 goto fifo_rate_fail_unlock;
1339
1340 result = regmap_write(st->map, st->reg->sample_rate_div, d);
1341 if (result)
1342 goto fifo_rate_fail_power_off;
1343 st->chip_config.divider = d;
1344
1345 result = inv_mpu6050_set_lpf(st, fifo_rate);
1346 if (result)
1347 goto fifo_rate_fail_power_off;
1348
1349 /* update rate for magn, noop if not present in chip */
1350 result = inv_mpu_magn_set_rate(st, fifo_rate);
1351 if (result)
1352 goto fifo_rate_fail_power_off;
1353
1354 /* update wom threshold since roc is dependent on sampling frequency */
1355 result = inv_mpu6050_set_wom_threshold(st, st->chip_config.roc_threshold,
1356 INV_MPU6050_FREQ_DIVIDER(st));
1357 if (result)
1358 goto fifo_rate_fail_power_off;
1359
1360 pm_runtime_mark_last_busy(pdev);
1361 fifo_rate_fail_power_off:
1362 pm_runtime_put_autosuspend(pdev);
1363 fifo_rate_fail_unlock:
1364 mutex_unlock(&st->lock);
1365 if (result)
1366 return result;
1367
1368 return count;
1369 }
1370
1371 /*
1372 * inv_fifo_rate_show() - Get the current sampling rate.
1373 */
1374 static ssize_t
inv_fifo_rate_show(struct device * dev,struct device_attribute * attr,char * buf)1375 inv_fifo_rate_show(struct device *dev, struct device_attribute *attr,
1376 char *buf)
1377 {
1378 struct inv_mpu6050_state *st = iio_priv(dev_to_iio_dev(dev));
1379 unsigned fifo_rate;
1380
1381 mutex_lock(&st->lock);
1382 fifo_rate = INV_MPU6050_DIVIDER_TO_FIFO_RATE(st->chip_config.divider);
1383 mutex_unlock(&st->lock);
1384
1385 return sysfs_emit(buf, "%u\n", fifo_rate);
1386 }
1387
1388 /*
1389 * inv_attr_show() - calling this function will show current
1390 * parameters.
1391 *
1392 * Deprecated in favor of IIO mounting matrix API.
1393 *
1394 * See inv_get_mount_matrix()
1395 */
inv_attr_show(struct device * dev,struct device_attribute * attr,char * buf)1396 static ssize_t inv_attr_show(struct device *dev, struct device_attribute *attr,
1397 char *buf)
1398 {
1399 struct inv_mpu6050_state *st = iio_priv(dev_to_iio_dev(dev));
1400 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
1401 s8 *m;
1402
1403 switch (this_attr->address) {
1404 /*
1405 * In MPU6050, the two matrix are the same because gyro and accel
1406 * are integrated in one chip
1407 */
1408 case ATTR_GYRO_MATRIX:
1409 case ATTR_ACCL_MATRIX:
1410 m = st->plat_data.orientation;
1411
1412 return sysfs_emit(buf, "%d, %d, %d; %d, %d, %d; %d, %d, %d\n",
1413 m[0], m[1], m[2], m[3], m[4], m[5], m[6], m[7], m[8]);
1414 default:
1415 return -EINVAL;
1416 }
1417 }
1418
1419 /**
1420 * inv_mpu6050_validate_trigger() - validate_trigger callback for invensense
1421 * MPU6050 device.
1422 * @indio_dev: The IIO device
1423 * @trig: The new trigger
1424 *
1425 * Returns: 0 if the 'trig' matches the trigger registered by the MPU6050
1426 * device, -EINVAL otherwise.
1427 */
inv_mpu6050_validate_trigger(struct iio_dev * indio_dev,struct iio_trigger * trig)1428 static int inv_mpu6050_validate_trigger(struct iio_dev *indio_dev,
1429 struct iio_trigger *trig)
1430 {
1431 struct inv_mpu6050_state *st = iio_priv(indio_dev);
1432
1433 if (st->trig != trig)
1434 return -EINVAL;
1435
1436 return 0;
1437 }
1438
1439 static const struct iio_mount_matrix *
inv_get_mount_matrix(const struct iio_dev * indio_dev,const struct iio_chan_spec * chan)1440 inv_get_mount_matrix(const struct iio_dev *indio_dev,
1441 const struct iio_chan_spec *chan)
1442 {
1443 struct inv_mpu6050_state *data = iio_priv(indio_dev);
1444 const struct iio_mount_matrix *matrix;
1445
1446 if (chan->type == IIO_MAGN)
1447 matrix = &data->magn_orient;
1448 else
1449 matrix = &data->orientation;
1450
1451 return matrix;
1452 }
1453
1454 static const struct iio_chan_spec_ext_info inv_ext_info[] = {
1455 IIO_MOUNT_MATRIX(IIO_SHARED_BY_TYPE, inv_get_mount_matrix),
1456 { }
1457 };
1458
1459 static const struct iio_event_spec inv_wom_events[] = {
1460 {
1461 .type = IIO_EV_TYPE_ROC,
1462 .dir = IIO_EV_DIR_RISING,
1463 .mask_separate = BIT(IIO_EV_INFO_ENABLE) |
1464 BIT(IIO_EV_INFO_VALUE),
1465 },
1466 };
1467
1468 #define INV_MPU6050_CHAN(_type, _channel2, _index) \
1469 { \
1470 .type = _type, \
1471 .modified = 1, \
1472 .channel2 = _channel2, \
1473 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
1474 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
1475 BIT(IIO_CHAN_INFO_CALIBBIAS), \
1476 .scan_index = _index, \
1477 .scan_type = { \
1478 .sign = 's', \
1479 .realbits = 16, \
1480 .storagebits = 16, \
1481 .shift = 0, \
1482 .endianness = IIO_BE, \
1483 }, \
1484 .ext_info = inv_ext_info, \
1485 }
1486
1487 #define INV_MPU6050_TEMP_CHAN(_index) \
1488 { \
1489 .type = IIO_TEMP, \
1490 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) \
1491 | BIT(IIO_CHAN_INFO_OFFSET) \
1492 | BIT(IIO_CHAN_INFO_SCALE), \
1493 .scan_index = _index, \
1494 .scan_type = { \
1495 .sign = 's', \
1496 .realbits = 16, \
1497 .storagebits = 16, \
1498 .shift = 0, \
1499 .endianness = IIO_BE, \
1500 }, \
1501 }
1502
1503 #define INV_MPU6050_EVENT_CHAN(_type, _channel2, _events, _events_nb) \
1504 { \
1505 .type = _type, \
1506 .modified = 1, \
1507 .channel2 = _channel2, \
1508 .event_spec = _events, \
1509 .num_event_specs = _events_nb, \
1510 .scan_index = -1, \
1511 }
1512
1513 static const struct iio_chan_spec inv_mpu6050_channels[] = {
1514 IIO_CHAN_SOFT_TIMESTAMP(INV_MPU6050_SCAN_TIMESTAMP),
1515
1516 INV_MPU6050_TEMP_CHAN(INV_MPU6050_SCAN_TEMP),
1517
1518 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_X, INV_MPU6050_SCAN_GYRO_X),
1519 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Y, INV_MPU6050_SCAN_GYRO_Y),
1520 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Z, INV_MPU6050_SCAN_GYRO_Z),
1521
1522 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_X, INV_MPU6050_SCAN_ACCL_X),
1523 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Y, INV_MPU6050_SCAN_ACCL_Y),
1524 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Z, INV_MPU6050_SCAN_ACCL_Z),
1525 };
1526
1527 static const struct iio_chan_spec inv_iam20380_channels[] = {
1528 IIO_CHAN_SOFT_TIMESTAMP(INV_MPU6050_SCAN_TIMESTAMP),
1529
1530 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_X, INV_MPU6050_SCAN_GYRO_X),
1531 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Y, INV_MPU6050_SCAN_GYRO_Y),
1532 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Z, INV_MPU6050_SCAN_GYRO_Z),
1533 };
1534
1535 static const struct iio_chan_spec inv_mpu6500_channels[] = {
1536 IIO_CHAN_SOFT_TIMESTAMP(INV_MPU6050_SCAN_TIMESTAMP),
1537
1538 INV_MPU6050_TEMP_CHAN(INV_MPU6050_SCAN_TEMP),
1539
1540 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_X, INV_MPU6050_SCAN_GYRO_X),
1541 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Y, INV_MPU6050_SCAN_GYRO_Y),
1542 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Z, INV_MPU6050_SCAN_GYRO_Z),
1543
1544 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_X, INV_MPU6050_SCAN_ACCL_X),
1545 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Y, INV_MPU6050_SCAN_ACCL_Y),
1546 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Z, INV_MPU6050_SCAN_ACCL_Z),
1547
1548 INV_MPU6050_EVENT_CHAN(IIO_ACCEL, IIO_MOD_X_OR_Y_OR_Z,
1549 inv_wom_events, ARRAY_SIZE(inv_wom_events)),
1550 };
1551
1552 #define INV_MPU6050_SCAN_MASK_3AXIS_ACCEL \
1553 (BIT(INV_MPU6050_SCAN_ACCL_X) \
1554 | BIT(INV_MPU6050_SCAN_ACCL_Y) \
1555 | BIT(INV_MPU6050_SCAN_ACCL_Z))
1556
1557 #define INV_MPU6050_SCAN_MASK_3AXIS_GYRO \
1558 (BIT(INV_MPU6050_SCAN_GYRO_X) \
1559 | BIT(INV_MPU6050_SCAN_GYRO_Y) \
1560 | BIT(INV_MPU6050_SCAN_GYRO_Z))
1561
1562 #define INV_MPU6050_SCAN_MASK_TEMP (BIT(INV_MPU6050_SCAN_TEMP))
1563
1564 static const unsigned long inv_mpu_scan_masks[] = {
1565 /* 3-axis accel */
1566 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL,
1567 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_TEMP,
1568 /* 3-axis gyro */
1569 INV_MPU6050_SCAN_MASK_3AXIS_GYRO,
1570 INV_MPU6050_SCAN_MASK_3AXIS_GYRO | INV_MPU6050_SCAN_MASK_TEMP,
1571 /* 6-axis accel + gyro */
1572 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_3AXIS_GYRO,
1573 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_3AXIS_GYRO
1574 | INV_MPU6050_SCAN_MASK_TEMP,
1575 0,
1576 };
1577
1578 #define INV_MPU9X50_MAGN_CHAN(_chan2, _bits, _index) \
1579 { \
1580 .type = IIO_MAGN, \
1581 .modified = 1, \
1582 .channel2 = _chan2, \
1583 .info_mask_separate = BIT(IIO_CHAN_INFO_SCALE) | \
1584 BIT(IIO_CHAN_INFO_RAW), \
1585 .scan_index = _index, \
1586 .scan_type = { \
1587 .sign = 's', \
1588 .realbits = _bits, \
1589 .storagebits = 16, \
1590 .shift = 0, \
1591 .endianness = IIO_BE, \
1592 }, \
1593 .ext_info = inv_ext_info, \
1594 }
1595
1596 static const struct iio_chan_spec inv_mpu9150_channels[] = {
1597 IIO_CHAN_SOFT_TIMESTAMP(INV_MPU9X50_SCAN_TIMESTAMP),
1598
1599 INV_MPU6050_TEMP_CHAN(INV_MPU6050_SCAN_TEMP),
1600
1601 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_X, INV_MPU6050_SCAN_GYRO_X),
1602 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Y, INV_MPU6050_SCAN_GYRO_Y),
1603 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Z, INV_MPU6050_SCAN_GYRO_Z),
1604
1605 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_X, INV_MPU6050_SCAN_ACCL_X),
1606 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Y, INV_MPU6050_SCAN_ACCL_Y),
1607 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Z, INV_MPU6050_SCAN_ACCL_Z),
1608
1609 /* Magnetometer resolution is 13 bits */
1610 INV_MPU9X50_MAGN_CHAN(IIO_MOD_X, 13, INV_MPU9X50_SCAN_MAGN_X),
1611 INV_MPU9X50_MAGN_CHAN(IIO_MOD_Y, 13, INV_MPU9X50_SCAN_MAGN_Y),
1612 INV_MPU9X50_MAGN_CHAN(IIO_MOD_Z, 13, INV_MPU9X50_SCAN_MAGN_Z),
1613 };
1614
1615 static const struct iio_chan_spec inv_mpu9250_channels[] = {
1616 IIO_CHAN_SOFT_TIMESTAMP(INV_MPU9X50_SCAN_TIMESTAMP),
1617
1618 INV_MPU6050_TEMP_CHAN(INV_MPU6050_SCAN_TEMP),
1619
1620 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_X, INV_MPU6050_SCAN_GYRO_X),
1621 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Y, INV_MPU6050_SCAN_GYRO_Y),
1622 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Z, INV_MPU6050_SCAN_GYRO_Z),
1623
1624 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_X, INV_MPU6050_SCAN_ACCL_X),
1625 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Y, INV_MPU6050_SCAN_ACCL_Y),
1626 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Z, INV_MPU6050_SCAN_ACCL_Z),
1627
1628 /* Magnetometer resolution is 16 bits */
1629 INV_MPU9X50_MAGN_CHAN(IIO_MOD_X, 16, INV_MPU9X50_SCAN_MAGN_X),
1630 INV_MPU9X50_MAGN_CHAN(IIO_MOD_Y, 16, INV_MPU9X50_SCAN_MAGN_Y),
1631 INV_MPU9X50_MAGN_CHAN(IIO_MOD_Z, 16, INV_MPU9X50_SCAN_MAGN_Z),
1632 };
1633
1634 #define INV_MPU9X50_SCAN_MASK_3AXIS_MAGN \
1635 (BIT(INV_MPU9X50_SCAN_MAGN_X) \
1636 | BIT(INV_MPU9X50_SCAN_MAGN_Y) \
1637 | BIT(INV_MPU9X50_SCAN_MAGN_Z))
1638
1639 static const unsigned long inv_iam20380_scan_masks[] = {
1640 INV_MPU6050_SCAN_MASK_3AXIS_GYRO,
1641 };
1642
1643 static const unsigned long inv_mpu9x50_scan_masks[] = {
1644 /* 3-axis accel */
1645 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL,
1646 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_TEMP,
1647 /* 3-axis gyro */
1648 INV_MPU6050_SCAN_MASK_3AXIS_GYRO,
1649 INV_MPU6050_SCAN_MASK_3AXIS_GYRO | INV_MPU6050_SCAN_MASK_TEMP,
1650 /* 3-axis magn */
1651 INV_MPU9X50_SCAN_MASK_3AXIS_MAGN,
1652 INV_MPU9X50_SCAN_MASK_3AXIS_MAGN | INV_MPU6050_SCAN_MASK_TEMP,
1653 /* 6-axis accel + gyro */
1654 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_3AXIS_GYRO,
1655 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_3AXIS_GYRO
1656 | INV_MPU6050_SCAN_MASK_TEMP,
1657 /* 6-axis accel + magn */
1658 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU9X50_SCAN_MASK_3AXIS_MAGN,
1659 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU9X50_SCAN_MASK_3AXIS_MAGN
1660 | INV_MPU6050_SCAN_MASK_TEMP,
1661 /* 6-axis gyro + magn */
1662 INV_MPU6050_SCAN_MASK_3AXIS_GYRO | INV_MPU9X50_SCAN_MASK_3AXIS_MAGN,
1663 INV_MPU6050_SCAN_MASK_3AXIS_GYRO | INV_MPU9X50_SCAN_MASK_3AXIS_MAGN
1664 | INV_MPU6050_SCAN_MASK_TEMP,
1665 /* 9-axis accel + gyro + magn */
1666 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_3AXIS_GYRO
1667 | INV_MPU9X50_SCAN_MASK_3AXIS_MAGN,
1668 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_3AXIS_GYRO
1669 | INV_MPU9X50_SCAN_MASK_3AXIS_MAGN
1670 | INV_MPU6050_SCAN_MASK_TEMP,
1671 0,
1672 };
1673
1674 static const unsigned long inv_icm20602_scan_masks[] = {
1675 /* 3-axis accel + temp (mandatory) */
1676 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_TEMP,
1677 /* 3-axis gyro + temp (mandatory) */
1678 INV_MPU6050_SCAN_MASK_3AXIS_GYRO | INV_MPU6050_SCAN_MASK_TEMP,
1679 /* 6-axis accel + gyro + temp (mandatory) */
1680 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_3AXIS_GYRO
1681 | INV_MPU6050_SCAN_MASK_TEMP,
1682 0,
1683 };
1684
1685 /*
1686 * The user can choose any frequency between INV_MPU6050_MIN_FIFO_RATE and
1687 * INV_MPU6050_MAX_FIFO_RATE, but only these frequencies are matched by the
1688 * low-pass filter. Specifically, each of these sampling rates are about twice
1689 * the bandwidth of a corresponding low-pass filter, which should eliminate
1690 * aliasing following the Nyquist principle. By picking a frequency different
1691 * from these, the user risks aliasing effects.
1692 */
1693 static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("10 20 50 100 200 500");
1694 static IIO_CONST_ATTR(in_anglvel_scale_available,
1695 "0.000133090 0.000266181 0.000532362 0.001064724");
1696 static IIO_CONST_ATTR(in_accel_scale_available,
1697 "0.000598 0.001196 0.002392 0.004785");
1698 static IIO_DEV_ATTR_SAMP_FREQ(S_IRUGO | S_IWUSR, inv_fifo_rate_show,
1699 inv_mpu6050_fifo_rate_store);
1700
1701 /* Deprecated: kept for userspace backward compatibility. */
1702 static IIO_DEVICE_ATTR(in_gyro_matrix, S_IRUGO, inv_attr_show, NULL,
1703 ATTR_GYRO_MATRIX);
1704 static IIO_DEVICE_ATTR(in_accel_matrix, S_IRUGO, inv_attr_show, NULL,
1705 ATTR_ACCL_MATRIX);
1706
1707 static struct attribute *inv_attributes[] = {
1708 &iio_dev_attr_in_gyro_matrix.dev_attr.attr, /* deprecated */
1709 &iio_dev_attr_in_accel_matrix.dev_attr.attr, /* deprecated */
1710 &iio_dev_attr_sampling_frequency.dev_attr.attr,
1711 &iio_const_attr_sampling_frequency_available.dev_attr.attr,
1712 &iio_const_attr_in_accel_scale_available.dev_attr.attr,
1713 &iio_const_attr_in_anglvel_scale_available.dev_attr.attr,
1714 NULL,
1715 };
1716
1717 static const struct attribute_group inv_attribute_group = {
1718 .attrs = inv_attributes
1719 };
1720
inv_mpu6050_reg_access(struct iio_dev * indio_dev,unsigned int reg,unsigned int writeval,unsigned int * readval)1721 static int inv_mpu6050_reg_access(struct iio_dev *indio_dev,
1722 unsigned int reg,
1723 unsigned int writeval,
1724 unsigned int *readval)
1725 {
1726 struct inv_mpu6050_state *st = iio_priv(indio_dev);
1727 int ret;
1728
1729 mutex_lock(&st->lock);
1730 if (readval)
1731 ret = regmap_read(st->map, reg, readval);
1732 else
1733 ret = regmap_write(st->map, reg, writeval);
1734 mutex_unlock(&st->lock);
1735
1736 return ret;
1737 }
1738
1739 static const struct iio_info mpu_info = {
1740 .read_raw = &inv_mpu6050_read_raw,
1741 .write_raw = &inv_mpu6050_write_raw,
1742 .write_raw_get_fmt = &inv_write_raw_get_fmt,
1743 .attrs = &inv_attribute_group,
1744 .read_event_config = inv_mpu6050_read_event_config,
1745 .write_event_config = inv_mpu6050_write_event_config,
1746 .read_event_value = inv_mpu6050_read_event_value,
1747 .write_event_value = inv_mpu6050_write_event_value,
1748 .validate_trigger = inv_mpu6050_validate_trigger,
1749 .debugfs_reg_access = &inv_mpu6050_reg_access,
1750 };
1751
1752 /*
1753 * inv_check_and_setup_chip() - check and setup chip.
1754 */
inv_check_and_setup_chip(struct inv_mpu6050_state * st)1755 static int inv_check_and_setup_chip(struct inv_mpu6050_state *st)
1756 {
1757 int result;
1758 unsigned int regval, mask;
1759 int i;
1760
1761 st->hw = &hw_info[st->chip_type];
1762 st->reg = hw_info[st->chip_type].reg;
1763 memcpy(&st->chip_config, hw_info[st->chip_type].config,
1764 sizeof(st->chip_config));
1765 st->data = devm_kzalloc(regmap_get_device(st->map), st->hw->fifo_size, GFP_KERNEL);
1766 if (st->data == NULL)
1767 return -ENOMEM;
1768
1769 /* check chip self-identification */
1770 result = regmap_read(st->map, INV_MPU6050_REG_WHOAMI, ®val);
1771 if (result)
1772 return result;
1773 if (regval != st->hw->whoami) {
1774 /* check whoami against all possible values */
1775 for (i = 0; i < INV_NUM_PARTS; ++i) {
1776 if (regval == hw_info[i].whoami) {
1777 dev_warn(regmap_get_device(st->map),
1778 "whoami mismatch got 0x%02x (%s) expected 0x%02x (%s)\n",
1779 regval, hw_info[i].name,
1780 st->hw->whoami, st->hw->name);
1781 break;
1782 }
1783 }
1784 if (i >= INV_NUM_PARTS) {
1785 dev_err(regmap_get_device(st->map),
1786 "invalid whoami 0x%02x expected 0x%02x (%s)\n",
1787 regval, st->hw->whoami, st->hw->name);
1788 return -ENODEV;
1789 }
1790 }
1791
1792 /* reset to make sure previous state are not there */
1793 result = regmap_write(st->map, st->reg->pwr_mgmt_1,
1794 INV_MPU6050_BIT_H_RESET);
1795 if (result)
1796 return result;
1797 msleep(INV_MPU6050_POWER_UP_TIME);
1798 switch (st->chip_type) {
1799 case INV_MPU6000:
1800 case INV_MPU6500:
1801 case INV_MPU6515:
1802 case INV_MPU6880:
1803 case INV_MPU9250:
1804 case INV_MPU9255:
1805 /* reset signal path (required for spi connection) */
1806 regval = INV_MPU6050_BIT_TEMP_RST | INV_MPU6050_BIT_ACCEL_RST |
1807 INV_MPU6050_BIT_GYRO_RST;
1808 result = regmap_write(st->map, INV_MPU6050_REG_SIGNAL_PATH_RESET,
1809 regval);
1810 if (result)
1811 return result;
1812 msleep(INV_MPU6050_POWER_UP_TIME);
1813 break;
1814 default:
1815 break;
1816 }
1817
1818 /*
1819 * Turn power on. After reset, the sleep bit could be on
1820 * or off depending on the OTP settings. Turning power on
1821 * make it in a definite state as well as making the hardware
1822 * state align with the software state
1823 */
1824 result = inv_mpu6050_set_power_itg(st, true);
1825 if (result)
1826 return result;
1827 mask = INV_MPU6050_SENSOR_ACCL | INV_MPU6050_SENSOR_GYRO |
1828 INV_MPU6050_SENSOR_TEMP | INV_MPU6050_SENSOR_MAGN;
1829 result = inv_mpu6050_switch_engine(st, false, mask);
1830 if (result)
1831 goto error_power_off;
1832
1833 return 0;
1834
1835 error_power_off:
1836 inv_mpu6050_set_power_itg(st, false);
1837 return result;
1838 }
1839
inv_mpu_core_enable_regulator_vddio(struct inv_mpu6050_state * st)1840 static int inv_mpu_core_enable_regulator_vddio(struct inv_mpu6050_state *st)
1841 {
1842 int result;
1843
1844 result = regulator_enable(st->vddio_supply);
1845 if (result) {
1846 dev_err(regmap_get_device(st->map),
1847 "Failed to enable vddio regulator: %d\n", result);
1848 } else {
1849 /* Give the device a little bit of time to start up. */
1850 usleep_range(3000, 5000);
1851 }
1852
1853 return result;
1854 }
1855
inv_mpu_core_disable_regulator_vddio(struct inv_mpu6050_state * st)1856 static int inv_mpu_core_disable_regulator_vddio(struct inv_mpu6050_state *st)
1857 {
1858 int result;
1859
1860 result = regulator_disable(st->vddio_supply);
1861 if (result)
1862 dev_err(regmap_get_device(st->map),
1863 "Failed to disable vddio regulator: %d\n", result);
1864
1865 return result;
1866 }
1867
inv_mpu_core_disable_regulator_action(void * _data)1868 static void inv_mpu_core_disable_regulator_action(void *_data)
1869 {
1870 struct inv_mpu6050_state *st = _data;
1871 int result;
1872
1873 result = regulator_disable(st->vdd_supply);
1874 if (result)
1875 dev_err(regmap_get_device(st->map),
1876 "Failed to disable vdd regulator: %d\n", result);
1877
1878 inv_mpu_core_disable_regulator_vddio(st);
1879 }
1880
inv_mpu_pm_disable(void * data)1881 static void inv_mpu_pm_disable(void *data)
1882 {
1883 struct device *dev = data;
1884
1885 pm_runtime_disable(dev);
1886 }
1887
inv_mpu_core_probe(struct regmap * regmap,int irq,const char * name,int (* inv_mpu_bus_setup)(struct iio_dev *),int chip_type)1888 int inv_mpu_core_probe(struct regmap *regmap, int irq, const char *name,
1889 int (*inv_mpu_bus_setup)(struct iio_dev *), int chip_type)
1890 {
1891 struct inv_mpu6050_state *st;
1892 struct iio_dev *indio_dev;
1893 struct inv_mpu6050_platform_data *pdata;
1894 struct device *dev = regmap_get_device(regmap);
1895 int result;
1896 int irq_type;
1897
1898 indio_dev = devm_iio_device_alloc(dev, sizeof(*st));
1899 if (!indio_dev)
1900 return -ENOMEM;
1901
1902 BUILD_BUG_ON(ARRAY_SIZE(hw_info) != INV_NUM_PARTS);
1903 if (chip_type < 0 || chip_type >= INV_NUM_PARTS) {
1904 dev_err(dev, "Bad invensense chip_type=%d name=%s\n",
1905 chip_type, name);
1906 return -ENODEV;
1907 }
1908 st = iio_priv(indio_dev);
1909 mutex_init(&st->lock);
1910 st->chip_type = chip_type;
1911 st->irq = irq;
1912 st->map = regmap;
1913
1914 st->level_shifter = device_property_read_bool(dev,
1915 "invensense,level-shifter");
1916 pdata = dev_get_platdata(dev);
1917 if (!pdata) {
1918 result = iio_read_mount_matrix(dev, &st->orientation);
1919 if (result) {
1920 dev_err(dev, "Failed to retrieve mounting matrix %d\n",
1921 result);
1922 return result;
1923 }
1924 } else {
1925 st->plat_data = *pdata;
1926 }
1927
1928 if (irq > 0) {
1929 irq_type = irq_get_trigger_type(irq);
1930 if (!irq_type)
1931 irq_type = IRQF_TRIGGER_RISING;
1932 } else {
1933 /* Doesn't really matter, use the default */
1934 irq_type = IRQF_TRIGGER_RISING;
1935 }
1936
1937 if (irq_type & IRQF_TRIGGER_RISING) // rising or both-edge
1938 st->irq_mask = INV_MPU6050_ACTIVE_HIGH;
1939 else if (irq_type == IRQF_TRIGGER_FALLING)
1940 st->irq_mask = INV_MPU6050_ACTIVE_LOW;
1941 else if (irq_type == IRQF_TRIGGER_HIGH)
1942 st->irq_mask = INV_MPU6050_ACTIVE_HIGH |
1943 INV_MPU6050_LATCH_INT_EN;
1944 else if (irq_type == IRQF_TRIGGER_LOW)
1945 st->irq_mask = INV_MPU6050_ACTIVE_LOW |
1946 INV_MPU6050_LATCH_INT_EN;
1947 else {
1948 dev_err(dev, "Invalid interrupt type 0x%x specified\n",
1949 irq_type);
1950 return -EINVAL;
1951 }
1952 device_set_wakeup_capable(dev, true);
1953
1954 st->vdd_supply = devm_regulator_get(dev, "vdd");
1955 if (IS_ERR(st->vdd_supply))
1956 return dev_err_probe(dev, PTR_ERR(st->vdd_supply),
1957 "Failed to get vdd regulator\n");
1958
1959 st->vddio_supply = devm_regulator_get(dev, "vddio");
1960 if (IS_ERR(st->vddio_supply))
1961 return dev_err_probe(dev, PTR_ERR(st->vddio_supply),
1962 "Failed to get vddio regulator\n");
1963
1964 result = regulator_enable(st->vdd_supply);
1965 if (result) {
1966 dev_err(dev, "Failed to enable vdd regulator: %d\n", result);
1967 return result;
1968 }
1969 msleep(INV_MPU6050_POWER_UP_TIME);
1970
1971 result = inv_mpu_core_enable_regulator_vddio(st);
1972 if (result) {
1973 regulator_disable(st->vdd_supply);
1974 return result;
1975 }
1976
1977 result = devm_add_action_or_reset(dev, inv_mpu_core_disable_regulator_action,
1978 st);
1979 if (result) {
1980 dev_err(dev, "Failed to setup regulator cleanup action %d\n",
1981 result);
1982 return result;
1983 }
1984
1985 /* fill magnetometer orientation */
1986 result = inv_mpu_magn_set_orient(st);
1987 if (result)
1988 return result;
1989
1990 /* power is turned on inside check chip type*/
1991 result = inv_check_and_setup_chip(st);
1992 if (result)
1993 return result;
1994
1995 result = inv_mpu6050_init_config(indio_dev);
1996 if (result) {
1997 dev_err(dev, "Could not initialize device.\n");
1998 goto error_power_off;
1999 }
2000
2001 dev_set_drvdata(dev, indio_dev);
2002 /* name will be NULL when enumerated via ACPI */
2003 if (name)
2004 indio_dev->name = name;
2005 else
2006 indio_dev->name = dev_name(dev);
2007
2008 /* requires parent device set in indio_dev */
2009 if (inv_mpu_bus_setup) {
2010 result = inv_mpu_bus_setup(indio_dev);
2011 if (result)
2012 goto error_power_off;
2013 }
2014
2015 /* chip init is done, turning on runtime power management */
2016 result = pm_runtime_set_active(dev);
2017 if (result)
2018 goto error_power_off;
2019 pm_runtime_get_noresume(dev);
2020 pm_runtime_enable(dev);
2021 pm_runtime_set_autosuspend_delay(dev, INV_MPU6050_SUSPEND_DELAY_MS);
2022 pm_runtime_use_autosuspend(dev);
2023 pm_runtime_put(dev);
2024 result = devm_add_action_or_reset(dev, inv_mpu_pm_disable, dev);
2025 if (result)
2026 return result;
2027
2028 switch (chip_type) {
2029 case INV_MPU6000:
2030 case INV_MPU6050:
2031 indio_dev->channels = inv_mpu6050_channels;
2032 indio_dev->num_channels = ARRAY_SIZE(inv_mpu6050_channels);
2033 indio_dev->available_scan_masks = inv_mpu_scan_masks;
2034 break;
2035 case INV_MPU9150:
2036 indio_dev->channels = inv_mpu9150_channels;
2037 indio_dev->num_channels = ARRAY_SIZE(inv_mpu9150_channels);
2038 indio_dev->available_scan_masks = inv_mpu9x50_scan_masks;
2039 break;
2040 case INV_MPU9250:
2041 case INV_MPU9255:
2042 indio_dev->channels = inv_mpu9250_channels;
2043 indio_dev->num_channels = ARRAY_SIZE(inv_mpu9250_channels);
2044 indio_dev->available_scan_masks = inv_mpu9x50_scan_masks;
2045 break;
2046 case INV_IAM20380:
2047 indio_dev->channels = inv_iam20380_channels;
2048 indio_dev->num_channels = ARRAY_SIZE(inv_iam20380_channels);
2049 indio_dev->available_scan_masks = inv_iam20380_scan_masks;
2050 break;
2051 case INV_ICM20600:
2052 case INV_ICM20602:
2053 indio_dev->channels = inv_mpu6500_channels;
2054 indio_dev->num_channels = ARRAY_SIZE(inv_mpu6500_channels);
2055 indio_dev->available_scan_masks = inv_icm20602_scan_masks;
2056 break;
2057 default:
2058 indio_dev->channels = inv_mpu6500_channels;
2059 indio_dev->num_channels = ARRAY_SIZE(inv_mpu6500_channels);
2060 indio_dev->available_scan_masks = inv_mpu_scan_masks;
2061 break;
2062 }
2063 /*
2064 * Use magnetometer inside the chip only if there is no i2c
2065 * auxiliary device in use. Otherwise Going back to 6-axis only.
2066 */
2067 if (st->magn_disabled) {
2068 switch (chip_type) {
2069 case INV_MPU9150:
2070 indio_dev->channels = inv_mpu6050_channels;
2071 indio_dev->num_channels = ARRAY_SIZE(inv_mpu6050_channels);
2072 indio_dev->available_scan_masks = inv_mpu_scan_masks;
2073 break;
2074 default:
2075 indio_dev->channels = inv_mpu6500_channels;
2076 indio_dev->num_channels = ARRAY_SIZE(inv_mpu6500_channels);
2077 indio_dev->available_scan_masks = inv_mpu_scan_masks;
2078 break;
2079 }
2080 }
2081
2082 indio_dev->info = &mpu_info;
2083
2084 if (irq > 0) {
2085 /*
2086 * The driver currently only supports buffered capture with its
2087 * own trigger. So no IRQ, no trigger, no buffer
2088 */
2089 result = devm_iio_triggered_buffer_setup(dev, indio_dev,
2090 iio_pollfunc_store_time,
2091 inv_mpu6050_read_fifo,
2092 NULL);
2093 if (result) {
2094 dev_err(dev, "configure buffer fail %d\n", result);
2095 return result;
2096 }
2097
2098 result = inv_mpu6050_probe_trigger(indio_dev, irq_type);
2099 if (result) {
2100 dev_err(dev, "trigger probe fail %d\n", result);
2101 return result;
2102 }
2103 }
2104
2105 result = devm_iio_device_register(dev, indio_dev);
2106 if (result) {
2107 dev_err(dev, "IIO register fail %d\n", result);
2108 return result;
2109 }
2110
2111 return 0;
2112
2113 error_power_off:
2114 inv_mpu6050_set_power_itg(st, false);
2115 return result;
2116 }
2117 EXPORT_SYMBOL_NS_GPL(inv_mpu_core_probe, "IIO_MPU6050");
2118
inv_mpu_resume(struct device * dev)2119 static int inv_mpu_resume(struct device *dev)
2120 {
2121 struct iio_dev *indio_dev = dev_get_drvdata(dev);
2122 struct inv_mpu6050_state *st = iio_priv(indio_dev);
2123 bool wakeup;
2124 int result;
2125
2126 guard(mutex)(&st->lock);
2127
2128 wakeup = device_may_wakeup(dev) && st->chip_config.wom_en;
2129
2130 if (wakeup) {
2131 enable_irq(st->irq);
2132 disable_irq_wake(st->irq);
2133 result = inv_mpu6050_set_wom_lp(st, false);
2134 if (result)
2135 return result;
2136 } else {
2137 result = inv_mpu_core_enable_regulator_vddio(st);
2138 if (result)
2139 return result;
2140 result = inv_mpu6050_set_power_itg(st, true);
2141 if (result)
2142 return result;
2143 }
2144
2145 pm_runtime_disable(dev);
2146 pm_runtime_set_active(dev);
2147 pm_runtime_enable(dev);
2148
2149 result = inv_mpu6050_switch_engine(st, true, st->suspended_sensors);
2150 if (result)
2151 return result;
2152
2153 if (st->chip_config.wom_en && !wakeup) {
2154 result = inv_mpu6050_set_wom_int(st, true);
2155 if (result)
2156 return result;
2157 }
2158
2159 if (iio_buffer_enabled(indio_dev))
2160 result = inv_mpu6050_prepare_fifo(st, true);
2161
2162 return result;
2163 }
2164
inv_mpu_suspend(struct device * dev)2165 static int inv_mpu_suspend(struct device *dev)
2166 {
2167 struct iio_dev *indio_dev = dev_get_drvdata(dev);
2168 struct inv_mpu6050_state *st = iio_priv(indio_dev);
2169 bool wakeup;
2170 int result;
2171
2172 guard(mutex)(&st->lock);
2173
2174 st->suspended_sensors = 0;
2175 if (pm_runtime_suspended(dev))
2176 return 0;
2177
2178 if (iio_buffer_enabled(indio_dev)) {
2179 result = inv_mpu6050_prepare_fifo(st, false);
2180 if (result)
2181 return result;
2182 }
2183
2184 wakeup = device_may_wakeup(dev) && st->chip_config.wom_en;
2185
2186 if (st->chip_config.wom_en && !wakeup) {
2187 result = inv_mpu6050_set_wom_int(st, false);
2188 if (result)
2189 return result;
2190 }
2191
2192 if (st->chip_config.accl_en && !wakeup)
2193 st->suspended_sensors |= INV_MPU6050_SENSOR_ACCL;
2194 if (st->chip_config.gyro_en)
2195 st->suspended_sensors |= INV_MPU6050_SENSOR_GYRO;
2196 if (st->chip_config.temp_en)
2197 st->suspended_sensors |= INV_MPU6050_SENSOR_TEMP;
2198 if (st->chip_config.magn_en)
2199 st->suspended_sensors |= INV_MPU6050_SENSOR_MAGN;
2200 if (st->chip_config.wom_en && !wakeup)
2201 st->suspended_sensors |= INV_MPU6050_SENSOR_WOM;
2202 result = inv_mpu6050_switch_engine(st, false, st->suspended_sensors);
2203 if (result)
2204 return result;
2205
2206 if (wakeup) {
2207 result = inv_mpu6050_set_wom_lp(st, true);
2208 if (result)
2209 return result;
2210 enable_irq_wake(st->irq);
2211 disable_irq(st->irq);
2212 } else {
2213 result = inv_mpu6050_set_power_itg(st, false);
2214 if (result)
2215 return result;
2216 inv_mpu_core_disable_regulator_vddio(st);
2217 }
2218
2219 return 0;
2220 }
2221
inv_mpu_runtime_suspend(struct device * dev)2222 static int inv_mpu_runtime_suspend(struct device *dev)
2223 {
2224 struct inv_mpu6050_state *st = iio_priv(dev_get_drvdata(dev));
2225 unsigned int sensors;
2226 int ret;
2227
2228 mutex_lock(&st->lock);
2229
2230 sensors = INV_MPU6050_SENSOR_ACCL | INV_MPU6050_SENSOR_GYRO |
2231 INV_MPU6050_SENSOR_TEMP | INV_MPU6050_SENSOR_MAGN |
2232 INV_MPU6050_SENSOR_WOM;
2233 ret = inv_mpu6050_switch_engine(st, false, sensors);
2234 if (ret)
2235 goto out_unlock;
2236
2237 ret = inv_mpu6050_set_power_itg(st, false);
2238 if (ret)
2239 goto out_unlock;
2240
2241 inv_mpu_core_disable_regulator_vddio(st);
2242
2243 out_unlock:
2244 mutex_unlock(&st->lock);
2245 return ret;
2246 }
2247
inv_mpu_runtime_resume(struct device * dev)2248 static int inv_mpu_runtime_resume(struct device *dev)
2249 {
2250 struct inv_mpu6050_state *st = iio_priv(dev_get_drvdata(dev));
2251 int ret;
2252
2253 ret = inv_mpu_core_enable_regulator_vddio(st);
2254 if (ret)
2255 return ret;
2256
2257 return inv_mpu6050_set_power_itg(st, true);
2258 }
2259
2260 EXPORT_NS_GPL_DEV_PM_OPS(inv_mpu_pmops, IIO_MPU6050) = {
2261 SYSTEM_SLEEP_PM_OPS(inv_mpu_suspend, inv_mpu_resume)
2262 RUNTIME_PM_OPS(inv_mpu_runtime_suspend, inv_mpu_runtime_resume, NULL)
2263 };
2264
2265 MODULE_AUTHOR("Invensense Corporation");
2266 MODULE_DESCRIPTION("Invensense device MPU6050 driver");
2267 MODULE_LICENSE("GPL");
2268 MODULE_IMPORT_NS("IIO_INV_SENSORS_TIMESTAMP");
2269