| /linux/drivers/dpll/zl3073x/ |
| H A D | dpll.c | 48 struct zl3073x_dpll *dpll; member
97 const struct dpll_device *dpll, void *dpll_priv, in zl3073x_dpll_pin_direction_get()
125 const struct dpll_device *dpll, in zl3073x_dpll_input_pin_esync_get()
162 const struct dpll_device *dpll, in zl3073x_dpll_input_pin_esync_set()
297 const struct dpll_device *dpll, void *dpll_priv, in zl3073x_dpll_input_pin_ffo_get()
310 const struct dpll_device *dpll, in zl3073x_dpll_input_pin_measured_freq_get()
325 const struct dpll_device *dpll, in zl3073x_dpll_input_pin_frequency_get()
342 const struct dpll_device *dpll, in zl3073x_dpll_input_pin_frequency_set()
389 const struct dpll_device *dpll, in zl3073x_dpll_input_pin_phase_offset_get()
445 const struct dpll_device *dpll, in zl3073x_dpll_input_pin_phase_adjust_get()
[all …]
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| /linux/drivers/net/ethernet/mellanox/mlx5/core/ |
| H A D | dpll.c | 11 struct dpll_device *dpll; member
146 mlx5_dpll_device_lock_status_get(const struct dpll_device *dpll, void *priv, in mlx5_dpll_device_lock_status_get()
163 static int mlx5_dpll_device_mode_get(const struct dpll_device *dpll, in mlx5_dpll_device_mode_get()
200 static int mlx5_dpll_clock_quality_level_get(const struct dpll_device *dpll, in mlx5_dpll_clock_quality_level_get()
259 const struct dpll_device *dpll, in mlx5_dpll_pin_direction_get()
270 const struct dpll_device *dpll, in mlx5_dpll_state_on_dpll_get()
288 const struct dpll_device *dpll, in mlx5_dpll_state_on_dpll_set()
302 const struct dpll_device *dpll, void *dpll_priv, in mlx5_dpll_ffo_get()
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| /linux/drivers/gpu/drm/gma500/ |
| H A D | psb_intel_display.c | 108 u32 dpll = 0, fp = 0, dspcntr, pipeconf; in psb_intel_crtc_mode_set() local
311 u32 dpll; in psb_intel_crtc_clock_get() local
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| H A D | cdv_intel_display.c | 585 u32 dpll = 0, dspcntr, pipeconf; in cdv_intel_crtc_mode_set() local
843 u32 dpll; in cdv_intel_crtc_clock_get() local
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| H A D | oaktrail_hdmi.c | 286 u32 dspcntr, pipeconf, dpll, temp; in oaktrail_crtc_hdmi_mode_set() local
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| /linux/drivers/ata/ |
| H A D | pata_hpt3x2n.c | 312 int dpll = hpt3x2n_use_dpll(ap, qc->tf.flags & ATA_TFLAG_WRITE); in hpt3x2n_qc_defer() local
328 int dpll = hpt3x2n_use_dpll(ap, qc->tf.flags & ATA_TFLAG_WRITE); in hpt3x2n_qc_issue() local
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| H A D | pata_hpt37x.c | 948 int dpll, adjust; in hpt37x_init_one() local
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| /linux/arch/arm64/boot/dts/sprd/ |
| H A D | sharkl3.dtsi | 123 dpll: dpll@0 { label
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| /linux/drivers/clk/rockchip/ |
| H A D | clk-rv1108.c | 19 apll, dpll, gpll, enumerator
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| H A D | clk-rk3036.c | 21 apll, dpll, gpll, enumerator
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| H A D | clk-rk3328.c | 21 apll, dpll, cpll, gpll, npll, enumerator
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| H A D | clk-rk3228.c | 19 apll, dpll, cpll, gpll, enumerator
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| H A D | clk-rv1126b.c | 24 gpll, cpll, aupll, dpll enumerator
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| H A D | clk-rk3308.c | 18 apll, dpll, vpll0, vpll1, enumerator
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| H A D | clk-rk3128.c | 18 apll, dpll, cpll, gpll, enumerator
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| H A D | clk-px30.c | 18 apll, dpll, cpll, npll, apll_b_h, apll_b_l, enumerator
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| H A D | clk-rk3368.c | 17 apllb, aplll, dpll, cpll, gpll, npll, enumerator
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| H A D | clk-rk3528.c | 24 apll, cpll, gpll, ppll, dpll, enumerator
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| H A D | clk-rv1126.c | 28 apll, dpll, cpll, hpll, enumerator
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| H A D | clk-rk3399.c | 19 lpll, bpll, dpll, cpll, gpll, npll, vpll, enumerator
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| H A D | clk-rk3288.c | 24 apll, dpll, cpll, gpll, npll, enumerator
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| /linux/drivers/gpu/drm/renesas/rcar-du/ |
| H A D | rcar_du_crtc.c | 84 struct dpll_info *dpll, in rcar_du_dpll_divider()
218 struct dpll_info dpll = { 0 }; in rcar_du_crtc_set_display_timing() local
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| /linux/drivers/gpu/drm/i915/display/ |
| H A D | intel_dvo.c | 422 u32 dpll[I915_MAX_PIPES]; in intel_dvo_init_dev() local
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| H A D | intel_display_types.h | 623 struct dpll { struct
646 bool dpll_set, modeset; argument
1142 struct dpll dpll; member
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| H A D | intel_display.c | 8375 u32 dpll, fp; in i830_enable_pipe() local
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