| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/ |
| H A D | clk_mgr.c | 99 void clk_mgr_exit_optimized_pwr_state(const struct dc *dc, struct clk_mgr *clk_mgr) in clk_mgr_exit_optimized_pwr_state()
125 void clk_mgr_optimize_pwr_state(const struct dc *dc, struct clk_mgr *clk_mgr) in clk_mgr_optimize_pwr_state()
158 struct clk_mgr_internal *clk_mgr = kzalloc_obj(*clk_mgr); in dc_clk_mgr_create() local
168 struct clk_mgr_internal *clk_mgr = kzalloc_obj(*clk_mgr); in dc_clk_mgr_create() local
178 struct clk_mgr_internal *clk_mgr = kzalloc_obj(*clk_mgr); in dc_clk_mgr_create() local
202 struct clk_mgr_internal *clk_mgr = kzalloc_obj(*clk_mgr); in dc_clk_mgr_create() local
216 struct clk_mgr_internal *clk_mgr = kzalloc_obj(*clk_mgr); in dc_clk_mgr_create() local
244 struct clk_mgr_internal *clk_mgr = kzalloc_obj(*clk_mgr); in dc_clk_mgr_create() local
271 struct clk_mgr_vgh *clk_mgr = kzalloc_obj(*clk_mgr); in dc_clk_mgr_create() local
283 struct clk_mgr_dcn31 *clk_mgr = kzalloc_obj(*clk_mgr); in dc_clk_mgr_create() local
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/ |
| H A D | dcn301_smu.c | 80 static uint32_t dcn301_smu_wait_for_response(struct clk_mgr_internal *clk_mgr, unsigned int delay_u… in dcn301_smu_wait_for_response()
98 static int dcn301_smu_send_msg_with_param(struct clk_mgr_internal *clk_mgr, in dcn301_smu_send_msg_with_param()
133 int dcn301_smu_get_smu_version(struct clk_mgr_internal *clk_mgr) in dcn301_smu_get_smu_version()
145 int dcn301_smu_set_dispclk(struct clk_mgr_internal *clk_mgr, int requested_dispclk_khz) in dcn301_smu_set_dispclk()
160 int dcn301_smu_set_dprefclk(struct clk_mgr_internal *clk_mgr) in dcn301_smu_set_dprefclk()
176 int dcn301_smu_set_hard_min_dcfclk(struct clk_mgr_internal *clk_mgr, int requested_dcfclk_khz) in dcn301_smu_set_hard_min_dcfclk()
190 int dcn301_smu_set_min_deep_sleep_dcfclk(struct clk_mgr_internal *clk_mgr, int requested_min_ds_dcf… in dcn301_smu_set_min_deep_sleep_dcfclk()
204 int dcn301_smu_set_dppclk(struct clk_mgr_internal *clk_mgr, int requested_dpp_khz) in dcn301_smu_set_dppclk()
218 void dcn301_smu_set_display_idle_optimization(struct clk_mgr_internal *clk_mgr, uint32_t idle_info) in dcn301_smu_set_display_idle_optimization()
230 void dcn301_smu_enable_phy_refclk_pwrdwn(struct clk_mgr_internal *clk_mgr, bool enable) in dcn301_smu_enable_phy_refclk_pwrdwn()
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/ |
| H A D | dcn31_smu.c | 85 static uint32_t dcn31_smu_wait_for_response(struct clk_mgr_internal *clk_mgr, unsigned int delay_us… in dcn31_smu_wait_for_response()
103 static int dcn31_smu_send_msg_with_param(struct clk_mgr_internal *clk_mgr, in dcn31_smu_send_msg_with_param()
147 int dcn31_smu_get_smu_version(struct clk_mgr_internal *clk_mgr) in dcn31_smu_get_smu_version()
156 int dcn31_smu_set_dispclk(struct clk_mgr_internal *clk_mgr, int requested_dispclk_khz) in dcn31_smu_set_dispclk()
172 int dcn31_smu_set_dprefclk(struct clk_mgr_internal *clk_mgr) in dcn31_smu_set_dprefclk()
189 int dcn31_smu_set_hard_min_dcfclk(struct clk_mgr_internal *clk_mgr, int requested_dcfclk_khz) in dcn31_smu_set_hard_min_dcfclk()
207 int dcn31_smu_set_min_deep_sleep_dcfclk(struct clk_mgr_internal *clk_mgr, int requested_min_ds_dcfc… in dcn31_smu_set_min_deep_sleep_dcfclk()
225 int dcn31_smu_set_dppclk(struct clk_mgr_internal *clk_mgr, int requested_dpp_khz) in dcn31_smu_set_dppclk()
240 void dcn31_smu_set_display_idle_optimization(struct clk_mgr_internal *clk_mgr, uint32_t idle_info) in dcn31_smu_set_display_idle_optimization()
255 void dcn31_smu_enable_phy_refclk_pwrdwn(struct clk_mgr_internal *clk_mgr, bool enable) in dcn31_smu_enable_phy_refclk_pwrdwn()
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| H A D | dcn31_clk_mgr.c | 73 #define TO_CLK_MGR_DCN31(clk_mgr)\ argument
142 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn31_update_clocks() local
261 static int get_vco_frequency_from_reg(struct clk_mgr_internal *clk_mgr) in get_vco_frequency_from_reg()
293 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn31_enable_pme_wa() local
298 void dcn31_init_clocks(struct clk_mgr *clk_mgr) in dcn31_init_clocks()
485 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn31_notify_wm_ranges() local
506 static void dcn31_get_dpm_table_from_smu(struct clk_mgr_internal *clk_mgr, in dcn31_get_dpm_table_from_smu()
562 static void dcn31_clk_mgr_helper_populate_bw_params(struct clk_mgr_internal *clk_mgr, in dcn31_clk_mgr_helper_populate_bw_params()
643 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn31_set_low_power_state() local
682 struct clk_mgr_dcn31 *clk_mgr, in dcn31_clk_mgr_construct()
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/ |
| H A D | dcn316_smu.c | 100 static uint32_t dcn316_smu_wait_for_response(struct clk_mgr_internal *clk_mgr, unsigned int delay_u… in dcn316_smu_wait_for_response()
119 struct clk_mgr_internal *clk_mgr, in dcn316_smu_send_msg_with_param()
152 int dcn316_smu_get_smu_version(struct clk_mgr_internal *clk_mgr) in dcn316_smu_get_smu_version()
161 int dcn316_smu_set_dispclk(struct clk_mgr_internal *clk_mgr, int requested_dispclk_khz) in dcn316_smu_set_dispclk()
177 int dcn316_smu_set_hard_min_dcfclk(struct clk_mgr_internal *clk_mgr, int requested_dcfclk_khz) in dcn316_smu_set_hard_min_dcfclk()
195 int dcn316_smu_set_min_deep_sleep_dcfclk(struct clk_mgr_internal *clk_mgr, int requested_min_ds_dcf… in dcn316_smu_set_min_deep_sleep_dcfclk()
213 int dcn316_smu_set_dppclk(struct clk_mgr_internal *clk_mgr, int requested_dpp_khz) in dcn316_smu_set_dppclk()
228 void dcn316_smu_set_display_idle_optimization(struct clk_mgr_internal *clk_mgr, uint32_t idle_info) in dcn316_smu_set_display_idle_optimization()
243 void dcn316_smu_enable_phy_refclk_pwrdwn(struct clk_mgr_internal *clk_mgr, bool enable) in dcn316_smu_enable_phy_refclk_pwrdwn()
261 void dcn316_smu_set_dram_addr_high(struct clk_mgr_internal *clk_mgr, uint32_t addr_high) in dcn316_smu_set_dram_addr_high()
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/ |
| H A D | dcn314_smu.c | 101 static uint32_t dcn314_smu_wait_for_response(struct clk_mgr_internal *clk_mgr, unsigned int delay_u… in dcn314_smu_wait_for_response()
119 static int dcn314_smu_send_msg_with_param(struct clk_mgr_internal *clk_mgr, in dcn314_smu_send_msg_with_param()
166 int dcn314_smu_get_smu_version(struct clk_mgr_internal *clk_mgr) in dcn314_smu_get_smu_version()
175 int dcn314_smu_set_dispclk(struct clk_mgr_internal *clk_mgr, int requested_dispclk_khz) in dcn314_smu_set_dispclk()
191 int dcn314_smu_set_dprefclk(struct clk_mgr_internal *clk_mgr) in dcn314_smu_set_dprefclk()
208 int dcn314_smu_set_hard_min_dcfclk(struct clk_mgr_internal *clk_mgr, int requested_dcfclk_khz) in dcn314_smu_set_hard_min_dcfclk()
226 int dcn314_smu_set_min_deep_sleep_dcfclk(struct clk_mgr_internal *clk_mgr, int requested_min_ds_dcf… in dcn314_smu_set_min_deep_sleep_dcfclk()
244 int dcn314_smu_set_dppclk(struct clk_mgr_internal *clk_mgr, int requested_dpp_khz) in dcn314_smu_set_dppclk()
259 void dcn314_smu_set_display_idle_optimization(struct clk_mgr_internal *clk_mgr, uint32_t idle_info) in dcn314_smu_set_display_idle_optimization()
274 void dcn314_smu_enable_phy_refclk_pwrdwn(struct clk_mgr_internal *clk_mgr, bool enable) in dcn314_smu_enable_phy_refclk_pwrdwn()
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| H A D | dcn314_clk_mgr.c | 107 #define TO_CLK_MGR_DCN314(clk_mgr)\ argument
179 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn314_is_spll_ssc_enabled() local
187 void dcn314_init_clocks(struct clk_mgr *clk_mgr) in dcn314_init_clocks()
213 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn314_update_clocks() local
340 static int get_vco_frequency_from_reg(struct clk_mgr_internal *clk_mgr) in get_vco_frequency_from_reg()
372 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn314_enable_pme_wa() local
556 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn314_notify_wm_ranges() local
577 static void dcn314_get_dpm_table_from_smu(struct clk_mgr_internal *clk_mgr, in dcn314_get_dpm_table_from_smu()
630 static void dcn314_clk_mgr_helper_populate_bw_params(struct clk_mgr_internal *clk_mgr, in dcn314_clk_mgr_helper_populate_bw_params()
779 static void dcn314_read_ss_info_from_lut(struct clk_mgr_internal *clk_mgr) in dcn314_read_ss_info_from_lut()
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/ |
| H A D | dcn35_clk_mgr.c | 153 #define TO_CLK_MGR_DCN35(clk_mgr)\ argument
256 static void dcn35_update_clocks_update_dtb_dto(struct clk_mgr_internal *clk_mgr, in dcn35_update_clocks_update_dtb_dto()
294 static void dcn35_update_clocks_update_dpp_dto(struct clk_mgr_internal *clk_mgr, in dcn35_update_clocks_update_dpp_dto()
359 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn35_notify_host_router_bw() local
396 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn35_update_clocks() local
552 static int get_vco_frequency_from_reg(struct clk_mgr_internal *clk_mgr) in get_vco_frequency_from_reg()
584 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn35_enable_pme_wa() local
611 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn35_save_clk_registers_internal() local
639 struct clk_mgr_dcn35 *clk_mgr) in dcn35_save_clk_registers()
725 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn35_is_spll_ssc_enabled() local
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn60/ |
| H A D | dcn60_clk_mgr.c | 119 #define TO_DCN60_CLK_MGR(clk_mgr)\ argument
122 static bool dcn60_is_ppclk_dpm_enabled(struct clk_mgr_internal *clk_mgr, PPCLK_e clk) in dcn60_is_ppclk_dpm_enabled()
182 static void dcn60_update_clocks_update_dpp_dto(struct clk_mgr_internal *clk_mgr, in dcn60_update_clocks_update_dpp_dto()
216 static int dcn60_set_hard_min_by_freq_optimized(struct clk_mgr_internal *clk_mgr, PPCLK_e clk, int … in dcn60_set_hard_min_by_freq_optimized()
241 static void dcn60_update_clocks_update_dtb_dto(struct clk_mgr_internal *clk_mgr, in dcn60_update_clocks_update_dtb_dto()
430 static uint32_t dcn60_get_vco_frequency_from_reg(struct clk_mgr_internal *clk_mgr) in dcn60_get_vco_frequency_from_reg()
460 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn60_is_smu_present() local
466 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn60_get_dtb_ref_freq_khz() local
519 static void dcn60_populate_clk_table(struct clk_mgr_internal *clk_mgr, in dcn60_populate_clk_table()
580 static void dcn60_override_bw_params(struct clk_mgr_internal *clk_mgr, in dcn60_override_bw_params()
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/ |
| H A D | dcn30m_clk_mgr_smu_msg.c | 53 static uint32_t dcn30m_smu_wait_for_response(struct clk_mgr_internal *clk_mgr, in dcn30m_smu_wait_for_response()
76 static bool dcn30m_smu_send_msg_with_param(struct clk_mgr_internal *clk_mgr, in dcn30m_smu_send_msg_with_param()
108 uint32_t dcn30m_smu_set_smart_mux_switch(struct clk_mgr_internal *clk_mgr, uint32_t pins_to_set) in dcn30m_smu_set_smart_mux_switch()
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| H A D | dcn30m_clk_mgr.c | 33 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn30m_set_smartmux_switch() local
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn201/ |
| H A D | dcn201_clk_mgr.c | 75 static void dcn201_init_clocks(struct clk_mgr *clk_mgr) in dcn201_init_clocks()
88 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn201_update_clocks() local
180 struct clk_mgr_internal *clk_mgr, in dcn201_clk_mgr_construct()
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/ |
| H A D | rv2_clk_mgr.c | 37 void rv2_clk_mgr_construct(struct dc_context *ctx, struct clk_mgr_internal *clk_mgr, struct pp_smu_… in rv2_clk_mgr_construct()
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| /linux/drivers/gpu/drm/amd/display/amdgpu_dm/ |
| H A D | amdgpu_dm_helpers.c | 1495 struct clk_mgr *clk_mgr = ctx->dc->clk_mgr; dm_helpers_dp_handle_test_pattern_request() local
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