/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/ |
H A D | dcn301_smu.c | 80 static uint32_t dcn301_smu_wait_for_response(struct clk_mgr_internal *clk_mgr, unsigned int delay_u… in dcn301_smu_wait_for_response() 98 static int dcn301_smu_send_msg_with_param(struct clk_mgr_internal *clk_mgr, in dcn301_smu_send_msg_with_param() 133 int dcn301_smu_get_smu_version(struct clk_mgr_internal *clk_mgr) in dcn301_smu_get_smu_version() 145 int dcn301_smu_set_dispclk(struct clk_mgr_internal *clk_mgr, int requested_dispclk_khz) in dcn301_smu_set_dispclk() 160 int dcn301_smu_set_dprefclk(struct clk_mgr_internal *clk_mgr) in dcn301_smu_set_dprefclk() 176 int dcn301_smu_set_hard_min_dcfclk(struct clk_mgr_internal *clk_mgr, int requested_dcfclk_khz) in dcn301_smu_set_hard_min_dcfclk() 190 int dcn301_smu_set_min_deep_sleep_dcfclk(struct clk_mgr_internal *clk_mgr, int requested_min_ds_dcf… in dcn301_smu_set_min_deep_sleep_dcfclk() 204 int dcn301_smu_set_dppclk(struct clk_mgr_internal *clk_mgr, int requested_dpp_khz) in dcn301_smu_set_dppclk() 218 void dcn301_smu_set_display_idle_optimization(struct clk_mgr_internal *clk_mgr, uint32_t idle_info) in dcn301_smu_set_display_idle_optimization() 230 void dcn301_smu_enable_phy_refclk_pwrdwn(struct clk_mgr_internal *clk_mgr, bool enable) in dcn301_smu_enable_phy_refclk_pwrdwn() [all …]
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/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/ |
H A D | dcn31_smu.c | 85 static uint32_t dcn31_smu_wait_for_response(struct clk_mgr_internal *clk_mgr, unsigned int delay_us… in dcn31_smu_wait_for_response() 103 static int dcn31_smu_send_msg_with_param(struct clk_mgr_internal *clk_mgr, in dcn31_smu_send_msg_with_param() 147 int dcn31_smu_get_smu_version(struct clk_mgr_internal *clk_mgr) in dcn31_smu_get_smu_version() 156 int dcn31_smu_set_dispclk(struct clk_mgr_internal *clk_mgr, int requested_dispclk_khz) in dcn31_smu_set_dispclk() 172 int dcn31_smu_set_dprefclk(struct clk_mgr_internal *clk_mgr) in dcn31_smu_set_dprefclk() 189 int dcn31_smu_set_hard_min_dcfclk(struct clk_mgr_internal *clk_mgr, int requested_dcfclk_khz) in dcn31_smu_set_hard_min_dcfclk() 207 int dcn31_smu_set_min_deep_sleep_dcfclk(struct clk_mgr_internal *clk_mgr, int requested_min_ds_dcfc… in dcn31_smu_set_min_deep_sleep_dcfclk() 225 int dcn31_smu_set_dppclk(struct clk_mgr_internal *clk_mgr, int requested_dpp_khz) in dcn31_smu_set_dppclk() 240 void dcn31_smu_set_display_idle_optimization(struct clk_mgr_internal *clk_mgr, uint32_t idle_info) in dcn31_smu_set_display_idle_optimization() 255 void dcn31_smu_enable_phy_refclk_pwrdwn(struct clk_mgr_internal *clk_mgr, bool enable) in dcn31_smu_enable_phy_refclk_pwrdwn() [all …]
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/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/ |
H A D | dcn316_smu.c | 100 static uint32_t dcn316_smu_wait_for_response(struct clk_mgr_internal *clk_mgr, unsigned int delay_u… in dcn316_smu_wait_for_response() 119 struct clk_mgr_internal *clk_mgr, in dcn316_smu_send_msg_with_param() 152 int dcn316_smu_get_smu_version(struct clk_mgr_internal *clk_mgr) in dcn316_smu_get_smu_version() 161 int dcn316_smu_set_dispclk(struct clk_mgr_internal *clk_mgr, int requested_dispclk_khz) in dcn316_smu_set_dispclk() 177 int dcn316_smu_set_hard_min_dcfclk(struct clk_mgr_internal *clk_mgr, int requested_dcfclk_khz) in dcn316_smu_set_hard_min_dcfclk() 195 int dcn316_smu_set_min_deep_sleep_dcfclk(struct clk_mgr_internal *clk_mgr, int requested_min_ds_dcf… in dcn316_smu_set_min_deep_sleep_dcfclk() 213 int dcn316_smu_set_dppclk(struct clk_mgr_internal *clk_mgr, int requested_dpp_khz) in dcn316_smu_set_dppclk() 228 void dcn316_smu_set_display_idle_optimization(struct clk_mgr_internal *clk_mgr, uint32_t idle_info) in dcn316_smu_set_display_idle_optimization() 243 void dcn316_smu_enable_phy_refclk_pwrdwn(struct clk_mgr_internal *clk_mgr, bool enable) in dcn316_smu_enable_phy_refclk_pwrdwn() 261 void dcn316_smu_set_dram_addr_high(struct clk_mgr_internal *clk_mgr, uint32_t addr_high) in dcn316_smu_set_dram_addr_high() [all …]
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/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/ |
H A D | dcn314_smu.c | 101 static uint32_t dcn314_smu_wait_for_response(struct clk_mgr_internal *clk_mgr, unsigned int delay_u… in dcn314_smu_wait_for_response() 119 static int dcn314_smu_send_msg_with_param(struct clk_mgr_internal *clk_mgr, in dcn314_smu_send_msg_with_param() 166 int dcn314_smu_get_smu_version(struct clk_mgr_internal *clk_mgr) in dcn314_smu_get_smu_version() 175 int dcn314_smu_set_dispclk(struct clk_mgr_internal *clk_mgr, int requested_dispclk_khz) in dcn314_smu_set_dispclk() 191 int dcn314_smu_set_dprefclk(struct clk_mgr_internal *clk_mgr) in dcn314_smu_set_dprefclk() 208 int dcn314_smu_set_hard_min_dcfclk(struct clk_mgr_internal *clk_mgr, int requested_dcfclk_khz) in dcn314_smu_set_hard_min_dcfclk() 226 int dcn314_smu_set_min_deep_sleep_dcfclk(struct clk_mgr_internal *clk_mgr, int requested_min_ds_dcf… in dcn314_smu_set_min_deep_sleep_dcfclk() 244 int dcn314_smu_set_dppclk(struct clk_mgr_internal *clk_mgr, int requested_dpp_khz) in dcn314_smu_set_dppclk() 259 void dcn314_smu_set_display_idle_optimization(struct clk_mgr_internal *clk_mgr, uint32_t idle_info) in dcn314_smu_set_display_idle_optimization() 274 void dcn314_smu_enable_phy_refclk_pwrdwn(struct clk_mgr_internal *clk_mgr, bool enable) in dcn314_smu_enable_phy_refclk_pwrdwn() [all …]
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/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/ |
H A D | dcn30_clk_mgr.c | 81 static void dcn3_init_single_clock(struct clk_mgr_internal *clk_mgr, uint32_t clk, unsigned int *en… in dcn3_init_single_clock() 102 static void dcn3_build_wm_range_table(struct clk_mgr_internal *clk_mgr) in dcn3_build_wm_range_table() 111 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn3_init_clocks() local 173 static int dcn30_get_vco_frequency_from_reg(struct clk_mgr_internal *clk_mgr) in dcn30_get_vco_frequency_from_reg() 197 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn3_update_clocks() local 327 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn3_notify_wm_ranges() local 358 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn3_set_hard_min_memclk() local 379 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn3_set_hard_max_memclk() local 390 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn3_set_max_memclk() local 399 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn3_set_min_memclk() local [all …]
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H A D | dcn30m_clk_mgr_smu_msg.c | 53 static uint32_t dcn30m_smu_wait_for_response(struct clk_mgr_internal *clk_mgr, in dcn30m_smu_wait_for_response() 76 static bool dcn30m_smu_send_msg_with_param(struct clk_mgr_internal *clk_mgr, in dcn30m_smu_send_msg_with_param() 108 uint32_t dcn30m_smu_set_smart_mux_switch(struct clk_mgr_internal *clk_mgr, uint32_t pins_to_set) in dcn30m_smu_set_smart_mux_switch()
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H A D | dcn30m_clk_mgr.c | 33 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn30m_set_smartmux_switch() local
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/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/ |
H A D | dcn20_clk_mgr.c | 104 void dcn20_update_clocks_update_dpp_dto(struct clk_mgr_internal *clk_mgr, in dcn20_update_clocks_update_dpp_dto() 127 void dcn20_update_clocks_update_dentist(struct clk_mgr_internal *clk_mgr, struct dc_state *context) in dcn20_update_clocks_update_dentist() 220 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn2_update_clocks() local 343 void dcn2_update_clocks_fpga(struct clk_mgr *clk_mgr, in dcn2_update_clocks_fpga() 403 void dcn2_init_clocks(struct clk_mgr *clk_mgr) in dcn2_init_clocks() 413 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn2_enable_pme_wa() local 427 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn2_read_clocks_from_hw_dentist() local 449 void dcn2_get_clock(struct clk_mgr *clk_mgr, in dcn2_get_clock() 495 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn2_notify_link_rate_change() local 530 struct clk_mgr_internal *clk_mgr, in dcn20_clk_mgr_construct()
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/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/ |
H A D | rn_clk_mgr.c | 89 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in rn_set_low_power_state() local 106 static void rn_update_clocks_update_dpp_dto(struct clk_mgr_internal *clk_mgr, in rn_update_clocks_update_dpp_dto() 135 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in rn_update_clocks() local 253 static int get_vco_frequency_from_reg(struct clk_mgr_internal *clk_mgr) in get_vco_frequency_from_reg() 286 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in rn_dump_clk_registers_internal() local 440 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in rn_enable_pme_wa() local 445 static void rn_init_clocks(struct clk_mgr *clk_mgr) in rn_init_clocks() 515 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in rn_notify_wm_ranges() local 547 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in rn_notify_link_rate_change() local 702 struct clk_mgr_internal *clk_mgr, in rn_clk_mgr_construct()
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/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/ |
H A D | rv1_clk_mgr.c | 34 static void rv1_init_clocks(struct clk_mgr *clk_mgr) in rv1_init_clocks() 39 static int rv1_determine_dppclk_threshold(struct clk_mgr_internal *clk_mgr, struct dc_clocks *new_c… in rv1_determine_dppclk_threshold() 86 struct clk_mgr_internal *clk_mgr, in ramp_up_dispclk_with_dpp() 191 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in rv1_update_clocks() local 293 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in rv1_enable_pme_wa() local 316 void rv1_clk_mgr_construct(struct dc_context *ctx, struct clk_mgr_internal *clk_mgr, struct pp_smu_… in rv1_clk_mgr_construct()
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H A D | rv2_clk_mgr.c | 37 void rv2_clk_mgr_construct(struct dc_context *ctx, struct clk_mgr_internal *clk_mgr, struct pp_smu_… in rv2_clk_mgr_construct()
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/linux/drivers/gpu/drm/amd/display/dc/dce/ |
H A D | dce_clk_mgr.c | 148 static int dce_get_dp_ref_freq_khz(struct clk_mgr *clk_mgr) in dce_get_dp_ref_freq_khz() 174 int dce12_get_dp_ref_freq_khz(struct clk_mgr *clk_mgr) in dce12_get_dp_ref_freq_khz() 214 struct clk_mgr *clk_mgr, in dce_get_required_clocks_state() 247 struct clk_mgr *clk_mgr, in dce_set_clock() 288 int dce112_set_clock(struct clk_mgr *clk_mgr, int requested_clk_khz) in dce112_set_clock() 468 void dce121_clock_patch_xgmi_ss_info(struct clk_mgr *clk_mgr) in dce121_clock_patch_xgmi_ss_info() 672 static void dce_update_clocks(struct clk_mgr *clk_mgr, in dce_update_clocks() 699 static void dce11_update_clocks(struct clk_mgr *clk_mgr, in dce11_update_clocks() 726 static void dce112_update_clocks(struct clk_mgr *clk_mgr, in dce112_update_clocks() 753 static void dce12_update_clocks(struct clk_mgr *clk_mgr, in dce12_update_clocks() [all …]
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/linux/drivers/gpu/drm/amd/display/dc/inc/hw/ |
H A D | clk_mgr.h | 345 struct clk_mgr { struct 347 struct clk_mgr_funcs *funcs; argument 363 struct clk_mgr *dc_clk_mgr_create(struct dc_context *ctx, struct pp_smu_funcs *pp_smu, struct dccg … argument
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/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn201/ |
H A D | dcn201_clk_mgr.c | 75 static void dcn201_init_clocks(struct clk_mgr *clk_mgr) in dcn201_init_clocks() 88 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn201_update_clocks() local 180 struct clk_mgr_internal *clk_mgr, in dcn201_clk_mgr_construct()
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/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dce112/ |
H A D | dce112_clk_mgr.c | 124 int dce112_set_dispclk(struct clk_mgr_internal *clk_mgr, int requested_clk_khz) in dce112_set_dispclk() 165 int dce112_set_dprefclk(struct clk_mgr_internal *clk_mgr) in dce112_set_dprefclk() 225 struct clk_mgr_internal *clk_mgr) in dce112_clk_mgr_construct()
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/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dce120/ |
H A D | dce120_clk_mgr.c | 128 void dce120_clk_mgr_construct(struct dc_context *ctx, struct clk_mgr_internal *clk_mgr) in dce120_clk_mgr_construct() 140 void dce121_clk_mgr_construct(struct dc_context *ctx, struct clk_mgr_internal *clk_mgr) in dce121_clk_mgr_construct()
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/linux/drivers/gpu/drm/amd/display/dc/dml/dcn35/ |
H A D | dcn35_fpu.c | 203 void dcn35_build_wm_range_table_fpu(struct clk_mgr *clk_mgr) in dcn35_build_wm_range_table_fpu()
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/linux/drivers/gpu/drm/amd/display/dc/ |
H A D | dc.h | 1720 struct clk_mgr *clk_mgr; member
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