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/linux/drivers/regulator/
H A Dpfuze100-regulator.c220 #define PFUZE100_FIXED_REG(_chip, _name, base, voltage) \ argument
235 #define PFUZE100_SW_REG(_chip, _name, base, min, max, step) \ argument
256 #define PFUZE100_SWB_REG(_chip, _name, base, mask, voltages) \ argument
273 #define PFUZE100_VGEN_REG(_chip, _name, base, min, max, step) \ argument
293 #define PFUZE100_COIN_REG(_chip, _name, base, mask, voltages) \ argument
310 #define PFUZE3000_VCC_REG(_chip, _name, base, min, max, step) { \ argument
330 #define PFUZE3000_SW_REG(_chip, _name, base, mask, voltages) \ argument
352 #define PFUZE3000_SW3_REG(_chip, _name, base, min, max, step) { \ argument
/linux/drivers/ptp/
H A Dptp_dfl_tod.c83 void __iomem *base = dt->tod_ctrl; in fine_adjust_tod_clock() local
101 void __iomem *base = dt->tod_ctrl; in coarse_adjust_tod_clock() local
130 void __iomem *base = dt->tod_ctrl; in dfl_tod_adjust_fine() local
175 void __iomem *base = dt->tod_ctrl; in dfl_tod_adjust_time() local
231 void __iomem *base = dt->tod_ctrl; in dfl_tod_get_timex() local
258 void __iomem *base = dt->tod_ctrl; in dfl_tod_set_time() local
/linux/drivers/net/ethernet/mellanox/mlxbf_gige/
H A Dmlxbf_gige_rx.c17 void __iomem *base = priv->base; in mlxbf_gige_set_mac_rx_filter() local
33 void __iomem *base = priv->base; in mlxbf_gige_get_mac_rx_filter() local
42 void __iomem *base = priv->base; in mlxbf_gige_enable_promisc() local
61 void __iomem *base = priv->base; in mlxbf_gige_disable_promisc() local
/linux/arch/arm/include/asm/
H A Dcti.h50 void __iomem *base; member
67 void __iomem *base, int irq, int trig_out) in cti_init()
87 void __iomem *base = cti->base; in cti_map_trigger() local
129 void __iomem *base = cti->base; in cti_irq_ack() local
/linux/drivers/staging/media/ipu3/
H A Dipu3-css.c190 static int imgu_hw_wait(void __iomem *base, int reg, u32 mask, u32 cmp) in imgu_hw_wait()
200 int imgu_css_set_powerup(struct device *dev, void __iomem *base, in imgu_css_set_powerup()
290 void imgu_css_set_powerdown(struct device *dev, void __iomem *base) in imgu_css_set_powerdown()
315 void __iomem *const base = css->base; in imgu_css_hw_enable_irq() local
413 void __iomem *const base = css->base; in imgu_css_hw_init() local
471 void __iomem *const base = css->base; in imgu_css_hw_start_sp() local
516 void __iomem *const base = css->base; in imgu_css_hw_start() local
609 void __iomem *const base = css->base; in imgu_css_hw_stop() local
629 void __iomem *const base = css->base; in imgu_css_hw_cleanup() local
1060 void __iomem *const base = css->base; in imgu_css_queue_pos() local
[all …]
/linux/drivers/irqchip/
H A Dirq-gic-common.c48 void __iomem *base, void (*sync_access)(void)) in gic_configure_irq() argument
93 void gic_dist_config(void __iomem *base, int gic_irqs, in gic_dist_config()
126 void gic_cpu_config(void __iomem *base, int nr, void (*sync_access)(void)) in gic_cpu_config() argument
/linux/arch/sparc/lib/
H A DNG2memcpy.S140 #define FREG_LOAD_1(base, x0) \ argument
142 #define FREG_LOAD_2(base, x0, x1) \ argument
145 #define FREG_LOAD_3(base, x0, x1, x2) \ argument
149 #define FREG_LOAD_4(base, x0, x1, x2, x3) \ argument
154 #define FREG_LOAD_5(base, x0, x1, x2, x3, x4) \ argument
160 #define FREG_LOAD_6(base, x0, x1, x2, x3, x4, x5) \ argument
167 #define FREG_LOAD_7(base, x0, x1, x2, x3, x4, x5, x6) \ argument
/linux/drivers/bus/mhi/host/
H A Dboot.c27 void __iomem *base = mhi_cntrl->bhie; in mhi_rddm_prepare() local
72 void __iomem *base = mhi_cntrl->bhie; in __mhi_download_rddm_in_panic() local
159 void __iomem *base = mhi_cntrl->bhie; in mhi_download_rddm_image() local
183 void __iomem *base = mhi_cntrl->bhie; in mhi_fw_load_bhie() local
234 void __iomem *base = mhi_cntrl->bhi; in mhi_fw_load_bhi() local
/linux/drivers/mtd/chips/
H A Dcfi_util.c202 uint32_t cfi_send_gen_cmd(u_char cmd, uint32_t cmd_addr, uint32_t base, in cfi_send_gen_cmd()
219 int __xipram cfi_qry_present(struct map_info *map, __u32 base, in cfi_qry_present()
247 int __xipram cfi_qry_mode_on(uint32_t base, struct map_info *map, in cfi_qry_mode_on()
285 void __xipram cfi_qry_mode_off(uint32_t base, struct map_info *map, in cfi_qry_mode_off()
301 __u32 base = 0; // cfi->chips[0].start; in cfi_read_pri() local
/linux/drivers/clk/mvebu/
H A Ddove-divider.c20 void __iomem *base; member
37 static void dove_load_divider(void __iomem *base, u32 val, u32 mask, u32 load) in dove_load_divider()
163 void __iomem *base) in clk_register_dove_divider()
219 static int dove_divider_init(struct device *dev, void __iomem *base, in dove_divider_init()
250 void __iomem *base; in dove_divider_clk_init() local
/linux/drivers/gpu/drm/msm/dsi/phy/
H A Ddsi_phy_14nm.c114 void __iomem *base = pll_14nm->phy->pll_base; in pll_14nm_poll_for_ready() local
286 void __iomem *base = pll->phy->pll_base; in pll_db_commit_ssc() local
321 void __iomem *base = pll->phy->pll_base; in pll_db_commit_common() local
385 void __iomem *base = pll->phy->pll_base; in pll_db_commit_14nm() local
494 void __iomem *base = pll_14nm->phy->pll_base; in dsi_pll_14nm_vco_recalc_rate() local
533 void __iomem *base = pll_14nm->phy->pll_base; in dsi_pll_14nm_vco_prepare() local
607 void __iomem *base = pll_14nm->phy->base; in dsi_pll_14nm_postdiv_recalc_rate() local
640 void __iomem *base = pll_14nm->phy->base; in dsi_pll_14nm_postdiv_set_rate() local
742 void __iomem *base = phy->pll_base; in dsi_14nm_set_usecase() local
910 void __iomem *base = phy->lane_base; in dsi_14nm_dphy_set_timing() local
[all …]
/linux/drivers/scsi/arm/
H A Darxescsi.c49 void __iomem *base; member
80 static void arxescsi_pseudo_dma_write(unsigned char *addr, void __iomem *base) in arxescsi_pseudo_dma_write()
122 void __iomem *base = info->info.scsi.io_base; in arxescsi_dma_pseudo() local
262 void __iomem *base; in arxescsi_probe() local
/linux/drivers/gpu/drm/nouveau/nvkm/engine/
H A Dfalcon.c64 const u32 base = falcon->addr; in nvkm_falcon_intr() local
100 const u32 base = falcon->addr; in nvkm_falcon_fini() local
134 const u32 base = falcon->addr; in nvkm_falcon_oneinit() local
167 const u32 base = falcon->addr; in nvkm_falcon_init() local
/linux/drivers/phy/mediatek/
H A Dphy-mtk-mipi-dsi-mt8183.c50 void __iomem *base = mipi_tx->regs; in mtk_mipi_tx_pll_enable() local
92 void __iomem *base = mipi_tx->regs; in mtk_mipi_tx_pll_disable() local
135 void __iomem *base = mipi_tx->regs; in mtk_mipi_tx_power_on_signal() local
160 void __iomem *base = mipi_tx->regs; in mtk_mipi_tx_power_off_signal() local
/linux/net/ipv4/
H A Dinetpeer.c89 struct inet_peer_base *base, in lookup()
137 static void inet_peer_gc(struct inet_peer_base *base, in inet_peer_gc()
176 struct inet_peer *inet_getpeer(struct inet_peer_base *base, in inet_getpeer()
290 void inetpeer_invalidate_tree(struct inet_peer_base *base) in inetpeer_invalidate_tree()
/linux/drivers/phy/renesas/
H A Dphy-rcar-gen2.c63 void __iomem *base; member
120 void __iomem *base = drv->base; in rcar_gen2_phy_power_on() local
164 void __iomem *base = drv->base; in rcar_gen2_phy_power_off() local
196 void __iomem *base = drv->base; in rz_g1c_phy_power_on() local
225 void __iomem *base = drv->base; in rz_g1c_phy_power_off() local
341 void __iomem *base; in rcar_gen2_phy_probe() local
/linux/drivers/gpu/drm/nouveau/nvkm/subdev/clk/
H A Dgk20a.c460 gk20a_clk_read(struct nvkm_clk *base, enum nv_clk_src src) in gk20a_clk_read()
480 gk20a_clk_calc(struct nvkm_clk *base, struct nvkm_cstate *cstate) in gk20a_clk_calc()
489 gk20a_clk_prog(struct nvkm_clk *base) in gk20a_clk_prog()
502 gk20a_clk_tidy(struct nvkm_clk *base) in gk20a_clk_tidy()
543 gk20a_clk_fini(struct nvkm_clk *base) in gk20a_clk_fini()
565 gk20a_clk_init(struct nvkm_clk *base) in gk20a_clk_init()
/linux/drivers/clk/samsung/
H A Dclk-cpu.c102 void __iomem *base; member
168 void __iomem *base = cpuclk->base; in exynos_set_safe_div() local
201 void __iomem *base = cpuclk->base; in exynos_cpuclk_pre_rate_change() local
280 void __iomem *base = cpuclk->base; in exynos_cpuclk_post_rate_change() local
328 void __iomem *base = cpuclk->base; in exynos5433_cpuclk_pre_rate_change() local
389 void __iomem *base = cpuclk->base; in exynos5433_cpuclk_post_rate_change() local
483 void __iomem *base = cpuclk->base; in exynos850_cpuclk_pre_rate_change() local
546 void __iomem *base = cpuclk->base; in exynos850_cpuclk_post_rate_change() local
/linux/include/linux/
H A Dio-mapping.h24 resource_size_t base; member
43 resource_size_t base, in io_mapping_init_wc()
132 resource_size_t base, in io_mapping_init_wc()
204 io_mapping_create_wc(resource_size_t base, in io_mapping_create_wc()
/linux/drivers/media/platform/st/stm32/stm32-dcmipp/
H A Ddcmipp-common.h172 static inline u32 __reg_read(struct device *dev, void __iomem *base, u32 reg) in __reg_read()
180 static inline void __reg_write(struct device *dev, void __iomem *base, u32 reg, in __reg_write()
187 static inline void __reg_set(struct device *dev, void __iomem *base, u32 reg, in __reg_set()
194 static inline void __reg_clear(struct device *dev, void __iomem *base, u32 reg, in __reg_clear()
/linux/arch/powerpc/include/asm/
H A Ddcr-native.h18 unsigned int base; member
130 #define mfdcri(base, reg) __mfdcri(DCRN_ ## base ## _CONFIG_ADDR, \ argument
134 #define mtdcri(base, reg, data) __mtdcri(DCRN_ ## base ## _CONFIG_ADDR, \ argument
138 #define dcri_clrset(base, reg, clr, set) __dcri_clrset(DCRN_ ## base ## _CONFIG_ADDR, \ argument
/linux/drivers/clocksource/
H A Dtimer-imx-sysctr.c37 void __iomem *base = timer_of_base(to); in sysctr_timer_enable() local
56 void __iomem *base = timer_of_base(to); in sysctr_read_counter() local
72 void __iomem *base = timer_of_base(to); in sysctr_set_next_event() local
139 void __iomem *base; in __sysctr_timer_init() local
/linux/arch/powerpc/boot/
H A Dstdio.c32 # define do_div(n, base) ({ \ argument
48 # define do_div(n,base) ({ \ argument
79 static char * number(char * str, unsigned long long num, int base, int size, int precision, int typ… in number()
150 int i, base; in vsprintf() local
/linux/drivers/clk/davinci/
H A Dpll.c105 void __iomem *base; member
289 void __iomem *base; member
368 void __iomem *base, in davinci_pll_clk_register()
544 void __iomem *base) in davinci_pll_auxclk_register()
558 void __iomem *base) in davinci_pll_sysclkbp_clk_register()
574 void __iomem *base) in davinci_pll_obsclk_register()
678 void __iomem *base) in davinci_pll_sysclk_register()
749 void __iomem *base, in of_davinci_pll_init()
895 void __iomem *base; in davinci_pll_probe() local
/linux/drivers/gpu/drm/vmwgfx/
H A Dvmwgfx_kms.h138 struct vmw_du_update_plane base; member
150 struct vmw_du_update_plane base; member
218 struct drm_framebuffer base; member
223 struct vmw_framebuffer base; member
230 struct vmw_framebuffer base; member
259 struct drm_crtc_state base; member
279 struct drm_plane_state base; member
304 struct drm_connector_state base; member
332 struct drm_plane base; member

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