1/* 2 * Copyright 2013 CompuLab Ltd. 3 * 4 * Author: Valentin Raevsky <valentin@compulab.co.il> 5 * 6 * This file is dual-licensed: you can use it either under the terms 7 * of the GPL or the X11 license, at your option. Note that this dual 8 * licensing only applies to this file, and not this project as a 9 * whole. 10 * 11 * a) This file is free software; you can redistribute it and/or 12 * modify it under the terms of the GNU General Public License 13 * version 2 as published by the Free Software Foundation. 14 * 15 * This file is distributed in the hope that it will be useful, 16 * but WITHOUT ANY WARRANTY; without even the implied warranty of 17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18 * GNU General Public License for more details. 19 * 20 * Or, alternatively, 21 * 22 * b) Permission is hereby granted, free of charge, to any person 23 * obtaining a copy of this software and associated documentation 24 * files (the "Software"), to deal in the Software without 25 * restriction, including without limitation the rights to use, 26 * copy, modify, merge, publish, distribute, sublicense, and/or 27 * sell copies of the Software, and to permit persons to whom the 28 * Software is furnished to do so, subject to the following 29 * conditions: 30 * 31 * The above copyright notice and this permission notice shall be 32 * included in all copies or substantial portions of the Software. 33 * 34 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 35 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 36 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 37 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT 38 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 39 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 40 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 41 * OTHER DEALINGS IN THE SOFTWARE. 42 */ 43 44/dts-v1/; 45#include <dt-bindings/gpio/gpio.h> 46#include <dt-bindings/sound/fsl-imx-audmux.h> 47#include "imx6q.dtsi" 48 49/ { 50 model = "CompuLab CM-FX6"; 51 compatible = "compulab,cm-fx6", "fsl,imx6q"; 52 53 memory@10000000 { 54 device_type = "memory"; 55 reg = <0x10000000 0x80000000>; 56 }; 57 58 leds { 59 compatible = "gpio-leds"; 60 61 heartbeat-led { 62 label = "Heartbeat"; 63 gpios = <&gpio2 31 0>; 64 linux,default-trigger = "heartbeat"; 65 }; 66 }; 67 68 awnh387_pwrseq: pwrseq { 69 pinctrl-names = "default"; 70 pinctrl-0 = <&pinctrl_pwrseq>; 71 compatible = "mmc-pwrseq-sd8787"; 72 powerdown-gpios = <&gpio7 12 GPIO_ACTIVE_HIGH>; 73 reset-gpios = <&gpio6 16 GPIO_ACTIVE_HIGH>; 74 }; 75 76 reg_pcie_power_on_gpio: regulator-pcie-power-on { 77 compatible = "regulator-fixed"; 78 regulator-name = "regulator-pcie-power-on-gpio"; 79 regulator-min-microvolt = <3300000>; 80 regulator-max-microvolt = <3300000>; 81 gpio = <&gpio2 24 GPIO_ACTIVE_LOW>; 82 }; 83 84 reg_usb_h1_vbus: usb_h1_vbus { 85 compatible = "regulator-fixed"; 86 regulator-name = "usb_h1_vbus"; 87 regulator-min-microvolt = <5000000>; 88 regulator-max-microvolt = <5000000>; 89 gpio = <&gpio7 8 GPIO_ACTIVE_HIGH>; 90 enable-active-high; 91 }; 92 93 reg_usb_otg_vbus: usb_otg_vbus { 94 compatible = "regulator-fixed"; 95 regulator-name = "usb_otg_vbus"; 96 regulator-min-microvolt = <5000000>; 97 regulator-max-microvolt = <5000000>; 98 gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>; 99 enable-active-high; 100 }; 101 102 avdd_reg: regulator-avdd { 103 compatible = "regulator-fixed"; 104 regulator-name = "avdd"; 105 regulator-min-microvolt = <1800000>; 106 regulator-max-microvolt = <1800000>; 107 }; 108 109 hpvdd_reg: regulator-hpvdd { 110 compatible = "regulator-fixed"; 111 regulator-name = "hpvdd"; 112 regulator-min-microvolt = <1800000>; 113 regulator-max-microvolt = <1800000>; 114 }; 115 116 dcvdd_reg: regulator-dcvdd { 117 compatible = "regulator-fixed"; 118 regulator-name = "dcvdd"; 119 regulator-min-microvolt = <3300000>; 120 regulator-max-microvolt = <3300000>; 121 }; 122 123 dbvdd_reg: regulator-dbvdd { 124 compatible = "regulator-fixed"; 125 regulator-name = "dbvdd"; 126 regulator-min-microvolt = <3300000>; 127 regulator-max-microvolt = <3300000>; 128 }; 129 130 sound-analog { 131 compatible = "simple-audio-card"; 132 simple-audio-card,name = "On-board analog audio"; 133 simple-audio-card,widgets = 134 "Headphone", "Headphone Jack", 135 "Line", "Line Out", 136 "Microphone", "Mic Jack", 137 "Line", "Line In"; 138 simple-audio-card,routing = 139 "Headphone Jack", "RHPOUT", 140 "Headphone Jack", "LHPOUT", 141 "MICIN", "Mic Bias", 142 "Mic Bias", "Mic Jack"; 143 simple-audio-card,format = "i2s"; 144 simple-audio-card,bitclock-master = <&sound_master>; 145 simple-audio-card,frame-master = <&sound_master>; 146 simple-audio-card,bitclock-inversion; 147 148 sound_master: simple-audio-card,cpu { 149 sound-dai = <&ssi2>; 150 system-clock-frequency = <2822400>; 151 }; 152 153 simple-audio-card,codec { 154 sound-dai = <&wm8731>; 155 }; 156 }; 157 158 spdif_out: spdif-out { 159 compatible = "linux,spdif-dit"; 160 #sound-dai-cells = <0>; 161 }; 162 163 spdif_in: spdif-in { 164 compatible = "linux,spdif-dir"; 165 #sound-dai-cells = <0>; 166 }; 167 168 sound-spdif { 169 compatible = "fsl,imx-audio-spdif"; 170 model = "imx-spdif"; 171 audio-cpu = <&spdif>; 172 audio-codec = <&spdif_out>, <&spdif_in>; 173 }; 174}; 175 176&audmux { 177 pinctrl-names = "default"; 178 pinctrl-0 = <&pinctrl_audmux>; 179 status = "okay"; 180 181 mux-ssi2 { 182 fsl,audmux-port = <1>; 183 fsl,port-config = < 184 (IMX_AUDMUX_V2_PTCR_RCLKDIR | 185 IMX_AUDMUX_V2_PTCR_RCSEL(3 | 0x8) | 186 IMX_AUDMUX_V2_PTCR_TCLKDIR | 187 IMX_AUDMUX_V2_PTCR_TCSEL(3)) 188 IMX_AUDMUX_V2_PDCR_RXDSEL(3) 189 >; 190 }; 191 192 mux-audmux4 { 193 fsl,audmux-port = <3>; 194 fsl,port-config = < 195 (IMX_AUDMUX_V2_PTCR_TFSDIR | 196 IMX_AUDMUX_V2_PTCR_TFSEL(1) | 197 IMX_AUDMUX_V2_PTCR_RCLKDIR | 198 IMX_AUDMUX_V2_PTCR_RCSEL(1 | 0x8) | 199 IMX_AUDMUX_V2_PTCR_TCLKDIR | 200 IMX_AUDMUX_V2_PTCR_TCSEL(1)) 201 IMX_AUDMUX_V2_PDCR_RXDSEL(1) 202 >; 203 }; 204}; 205 206&cpu0 { 207 /* 208 * Although the imx6q fuse indicates that 1.2GHz operation is possible, 209 * the module behaves unstable at this frequency. Hence, remove the 210 * 1.2GHz operation point here. 211 */ 212 operating-points = < 213 /* kHz uV */ 214 996000 1250000 215 852000 1250000 216 792000 1175000 217 396000 975000 218 >; 219 fsl,soc-operating-points = < 220 /* ARM kHz SOC-PU uV */ 221 996000 1250000 222 852000 1250000 223 792000 1175000 224 396000 1175000 225 >; 226}; 227 228&cpu1 { 229 /* 230 * Although the imx6q fuse indicates that 1.2GHz operation is possible, 231 * the module behaves unstable at this frequency. Hence, remove the 232 * 1.2GHz operation point here. 233 */ 234 operating-points = < 235 /* kHz uV */ 236 996000 1250000 237 852000 1250000 238 792000 1175000 239 396000 975000 240 >; 241 fsl,soc-operating-points = < 242 /* ARM kHz SOC-PU uV */ 243 996000 1250000 244 852000 1250000 245 792000 1175000 246 396000 1175000 247 >; 248}; 249 250&cpu2 { 251 /* 252 * Although the imx6q fuse indicates that 1.2GHz operation is possible, 253 * the module behaves unstable at this frequency. Hence, remove the 254 * 1.2GHz operation point here. 255 */ 256 operating-points = < 257 /* kHz uV */ 258 996000 1250000 259 852000 1250000 260 792000 1175000 261 396000 975000 262 >; 263 fsl,soc-operating-points = < 264 /* ARM kHz SOC-PU uV */ 265 996000 1250000 266 852000 1250000 267 792000 1175000 268 396000 1175000 269 >; 270}; 271 272&cpu3 { 273 /* 274 * Although the imx6q fuse indicates that 1.2GHz operation is possible, 275 * the module behaves unstable at this frequency. Hence, remove the 276 * 1.2GHz operation point here. 277 */ 278 operating-points = < 279 /* kHz uV */ 280 996000 1250000 281 852000 1250000 282 792000 1175000 283 396000 975000 284 >; 285 fsl,soc-operating-points = < 286 /* ARM kHz SOC-PU uV */ 287 996000 1250000 288 852000 1250000 289 792000 1175000 290 396000 1175000 291 >; 292}; 293 294&ecspi1 { 295 cs-gpios = <&gpio2 30 GPIO_ACTIVE_LOW>, <&gpio3 19 GPIO_ACTIVE_LOW>; 296 pinctrl-names = "default"; 297 pinctrl-0 = <&pinctrl_ecspi1>; 298 status = "okay"; 299 300 flash@0 { 301 #address-cells = <1>; 302 #size-cells = <1>; 303 compatible = "jedec,spi-nor"; 304 spi-max-frequency = <20000000>; 305 reg = <0>; 306 }; 307}; 308 309&fec { 310 pinctrl-names = "default"; 311 pinctrl-0 = <&pinctrl_enet>; 312 phy-mode = "rgmii"; 313 status = "okay"; 314}; 315 316&gpmi { 317 pinctrl-names = "default"; 318 pinctrl-0 = <&pinctrl_gpmi_nand>; 319 status = "okay"; 320}; 321 322&i2c3 { 323 pinctrl-names = "default"; 324 pinctrl-0 = <&pinctrl_i2c3>; 325 status = "okay"; 326 clock-frequency = <100000>; 327 328 eeprom@50 { 329 compatible = "atmel,24c02"; 330 reg = <0x50>; 331 pagesize = <16>; 332 }; 333 334 wm8731: codec@1a { 335 #sound-dai-cells = <0>; 336 compatible = "wlf,wm8731"; 337 reg = <0x1a>; 338 AVDD-supply = <&avdd_reg>; 339 HPVDD-supply = <&hpvdd_reg>; 340 DCVDD-supply = <&dcvdd_reg>; 341 DBVDD-supply = <&dbvdd_reg>; 342 }; 343}; 344 345&iomuxc { 346 pinctrl_audmux: audmuxgrp { 347 fsl,pins = < 348 MX6QDL_PAD_SD2_CMD__AUD4_RXC 0x17059 349 MX6QDL_PAD_SD2_DAT0__AUD4_RXD 0x17059 350 MX6QDL_PAD_SD2_DAT3__AUD4_TXC 0x17059 351 MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x17059 352 MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x17059 353 >; 354 }; 355 356 pinctrl_ecspi1: ecspi1grp { 357 fsl,pins = < 358 MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1 359 MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1 360 MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1 361 MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x100b1 362 MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x100b1 363 >; 364 }; 365 366 pinctrl_enet: enetgrp { 367 fsl,pins = < 368 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030 369 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030 370 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030 371 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030 372 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030 373 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030 374 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030 375 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030 376 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030 377 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030 378 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030 379 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030 380 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 381 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 382 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 383 >; 384 }; 385 386 pinctrl_gpmi_nand: gpminandgrp { 387 fsl,pins = < 388 MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1 389 MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1 390 MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1 391 MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000 392 MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1 393 MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1 394 MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1 395 MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1 396 MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1 397 MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1 398 MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1 399 MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1 400 MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1 401 MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1 402 MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1 403 MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1 404 MX6QDL_PAD_SD4_DAT0__NAND_DQS 0x00b1 405 >; 406 }; 407 408 pinctrl_i2c3: i2c3grp { 409 fsl,pins = < 410 MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1 411 MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 412 >; 413 }; 414 415 pinctrl_pcie: pciegrp { 416 fsl,pins = < 417 MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x1b0b1 418 MX6QDL_PAD_EIM_CS1__GPIO2_IO24 0x1b0b1 419 >; 420 }; 421 422 pinctrl_pwrseq: pwrseqgrp { 423 fsl,pins = < 424 MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x1b0b0 425 MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x1b0b0 426 >; 427 }; 428 429 pinctrl_spdif: spdifgrp { 430 fsl,pins = < 431 MX6QDL_PAD_GPIO_16__SPDIF_IN 0x1b0b0 432 MX6QDL_PAD_GPIO_19__SPDIF_OUT 0x1b0b0 433 >; 434 }; 435 436 pinctrl_uart4: uart4grp { 437 fsl,pins = < 438 MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1 439 MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1 440 >; 441 }; 442 443 pinctrl_usbh1: usbh1grp { 444 fsl,pins = < 445 MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x1b0b1 446 >; 447 }; 448 449 pinctrl_usbotg: usbotggrp { 450 fsl,pins = < 451 MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059 452 MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x130b0 453 >; 454 }; 455 456 pinctrl_usdhc1: usdhc1grp { 457 fsl,pins = < 458 MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17071 459 MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10071 460 MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17071 461 MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17071 462 MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17071 463 MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17071 464 >; 465 }; 466}; 467 468&pcie { 469 pinctrl-names = "default"; 470 pinctrl-0 = <&pinctrl_pcie>; 471 reset-gpio = <&gpio1 26 GPIO_ACTIVE_LOW>; 472 vpcie-supply = <®_pcie_power_on_gpio>; 473 status = "okay"; 474}; 475 476&sata { 477 status = "okay"; 478}; 479 480&snvs_poweroff { 481 status = "okay"; 482}; 483 484&spdif { 485 pinctrl-names = "default"; 486 pinctrl-0 = <&pinctrl_spdif>; 487 status = "okay"; 488}; 489 490&ssi2 { 491 assigned-clocks = <&clks IMX6QDL_CLK_SSI2_SEL>, 492 <&clks IMX6QDL_CLK_PLL4_AUDIO_DIV>; 493 assigned-clock-parents = <&clks IMX6QDL_CLK_PLL4_AUDIO_DIV>; 494 assigned-clock-rates = <0>, <786432000>; 495 status = "okay"; 496}; 497 498&uart4 { 499 pinctrl-names = "default"; 500 pinctrl-0 = <&pinctrl_uart4>; 501 status = "okay"; 502}; 503 504&usbh1 { 505 vbus-supply = <®_usb_h1_vbus>; 506 pinctrl-names = "default"; 507 pinctrl-0 = <&pinctrl_usbh1>; 508 status = "okay"; 509}; 510 511&usbotg { 512 vbus-supply = <®_usb_otg_vbus>; 513 pinctrl-names = "default"; 514 pinctrl-0 = <&pinctrl_usbotg>; 515 dr_mode = "otg"; 516 status = "okay"; 517}; 518 519&usdhc1 { 520 pinctrl-names = "default"; 521 pinctrl-0 = <&pinctrl_usdhc1>; 522 mmc-pwrseq = <&awnh387_pwrseq>; 523 non-removable; 524 /* 525 * If the OS probes the Bluetooth AMP function advertised on this bus 526 * but the firmware in place does not support it, the WiFi/BT module 527 * gets unresponsive. 528 * Users who configured their OS properly can enable this node to gain 529 * WiFi and/or plain Bluetooth support. 530 */ 531 status = "disabled"; 532}; 533