1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Common dtsi for Variscite VAR-SOM-AM62P 4 * 5 * Link: https://www.variscite.com/product/system-on-module-som/cortex-a53-krait/var-som-am62p-ti-sitara-am62px/ 6 * 7 * Copyright (C) 2025 Variscite Ltd. - https://www.variscite.com/ 8 * 9 */ 10 11/dts-v1/; 12 13#include <dt-bindings/gpio/gpio.h> 14#include <dt-bindings/input/input.h> 15#include <dt-bindings/interrupt-controller/arm-gic.h> 16#include <dt-bindings/leds/common.h> 17#include <dt-bindings/pwm/pwm.h> 18#include "k3-am62p5.dtsi" 19 20/ { 21 compatible = "variscite,var-som-am62p", "ti,am62p5"; 22 23 wifi_pwrseq: wifi-pwrseq { 24 compatible = "mmc-pwrseq-simple"; 25 post-power-on-delay-ms = <100>; 26 power-off-delay-us = <10000>; 27 reset-gpios = <&main_gpio0 54 GPIO_ACTIVE_LOW>, /* WIFI_PWR_EN */ 28 <&main_gpio0 59 GPIO_ACTIVE_LOW>; /* WIFI_EN */ 29 }; 30 31 mmc_pwrseq: mmc-pwrseq { 32 compatible = "mmc-pwrseq-emmc"; 33 pinctrl-names = "default"; 34 pinctrl-0 = <&pinctrl_mmc_pwrseq>; 35 reset-gpios = <&main_gpio0 49 GPIO_ACTIVE_LOW>; 36 }; 37 38 memory@80000000 { 39 /* 8G RAM */ 40 reg = <0x00000000 0x80000000 0x00000000 0x80000000>, 41 <0x00000008 0x80000000 0x00000001 0x80000000>; 42 device_type = "memory"; 43 bootph-pre-ram; 44 }; 45 46 opp-table { 47 /* Add 1.4GHz OPP for am62p5-sk board. Requires VDD_CORE at 0v85 */ 48 opp-1400000000 { 49 opp-hz = /bits/ 64 <1400000000>; 50 opp-supported-hw = <0x01 0x0004>; 51 clock-latency-ns = <6000000>; 52 }; 53 }; 54 55 reserved_memory: reserved-memory { 56 #address-cells = <2>; 57 #size-cells = <2>; 58 ranges; 59 60 rtos_ipc_memory_region: rtos-ipc-memory@9b500000 { 61 compatible = "shared-dma-pool"; 62 reg = <0x00 0x9b500000 0x00 0x00300000>; 63 no-map; 64 }; 65 66 wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@9c800000 { 67 compatible = "shared-dma-pool"; 68 reg = <0x00 0x9c800000 0x00 0x00100000>; 69 no-map; 70 }; 71 72 wkup_r5fss0_core0_memory_region: r5f-memory@9c900000 { 73 compatible = "shared-dma-pool"; 74 reg = <0x00 0x9c900000 0x00 0x01e00000>; 75 no-map; 76 }; 77 78 secure_tfa_ddr: tfa@9e780000 { 79 reg = <0x00 0x9e780000 0x00 0x80000>; 80 no-map; 81 }; 82 83 secure_ddr: optee@9e800000 { 84 reg = <0x00 0x9e800000 0x00 0x01800000>; /* for OP-TEE */ 85 no-map; 86 }; 87 }; 88 89 reg_3v3: regulator-3v3 { 90 compatible = "regulator-fixed"; 91 regulator-name = "On-module +V3.3"; 92 regulator-min-microvolt = <3300000>; 93 regulator-max-microvolt = <3300000>; 94 regulator-always-on; 95 regulator-boot-on; 96 }; 97 98 reg_1v8: regulator-1v8 { 99 compatible = "regulator-fixed"; 100 regulator-name = "On-module +V1.8"; 101 regulator-min-microvolt = <1800000>; 102 regulator-max-microvolt = <1800000>; 103 vin-supply = <®_3v3>; 104 regulator-always-on; 105 regulator-boot-on; 106 }; 107 108 reg_3v3_phy: regulator-3v3-phy { 109 compatible = "regulator-fixed"; 110 regulator-name = "On-module +V3.3_PHY"; 111 gpios = <&main_gpio0 45 GPIO_ACTIVE_HIGH>; 112 enable-active-high; 113 regulator-always-on; 114 }; 115 116 sound { 117 compatible = "simple-audio-card"; 118 simple-audio-card,bitclock-master = <&codec_dai>; 119 simple-audio-card,format = "dsp_b"; 120 simple-audio-card,frame-master = <&codec_dai>; 121 simple-audio-card,name = "wm8904-audio"; 122 simple-audio-card,mclk-fs = <256>; 123 simple-audio-card,routing = 124 "Headphone Jack", "HPOUTL", 125 "Headphone Jack", "HPOUTR", 126 "IN2L", "Line In Jack", 127 "IN2R", "Line In Jack", 128 "IN1L", "Microphone Jack", 129 "IN1R", "Microphone Jack"; 130 simple-audio-card,widgets = 131 "Microphone", "Microphone Jack", 132 "Headphone", "Headphone Jack", 133 "Line", "Line In Jack"; 134 135 codec_dai: simple-audio-card,codec { 136 sound-dai = <&wm8904>; 137 }; 138 139 simple-audio-card,cpu { 140 sound-dai = <&mcasp1>; 141 }; 142 }; 143}; 144 145&audio_refclk1 { 146 assigned-clock-rates = <100000000>; 147}; 148 149&cpsw3g { 150 pinctrl-names = "default"; 151 pinctrl-0 = <&pinctrl_rgmii1>; 152}; 153 154&cpsw3g_mdio { 155 pinctrl-names = "default"; 156 pinctrl-0 = <&pinctrl_mdio1>; 157 status = "okay"; 158 159 cpsw3g_phy0: ethernet-phy@4 { 160 compatible = "ethernet-phy-id0283.bc30"; 161 reg = <4>; 162 reset-gpios = <&main_gpio0 46 GPIO_ACTIVE_LOW>; 163 reset-assert-us = <10000>; 164 reset-deassert-us = <100000>; 165 }; 166}; 167 168&cpsw_port1 { 169 /* 170 * The required RGMII TX and RX 2ns delays are implemented directly 171 * in hardware via passive delay elements on the SOM PCB. 172 * No delay configuration is needed in software via PHY driver. 173 */ 174 phy-mode = "rgmii"; 175 phy-handle = <&cpsw3g_phy0>; 176 status = "okay"; 177}; 178 179&main_i2c2 { 180 pinctrl-names = "default"; 181 pinctrl-0 = <&pinctrl_i2c2>; 182 clock-frequency = <400000>; 183 status = "okay"; 184 185 wm8904: audio-codec@1a { 186 compatible = "wlf,wm8904"; 187 reg = <0x1a>; 188 #sound-dai-cells = <0>; 189 clocks = <&audio_refclk1>; 190 clock-names = "mclk"; 191 AVDD-supply = <®_1v8>; 192 CPVDD-supply = <®_1v8>; 193 DBVDD-supply = <®_3v3>; 194 DCVDD-supply = <®_1v8>; 195 MICVDD-supply = <®_1v8>; 196 }; 197}; 198 199&main_i2c3 { 200 pinctrl-names = "default"; 201 pinctrl-0 = <&pinctrl_i2c3>; 202 clock-frequency = <400000>; 203 status = "okay"; 204}; 205 206&main_pmx0 { 207 pinctrl_mmc_pwrseq: main-emmc-pwrseq-pins { 208 pinctrl-single,pins = < 209 AM62PX_IOPAD(0x00c8, PIN_OUTPUT, 7) /* (AB23) VOUT0_DATA4.GPIO0_49 */ 210 >; 211 }; 212 213 pinctrl_i2c2: main-i2c2-default-pins { 214 pinctrl-single,pins = < 215 AM62PX_IOPAD(0x00b0, PIN_INPUT_PULLUP, 1) /* (T22) GPMC0_CSn2.I2C2_SCL */ 216 AM62PX_IOPAD(0x00b4, PIN_INPUT_PULLUP, 1) /* (U25) GPMC0_CSn3.I2C2_SDA */ 217 >; 218 }; 219 220 pinctrl_i2c3: main-i2c3-default-pins { 221 pinctrl-single,pins = < 222 AM62PX_IOPAD(0x01d0, PIN_INPUT_PULLUP, 2) /* (A23) UART0_CTSn.I2C3_SCL */ 223 AM62PX_IOPAD(0x01d4, PIN_INPUT_PULLUP, 2) /* (C22) UART0_RTSn.I2C3_SDA */ 224 >; 225 }; 226 227 pinctrl_mcasp1: main-mcasp1-default-pins { 228 pinctrl-single,pins = < 229 AM62PX_IOPAD(0x0090, PIN_INPUT, 2) /* (U24) GPMC0_BE0n_CLE.MCASP1_ACLKX */ 230 AM62PX_IOPAD(0x0098, PIN_INPUT, 2) /* (AA24) GPMC0_WAIT0.MCASP1_AFSX */ 231 AM62PX_IOPAD(0x008c, PIN_OUTPUT, 2) /* (T25) GPMC0_WEn.MCASP1_AXR0 */ 232 AM62PX_IOPAD(0x0084, PIN_INPUT, 2) /* (R25) GPMC0_ADVn_ALE.MCASP1_AXR2 */ 233 AM62PX_IOPAD(0x00a0, PIN_OUTPUT, 1) /* (P24) GPMC0_WPn.AUDIO_EXT_REFCLK1 */ 234 >; 235 }; 236 237 pinctrl_mdio1: main-mdio1-default-pins { 238 pinctrl-single,pins = < 239 AM62PX_IOPAD(0x0160, PIN_OUTPUT, 0) /* (F17) MDIO0_MDC */ 240 AM62PX_IOPAD(0x015c, PIN_INPUT, 0) /* (F16) MDIO0_MDIO */ 241 >; 242 }; 243 244 pinctrl_mmc2: main-mmc2-default-pins { 245 pinctrl-single,pins = < 246 AM62PX_IOPAD(0x0120, PIN_INPUT_PULLUP, 0) /* (K24) MMC2_CMD */ 247 AM62PX_IOPAD(0x0118, PIN_INPUT_PULLDOWN, 0) /* (K21) MMC2_CLK */ 248 AM62PX_IOPAD(0x011c, PIN_INPUT_PULLUP, 0) /* () MMC2_CLKLB */ 249 AM62PX_IOPAD(0x0114, PIN_INPUT_PULLUP, 0) /* (K23) MMC2_DAT0 */ 250 AM62PX_IOPAD(0x0110, PIN_INPUT_PULLUP, 0) /* (K22) MMC2_DAT1 */ 251 AM62PX_IOPAD(0x010c, PIN_INPUT_PULLUP, 0) /* (L20) MMC2_DAT2 */ 252 AM62PX_IOPAD(0x0108, PIN_INPUT_PULLUP, 0) /* (L21) MMC2_DAT3 */ 253 >; 254 }; 255 256 pinctrl_rgmii1: main-rgmii1-default-pins { 257 pinctrl-single,pins = < 258 AM62PX_IOPAD(0x014c, PIN_INPUT, 0) /* (B15) RGMII1_RD0 */ 259 AM62PX_IOPAD(0x0150, PIN_INPUT, 0) /* (B16) RGMII1_RD1 */ 260 AM62PX_IOPAD(0x0154, PIN_INPUT, 0) /* (A14) RGMII1_RD2 */ 261 AM62PX_IOPAD(0x0158, PIN_INPUT, 0) /* (B14) RGMII1_RD3 */ 262 AM62PX_IOPAD(0x0148, PIN_INPUT, 0) /* (A16) RGMII1_RXC */ 263 AM62PX_IOPAD(0x0144, PIN_INPUT, 0) /* (A15) RGMII1_RX_CTL */ 264 AM62PX_IOPAD(0x0134, PIN_INPUT, 0) /* (A18) RGMII1_TD0 */ 265 AM62PX_IOPAD(0x0138, PIN_INPUT, 0) /* (C17) RGMII1_TD1 */ 266 AM62PX_IOPAD(0x013c, PIN_INPUT, 0) /* (A17) RGMII1_TD2 */ 267 AM62PX_IOPAD(0x0140, PIN_INPUT, 0) /* (C16) RGMII1_TD3 */ 268 AM62PX_IOPAD(0x0130, PIN_INPUT, 0) /* (B17) RGMII1_TXC */ 269 AM62PX_IOPAD(0x012c, PIN_INPUT, 0) /* (B18) RGMII1_TX_CTL */ 270 >; 271 bootph-all; 272 }; 273 274 pinctrl_spi0: main-spi0-default-pins { 275 pinctrl-single,pins = < 276 AM62PX_IOPAD(0x01bc, PIN_OUTPUT, 0) /* (B21) SPI0_CLK */ 277 AM62PX_IOPAD(0x01b4, PIN_OUTPUT, 0) /* (D20) SPI0_CS0 */ 278 AM62PX_IOPAD(0x01c0, PIN_OUTPUT, 0) /* (B20) SPI0_D0 */ 279 AM62PX_IOPAD(0x01c4, PIN_INPUT, 0) /* (C21) SPI0_D1 */ 280 >; 281 }; 282 283 pinctrl_uart5: main-uart5-default-pins { 284 pinctrl-single,pins = < 285 AM62PX_IOPAD(0x00ec, PIN_INPUT, 4) /* (AC21) VOUT0_DATA13.UART5_CTSn */ 286 AM62PX_IOPAD(0x00e8, PIN_OUTPUT, 4) /* (AD21) VOUT0_DATA12.UART5_RTSn */ 287 AM62PX_IOPAD(0x00d0, PIN_INPUT, 4) /* (AC23) VOUT0_DATA6.UART5_RXD */ 288 AM62PX_IOPAD(0x00d4, PIN_OUTPUT, 4) /* (AE23) VOUT0_DATA7.UART5_TXD */ 289 >; 290 }; 291 292 pinctrl_bt: main-btgrp-pins { 293 pinctrl-single,pins = < 294 AM62PX_IOPAD(0x00f4, PIN_OUTPUT, 7) /* (Y20) VOUT0_DATA15.GPIO0_60 (BT_EN) */ 295 >; 296 }; 297 298 pinctrl_restouch: main-restouch-pins { 299 pinctrl-single,pins = < 300 AM62PX_IOPAD(0x00c4, PIN_INPUT_PULLUP, 7) /* (Y23) VOUT0_DATA3.GPIO0_48 */ 301 >; 302 }; 303 304 pinctrl_wifi: main-wifi-default-pins { 305 pinctrl-single,pins = < 306 AM62PX_IOPAD(0x00dc, PIN_OUTPUT, 7) /* (AC22) VOUT0_DATA9.GPIO0_54 - WIFI_PWR_EN - */ 307 AM62PX_IOPAD(0x00f0, PIN_OUTPUT, 7) /* (AA20) VOUT0_DATA14.GPIO0_59 - WIFI_EN - */ 308 >; 309 }; 310}; 311 312&mcu_pmx0 { 313 pinctrl_wkup_clkout0: wkup-clkout0-default-pins { 314 pinctrl-single,pins = < 315 AM62PX_MCU_IOPAD(0x0084, PIN_OUTPUT, 0) /* (F13) WKUP_CLKOUT0 */ 316 >; 317 }; 318}; 319 320&main_spi0 { 321 pinctrl-names = "default"; 322 pinctrl-0 = <&pinctrl_spi0>; 323 ti,pindir-d0-out-d1-in; 324 status = "okay"; 325 326 /* Resistive touch controller */ 327 ads7846: touchscreen@0 { 328 compatible = "ti,ads7846"; 329 reg = <0>; 330 pinctrl-names = "default"; 331 pinctrl-0 = <&pinctrl_restouch>; 332 interrupt-parent = <&main_gpio0>; 333 interrupts = <48 IRQ_TYPE_EDGE_FALLING>; 334 spi-max-frequency = <1500000>; 335 pendown-gpio = <&main_gpio0 48 GPIO_ACTIVE_LOW>; 336 ti,x-min = /bits/ 16 <125>; 337 ti,x-max = /bits/ 16 <4008>; 338 ti,y-min = /bits/ 16 <282>; 339 ti,y-max = /bits/ 16 <3864>; 340 ti,x-plate-ohms = /bits/ 16 <180>; 341 ti,pressure-max = /bits/ 16 <255>; 342 ti,debounce-max = /bits/ 16 <10>; 343 ti,debounce-tol = /bits/ 16 <3>; 344 ti,debounce-rep = /bits/ 16 <1>; 345 ti,settle-delay-usec = /bits/ 16 <150>; 346 ti,keep-vref-on; 347 wakeup-source; 348 }; 349}; 350 351&main_uart5 { 352 pinctrl-names = "default"; 353 pinctrl-0 = <&pinctrl_uart5>, <&pinctrl_bt>; 354 uart-has-rtscts; 355 status = "okay"; 356 357 bluetooth { 358 compatible = "nxp,88w8987-bt"; 359 }; 360}; 361 362&mcasp1 { 363 pinctrl-names = "default"; 364 pinctrl-0 = <&pinctrl_mcasp1>; 365 op-mode = <0>; /* MCASP_IIS_MODE */ 366 serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */ 367 1 0 2 0 368 0 0 0 0 369 0 0 0 0 370 0 0 0 0 371 >; 372 tdm-slots = <2>; 373 tx-num-evt = <0>; 374 rx-num-evt = <0>; 375 #sound-dai-cells = <0>; 376 status = "okay"; 377}; 378 379&sdhci0 { 380 /* On-module eMMC */ 381 ti,driver-strength-ohm = <50>; 382 mmc-pwrseq = <&mmc_pwrseq>; 383 bootph-all; 384 status = "okay"; 385}; 386 387&sdhci2 { 388 /* On-module WiFi */ 389 pinctrl-names = "default"; 390 pinctrl-0 = <&pinctrl_mmc2>, <&pinctrl_wifi>; 391 bus-width = <4>; 392 non-removable; 393 keep-power-in-suspend; 394 mmc-pwrseq = <&wifi_pwrseq>; 395 ti,fails-without-test-cd; 396 status = "okay"; 397}; 398 399&usbss0 { 400 ti,vbus-divider; 401}; 402 403&usbss1 { 404 ti,vbus-divider; 405}; 406 407/* mcu_gpio0 and mcu_gpio_intr are reserved for mcu firmware usage */ 408&mcu_gpio0 { 409 status = "reserved"; 410}; 411 412&mcu_gpio_intr { 413 status = "reserved"; 414}; 415 416&wkup_rtc0 { 417 status = "disabled"; 418}; 419 420&wkup_rti0 { 421 /* WKUP RTI0 is used by DM firmware */ 422 status = "reserved"; 423}; 424 425&wkup_uart0 { 426 /* WKUP UART0 is used by DM firmware */ 427 status = "reserved"; 428}; 429 430&main_uart1 { 431 /* Main UART1 is used by TIFS firmware */ 432 status = "reserved"; 433}; 434 435#include "k3-am62p-ti-ipc-firmware.dtsi" 436