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Searched defs:VT (Results 1 – 25 of 292) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DMatchContext.h40 bool isOperationLegal(unsigned Op, EVT VT) const { in isOperationLegal()
112 SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, SDValue Operand) { in getNode()
120 SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, SDValue N1, in getNode()
128 SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, SDValue N1, in getNode()
137 SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, SDValue Operand, in getNode()
146 SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, SDValue N1, in getNode()
155 SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, SDValue N1, in getNode()
164 bool isOperationLegal(unsigned Op, EVT VT) const { in isOperationLegal()
H A DLegalizeVectorOps.cpp768 MVT VT = Node->getSimpleValueType(0); in Promote() local
826 MVT VT = Node->getOperand(IsStrict ? 1 : 0).getSimpleValueType(); in PromoteINT_TO_FP() local
864 MVT VT = Node->getSimpleValueType(0); in PromoteFP_TO_INT() local
1268 EVT VT = Node->getValueType(0).getVectorElementType(); in Expand() local
1329 EVT VT = Node->getValueType(0); in ExpandSELECT() local
1382 EVT VT = Node->getValueType(0); in ExpandSEXTINREG() local
1404 EVT VT = Node->getValueType(0); in ExpandANY_EXTEND_VECTOR_INREG() local
1438 EVT VT = Node->getValueType(0); in ExpandSIGN_EXTEND_VECTOR_INREG() local
1462 EVT VT = Node->getValueType(0); in ExpandZERO_EXTEND_VECTOR_INREG() local
1495 static void createBSWAPShuffleMask(EVT VT, SmallVectorImpl<int> &ShuffleMask) { in createBSWAPShuffleMask()
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H A DResourcePriorityQueue.cpp93 MVT VT = ScegN->getSimpleValueType(i); in numberRCValPredInSU() local
131 MVT VT = Op.getNode()->getSimpleValueType(Op.getResNo()); in numberRCValSuccInSU() local
326 MVT VT = SU->getNode()->getSimpleValueType(i); in rawRegPressureDelta() local
335 MVT VT = Op.getNode()->getSimpleValueType(Op.getResNo()); in rawRegPressureDelta() local
474 MVT VT = ScegN->getSimpleValueType(i); in scheduledNode() local
485 MVT VT = Op.getNode()->getSimpleValueType(Op.getResNo()); in scheduledNode() local
H A DSelectionDAG.cpp135 bool ConstantFPSDNode::isValueValidForType(EVT VT, in isValueValidForType()
1157 EVT VT = N->getValueType(0); in verifyNode() local
1233 EVT VT = cast<VTSDNode>(N)->getVT(); in RemoveNodeFromCSEMaps() local
1470 SDValue SelectionDAG::getFPExtendOrRound(SDValue Op, const SDLoc &DL, EVT VT) { in getFPExtendOrRound()
1479 const SDLoc &DL, EVT VT) { in getStrictFPExtendOrRound()
1491 SDValue SelectionDAG::getAnyExtOrTrunc(SDValue Op, const SDLoc &DL, EVT VT) { in getAnyExtOrTrunc()
1497 SDValue SelectionDAG::getSExtOrTrunc(SDValue Op, const SDLoc &DL, EVT VT) { in getSExtOrTrunc()
1503 SDValue SelectionDAG::getZExtOrTrunc(SDValue Op, const SDLoc &DL, EVT VT) { in getZExtOrTrunc()
1510 EVT VT) { in getBitcastedAnyExtOrTrunc()
1525 EVT VT) { in getBitcastedSExtOrTrunc()
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H A DLegalizeTypes.h62 TargetLowering::LegalizeTypeAction getTypeAction(EVT VT) const { in getTypeAction()
67 bool isTypeLegal(EVT VT) const { in isTypeLegal()
72 bool isSimpleLegalType(EVT VT) const { in isSimpleLegalType()
76 EVT getSetCCResultType(EVT VT) const { in getSetCCResultType()
282 EVT VT = Op.getValueType(); in VPSExtPromotedInteger() local
H A DDAGCombiner.cpp261 for (MVT VT : MVT::all_valuetypes()) in DAGCombiner() local
348 EVT VT = Op.getValueType(); in SimplifyDemandedBits() local
854 bool hasOperation(unsigned Opcode, EVT VT) { in hasOperation()
878 bool isTypeLegal(const EVT &VT) { in isTypeLegal()
1132 EVT VT = LoadStore->getMemoryVT(); in reassociationCanBreakAddressingModePattern() local
1172 EVT VT = LoadStore->getMemoryVT(); in reassociationCanBreakAddressingModePattern() local
1199 EVT VT = LoadStore->getMemoryVT(); in reassociationCanBreakAddressingModePattern() local
1216 EVT VT = N0.getValueType(); in reassociateOpsCommutative() local
1337 const SDLoc &DL, EVT VT, SDValue N0, in reassociateReduction()
1472 EVT VT = Load->getValueType(0); in ReplaceLoadWithPromotedLoad() local
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/freebsd/contrib/llvm-project/llvm/utils/TableGen/Basic/
H A DVTEmitter.cpp31 static void vTtoGetLlvmTyString(raw_ostream &OS, const Record *VT) { in vTtoGetLlvmTyString()
94 for (auto *VT : Records.getAllDerivedDefinitions("ValueType")) { in run() local
125 for (const auto *VT : VTsByNumber) { in run() local
183 for (const auto *VT : VTsByNumber) { in run() local
200 for (const auto *VT : VTsByNumber) { in run() local
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DTargetLowering.h481 virtual bool shouldExpandGetActiveLaneMask(EVT VT, EVT OpVT) const { in shouldExpandGetActiveLaneMask()
492 virtual bool shouldExpandCttzElements(EVT VT) const { return true; } in shouldExpandCttzElements()
503 virtual bool shouldExpandVectorMatch(EVT VT, unsigned SearchSize) const { in shouldExpandVectorMatch()
509 virtual bool shouldReassociateReduction(unsigned RedOpc, EVT VT) const { in shouldReassociateReduction()
531 getPreferredVectorAction(MVT VT) const { in getPreferredVectorAction()
573 virtual bool isIntDivCheap(EVT VT, AttributeList Attr) const { return false; } in isIntDivCheap()
576 virtual bool hasStandaloneRem(EVT VT) const { in hasStandaloneRem()
736 virtual bool isCtpopFast(EVT VT) const { in isCtpopFast()
742 virtual unsigned getCustomCtpopCost(EVT VT, ISD::CondCode Cond) const { in getCustomCtpopCost()
786 virtual bool convertSetCCLogicToBitwiseLogic(EVT VT) const { in convertSetCCLogicToBitwiseLogic()
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/freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyMachineFunctionInfo.cpp48 for (EVT VT : VTs) { in computeLegalValueVTs() local
127 for (auto VT : MFI.getParams()) in WebAssemblyFunctionInfo() local
129 for (auto VT : MFI.getResults()) in WebAssemblyFunctionInfo() local
158 for (auto VT : YamlMFI.Params) in initializeBaseYamlFields() local
160 for (auto VT : YamlMFI.Results) in initializeBaseYamlFields() local
H A DWebAssemblyMachineFunctionInfo.h81 void addParam(MVT VT) { Params.push_back(VT); } in addParam()
84 void addResult(MVT VT) { Results.push_back(VT); } in addResult()
93 void setLocal(size_t i, MVT VT) { Locals[i] = VT; } in setLocal()
94 void addLocal(MVT VT) { Locals.push_back(VT); } in addLocal()
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGenTypes/
H A DMachineValueType.h272 SimpleValueType VT = EltTyTable[SimpleTy - FIRST_VALUETYPE]; in getVectorElementType() local
384 bool knownBitsGT(MVT VT) const { in knownBitsGT()
390 bool knownBitsGE(MVT VT) const { in knownBitsGE()
395 bool knownBitsLT(MVT VT) const { in knownBitsLT()
401 bool knownBitsLE(MVT VT) const { in knownBitsLE()
406 bool bitsGT(MVT VT) const { in bitsGT()
413 bool bitsGE(MVT VT) const { in bitsGE()
420 bool bitsLT(MVT VT) const { in bitsLT()
427 bool bitsLE(MVT VT) const { in bitsLE()
453 static MVT getVectorVT(MVT VT, unsigned NumElements) { in getVectorVT()
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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DTargetLoweringBase.cpp103 RTLIB::Libcall RTLIB::getFPLibCall(EVT VT, in getFPLibCall()
482 MVT VT) { in getOUTLINE_ATOMIC()
523 RTLIB::Libcall RTLIB::getSYNC(unsigned Opc, MVT VT) { in getSYNC()
769 for (MVT VT : MVT::fp_valuetypes()) { in initActions() local
778 for (MVT VT : MVT::all_valuetypes()) { in initActions() local
1162 static unsigned getVectorTypeBreakdownMVT(MVT VT, MVT &IntermediateVT, in getVectorTypeBreakdownMVT()
1478 MVT VT = (MVT::SimpleValueType) i; in computeRegisterProperties() local
1617 EVT VT, EVT &IntermediateVT, in getVectorTypeBreakdown()
1746 EVT VT = ValueVTs[j]; in GetReturnInfo() local
1784 LLVMContext &Context, const DataLayout &DL, EVT VT, unsigned AddrSpace, in allowsMemoryAccessForAlignment()
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H A DCallingConvLower.cpp103 MVT VT = Outs[i].VT; in CheckReturn() local
117 MVT VT = Outs[i].VT; in AnalyzeReturn() local
165 MVT VT = Ins[i].VT; in AnalyzeCallResult() local
178 void CCState::AnalyzeCallResult(MVT VT, CCAssignFn Fn) { in AnalyzeCallResult()
193 static bool isValueTypeInRegForCC(CallingConv::ID CC, MVT VT) { in isValueTypeInRegForCC()
202 MVT VT, CCAssignFn Fn) { in getRemainingRegParmsForType()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86InterleavedAccess.cpp226 static MVT scaleVectorType(MVT VT) { in scaleVectorType()
254 static void genShuffleBland(MVT VT, ArrayRef<int> Mask, in genShuffleBland()
284 static void reorderSubVector(MVT VT, SmallVectorImpl<Value *> &TransposedMatrix, in reorderSubVector()
324 MVT VT = MVT::v8i16; in interleave8bitStride4VF8() local
364 MVT VT = MVT::getVectorVT(MVT::i8, NumOfElm); in interleave8bitStride4() local
433 static void createShuffleStride(MVT VT, int Stride, in createShuffleStride()
447 static void setGroupSize(MVT VT, SmallVectorImpl<int> &SizeInfo) { in setGroupSize()
470 static void DecodePALIGNRMask(MVT VT, unsigned Imm, in DecodePALIGNRMask()
555 MVT VT = MVT::getVT(Shuffles[0]->getType()); in deinterleave8bitStride3() local
603 static void group2Shuffle(MVT VT, SmallVectorImpl<int> &Mask, in group2Shuffle()
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H A DX86FastISel.cpp291 bool X86FastISel::isTypeLegal(Type *Ty, MVT &VT, bool AllowI1) { in isTypeLegal()
317 bool X86FastISel::X86FastEmitLoad(MVT VT, X86AddressMode &AM, in X86FastEmitLoad()
480 bool X86FastISel::X86FastEmitStore(EVT VT, Register ValReg, X86AddressMode &AM, in X86FastEmitStore()
653 bool X86FastISel::X86FastEmitStore(EVT VT, const Value *Val, in X86FastEmitStore()
1150 MVT VT; in X86SelectStore() local
1338 MVT VT; in X86SelectLoad() local
1357 static unsigned X86ChooseCmpOpcode(EVT VT, const X86Subtarget *Subtarget) { in X86ChooseCmpOpcode()
1384 static unsigned X86ChooseCmpImmediateOpcode(EVT VT, const ConstantInt *RHSC) { in X86ChooseCmpImmediateOpcode()
1402 bool X86FastISel::X86FastEmitCompare(const Value *Op0, const Value *Op1, EVT VT, in X86FastEmitCompare()
1440 MVT VT; in X86SelectCmp() local
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/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelDAGToDAG.cpp55 MVT VT = N->getSimpleValueType(0); in PreprocessISelDAG() local
72 MVT VT = N->getSimpleValueType(0); in PreprocessISelDAG() local
117 MVT VT = N->getSimpleValueType(0); in PreprocessISelDAG() local
178 static SDValue selectImmSeq(SelectionDAG *CurDAG, const SDLoc &DL, const MVT VT, in selectImmSeq()
207 static SDValue selectImm(SelectionDAG *CurDAG, const SDLoc &DL, const MVT VT, in selectImm()
285 MVT VT = Node->getSimpleValueType(0); in selectVLSEG() local
313 MVT VT = Node->getSimpleValueType(0); in selectVLSEGFF() local
344 MVT VT = Node->getSimpleValueType(0); in selectVLXSEG() local
392 MVT VT = Node->getOperand(2)->getSimpleValueType(0); in selectVSSEG() local
417 MVT VT = Node->getOperand(2)->getSimpleValueType(0); in selectVSXSEG() local
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H A DRISCVISelLowering.h204 bool shouldFormOverflowOp(unsigned Opcode, EVT VT, in shouldFormOverflowOp()
219 bool convertSetCCLogicToBitwiseLogic(EVT VT) const override { in convertSetCCLogicToBitwiseLogic()
222 bool convertSelectOfConstantsToMath(EVT VT) const override { return true; } in convertSelectOfConstantsToMath()
368 static MVT getM1VT(MVT VT) { in getM1VT()
H A DRISCVISelLowering.cpp181 auto addRegClassForRVV = [this](MVT VT) { in RISCVTargetLowering()
204 for (MVT VT : BoolVecVTs) in RISCVTargetLowering() local
206 for (MVT VT : IntVecVTs) { in RISCVTargetLowering() local
215 for (MVT VT : F16VecVTs) in RISCVTargetLowering() local
220 for (MVT VT : BF16VecVTs) in RISCVTargetLowering() local
224 for (MVT VT : F32VecVTs) in RISCVTargetLowering() local
228 for (MVT VT : F64VecVTs) in RISCVTargetLowering() local
232 auto addRegClassForFixedVectors = [this](MVT VT) { in RISCVTargetLowering()
238 for (MVT VT : MVT::integer_fixedlen_vector_valuetypes()) in RISCVTargetLowering() local
242 for (MVT VT : MVT::fp_fixedlen_vector_valuetypes()) in RISCVTargetLowering() local
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/freebsd/contrib/llvm-project/llvm/lib/Transforms/Instrumentation/
H A DNumericalStabilitySanitizer.cpp227 static Type *typeFromFTValueType(FTValueType VT, LLVMContext &Context) { in typeFromFTValueType()
242 static const char *typeNameFromFTValueType(FTValueType VT) { in typeNameFromFTValueType()
264 for (int VT = 0; VT < kNumValueTypes; ++VT) { in MappingConfig() local
308 if (const auto VT = ftValueTypeFromType(FT)) in getExtendedFPType() local
336 if (const auto VT = ftValueTypeFromType(FT)) in getMemoryExtentsOrDie() local
671 const FTValueType VT = static_cast<FTValueType>(I); local
770 Type *VT = Arg.getType(); in createShadowArguments() local
869 Type *VT = Arg->getType(); in populateShadowStack() local
902 if (const auto VT = ftValueTypeFromType(Ty)) in emitCheckInternal() local
1103 Type *VT = Phi.getType(); in maybeCreateShadowPhi() local
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/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/
H A DLoongArchISelDAGToDAG.cpp48 MVT VT = Node->getSimpleValueType(0); in INITIALIZE_PASS() local
226 MVT VT = Addr.getSimpleValueType(); in SelectAddrConstant() local
252 MVT VT = Addr.getSimpleValueType(); in SelectAddrRegImm12() local
314 EVT VT = N.getValueType(); in selectShiftMask() local
341 MVT VT = N.getSimpleValueType(); in selectSExti32() local
358 MVT VT = N.getSimpleValueType(); in selectZExti32() local
/freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/
H A DSparcISelLowering.h161 bool ShouldShrinkFPConstant(EVT VT) const override { in ShouldShrinkFPConstant()
180 bool enableAggressiveFMAFusion(EVT VT) const override { return true; }; in enableAggressiveFMAFusion()
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp178 static inline EVT getPackedSVEVectorVT(EVT VT) { in getPackedSVEVectorVT()
218 static inline EVT getPromotedVTForPredicate(EVT VT) { in getPromotedVTForPredicate()
240 static inline bool isPackedVectorType(EVT VT, SelectionDAG &DAG) { in isPackedVectorType()
462 for (MVT VT : MVT::integer_fixedlen_vector_valuetypes()) in AArch64TargetLowering() local
466 for (MVT VT : MVT::fp_fixedlen_vector_valuetypes()) in AArch64TargetLowering() local
647 for (MVT VT : MVT::fixedlen_vector_valuetypes()) { in AArch64TargetLowering() local
699 for (MVT VT : MVT::fixedlen_vector_valuetypes()) { in AArch64TargetLowering() local
1070 for (MVT VT : MVT::fp_valuetypes()) { in AArch64TargetLowering() local
1077 for (MVT VT : MVT::integer_valuetypes()) in AArch64TargetLowering() local
1378 for (MVT VT : MVT::fixedlen_vector_valuetypes()) { in AArch64TargetLowering() local
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H A DAArch64ISelDAGToDAG.cpp172 EVT VT = N->getValueType(0); in SelectExtractHigh() local
186 EVT VT = Op.getValueType(); in SelectRoundingVLShr() local
732 EVT VT = N.getValueType(); in SelectShiftedRegisterFromAnd() local
1473 EVT VT = N->getValueType(0); in SelectTable() local
1590 EVT VT = LD->getMemoryVT(); in tryIndexedLoad() local
1732 EVT VT = N->getValueType(0); in SelectLoad() local
1761 EVT VT = N->getValueType(0); in SelectPostLoad() local
1825 static unsigned SelectOpcodeFromVT(EVT VT, ArrayRef<unsigned> Opcodes) { in SelectOpcodeFromVT()
1884 EVT VT = N->getValueType(0); in SelectPExtPair() local
1898 EVT VT = N->getValueType(0); in SelectWhilePair() local
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/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUISelLowering.cpp40 EVT AMDGPUTargetLowering::getEquivalentMemType(LLVMContext &Ctx, EVT VT) { in getEquivalentMemType()
183 for (MVT VT : MVT::integer_valuetypes()) in AMDGPUTargetLowering() local
187 for (MVT VT : MVT::integer_valuetypes()) { in AMDGPUTargetLowering() local
199 for (MVT VT : MVT::integer_fixedlen_vector_valuetypes()) in AMDGPUTargetLowering() local
474 for (MVT VT : ScalarIntVTs) { in AMDGPUTargetLowering() local
520 for (MVT VT : VectorIntTypes) { in AMDGPUTargetLowering() local
541 for (MVT VT : FloatVectorTypes) { in AMDGPUTargetLowering() local
718 static bool opMustUseVOP3Encoding(const SDNode *N, MVT VT) { in opMustUseVOP3Encoding()
779 MVT VT = N->getValueType(0).getScalarType().getSimpleVT(); in allUsesHaveSourceMods() local
797 EVT AMDGPUTargetLowering::getTypeForExtReturn(LLVMContext &Context, EVT VT, in getTypeForExtReturn()
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/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp175 void ARMTargetLowering::addTypeForNEON(MVT VT, MVT PromotedLdStVT) { in addTypeForNEON()
233 void ARMTargetLowering::addDRTypeForNEON(MVT VT) { in addDRTypeForNEON()
238 void ARMTargetLowering::addQRTypeForNEON(MVT VT) { in addQRTypeForNEON()
243 void ARMTargetLowering::setAllExpand(MVT VT) { in setAllExpand()
266 for (auto VT : IntTypes) { in addMVEVectorTypes() local
341 for (auto VT : FloatTypes) { in addMVEVectorTypes() local
416 for (auto VT : LongTypes) { in addMVEVectorTypes() local
462 for (auto VT : pTypes) { in addMVEVectorTypes() local
798 for (MVT VT : MVT::fixedlen_vector_valuetypes()) { in ARMTargetLowering() local
996 for (MVT VT : MVT::fixedlen_vector_valuetypes()) { in ARMTargetLowering() local
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