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Searched defs:VT (Results 1 – 25 of 237) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DMatchContext.h41 bool isOperationLegal(unsigned Op, EVT VT) const { in isOperationLegal()
111 SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, SDValue Operand) { in getNode()
119 SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, SDValue N1, in getNode()
127 SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, SDValue N1, in getNode()
136 SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, SDValue Operand, in getNode()
145 SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, SDValue N1, in getNode()
154 SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, SDValue N1, in getNode()
163 bool isOperationLegal(unsigned Op, EVT VT) const { in isOperationLegal()
H A DLegalizeVectorOps.cpp709 MVT VT = Node->getSimpleValueType(0); in Promote() local
750 MVT VT = Node->getOperand(IsStrict ? 1 : 0).getSimpleValueType(); in PromoteINT_TO_FP() local
788 MVT VT = Node->getSimpleValueType(0); in PromoteFP_TO_INT() local
1147 EVT VT = Node->getValueType(0); in ExpandSELECT() local
1200 EVT VT = Node->getValueType(0); in ExpandSEXTINREG() local
1222 EVT VT = Node->getValueType(0); in ExpandANY_EXTEND_VECTOR_INREG() local
1257 EVT VT = Node->getValueType(0); in ExpandSIGN_EXTEND_VECTOR_INREG() local
1281 EVT VT = Node->getValueType(0); in ExpandZERO_EXTEND_VECTOR_INREG() local
1315 static void createBSWAPShuffleMask(EVT VT, SmallVectorImpl<int> &ShuffleMask) { in createBSWAPShuffleMask()
1323 EVT VT = Node->getValueType(0); in ExpandBSWAP() local
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H A DResourcePriorityQueue.cpp93 MVT VT = ScegN->getSimpleValueType(i); in numberRCValPredInSU() local
131 MVT VT = Op.getNode()->getSimpleValueType(Op.getResNo()); in numberRCValSuccInSU() local
326 MVT VT = SU->getNode()->getSimpleValueType(i); in rawRegPressureDelta() local
335 MVT VT = Op.getNode()->getSimpleValueType(Op.getResNo()); in rawRegPressureDelta() local
474 MVT VT = ScegN->getSimpleValueType(i); in scheduledNode() local
485 MVT VT = Op.getNode()->getSimpleValueType(Op.getResNo()); in scheduledNode() local
H A DSelectionDAG.cpp128 bool ConstantFPSDNode::isValueValidForType(EVT VT, in isValueValidForType()
1123 EVT VT = N->getValueType(0); in VerifySDNode() local
1199 EVT VT = cast<VTSDNode>(N)->getVT(); in RemoveNodeFromCSEMaps() local
1433 SDValue SelectionDAG::getFPExtendOrRound(SDValue Op, const SDLoc &DL, EVT VT) { in getFPExtendOrRound()
1442 const SDLoc &DL, EVT VT) { in getStrictFPExtendOrRound()
1454 SDValue SelectionDAG::getAnyExtOrTrunc(SDValue Op, const SDLoc &DL, EVT VT) { in getAnyExtOrTrunc()
1460 SDValue SelectionDAG::getSExtOrTrunc(SDValue Op, const SDLoc &DL, EVT VT) { in getSExtOrTrunc()
1466 SDValue SelectionDAG::getZExtOrTrunc(SDValue Op, const SDLoc &DL, EVT VT) { in getZExtOrTrunc()
1473 EVT VT) { in getBitcastedAnyExtOrTrunc()
1488 EVT VT) { in getBitcastedSExtOrTrunc()
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H A DLegalizeTypes.h62 TargetLowering::LegalizeTypeAction getTypeAction(EVT VT) const { in getTypeAction()
67 bool isTypeLegal(EVT VT) const { in isTypeLegal()
72 bool isSimpleLegalType(EVT VT) const { in isSimpleLegalType()
76 EVT getSetCCResultType(EVT VT) const { in getSetCCResultType()
282 EVT VT = Op.getValueType(); in VPSExtPromotedInteger() local
H A DDAGCombiner.cpp256 for (MVT VT : MVT::all_valuetypes()) in DAGCombiner() local
343 EVT VT = Op.getValueType(); in SimplifyDemandedBits() local
841 bool hasOperation(unsigned Opcode, EVT VT) { in hasOperation()
858 bool isTypeLegal(const EVT &VT) { in isTypeLegal()
1112 EVT VT = LoadStore->getMemoryVT(); in reassociationCanBreakAddressingModePattern() local
1152 EVT VT = LoadStore->getMemoryVT(); in reassociationCanBreakAddressingModePattern() local
1179 EVT VT = LoadStore->getMemoryVT(); in reassociationCanBreakAddressingModePattern() local
1196 EVT VT = N0.getValueType(); in reassociateOpsCommutative() local
1314 const SDLoc &DL, EVT VT, SDValue N0, in reassociateReduction()
1415 EVT VT = Load->getValueType(0); in ReplaceLoadWithPromotedLoad() local
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/freebsd/contrib/llvm-project/llvm/utils/TableGen/
H A DVTEmitter.cpp32 static void VTtoGetLLVMTyString(raw_ostream &OS, const Record *VT) { in VTtoGetLLVMTyString()
84 for (auto *VT : ValueTypes) { in run() local
113 for (const auto *VT : VTsByNumber) { in run() local
166 for (const auto *VT : VTsByNumber) { in run() local
182 for (const auto *VT : VTsByNumber) { in run() local
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGenTypes/
H A DMachineValueType.h261 SimpleValueType VT = EltTyTable[SimpleTy - FIRST_VALUETYPE]; in getVectorElementType() local
371 bool knownBitsGT(MVT VT) const { in knownBitsGT()
377 bool knownBitsGE(MVT VT) const { in knownBitsGE()
382 bool knownBitsLT(MVT VT) const { in knownBitsLT()
388 bool knownBitsLE(MVT VT) const { in knownBitsLE()
393 bool bitsGT(MVT VT) const { in bitsGT()
400 bool bitsGE(MVT VT) const { in bitsGE()
407 bool bitsLT(MVT VT) const { in bitsLT()
414 bool bitsLE(MVT VT) const { in bitsLE()
440 static MVT getVectorVT(MVT VT, unsigned NumElements) { in getVectorVT()
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/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DTargetLowering.h458 virtual bool shouldExpandGetActiveLaneMask(EVT VT, EVT OpVT) const { in shouldExpandGetActiveLaneMask()
469 virtual bool shouldExpandCttzElements(EVT VT) const { return true; } in shouldExpandCttzElements()
479 virtual bool shouldReassociateReduction(unsigned RedOpc, EVT VT) const { in shouldReassociateReduction()
501 getPreferredVectorAction(MVT VT) const { in getPreferredVectorAction()
543 virtual bool isIntDivCheap(EVT VT, AttributeList Attr) const { return false; } in isIntDivCheap()
546 virtual bool hasStandaloneRem(EVT VT) const { in hasStandaloneRem()
706 virtual bool isCtpopFast(EVT VT) const { in isCtpopFast()
712 virtual unsigned getCustomCtpopCost(EVT VT, ISD::CondCode Cond) const { in getCustomCtpopCost()
756 virtual bool convertSetCCLogicToBitwiseLogic(EVT VT) const { in convertSetCCLogicToBitwiseLogic()
765 MVT VT = MVT::getIntegerVT(NumBits); in hasFastEqualityCompare() local
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/freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyMachineFunctionInfo.cpp49 for (EVT VT : VTs) { in computeLegalValueVTs() local
128 for (auto VT : MFI.getParams()) in WebAssemblyFunctionInfo() local
130 for (auto VT : MFI.getResults()) in WebAssemblyFunctionInfo() local
159 for (auto VT : YamlMFI.Params) in initializeBaseYamlFields() local
161 for (auto VT : YamlMFI.Results) in initializeBaseYamlFields() local
H A DWebAssemblyMachineFunctionInfo.h81 void addParam(MVT VT) { Params.push_back(VT); } in addParam()
84 void addResult(MVT VT) { Results.push_back(VT); } in addResult()
93 void setLocal(size_t i, MVT VT) { Locals[i] = VT; } in setLocal()
94 void addLocal(MVT VT) { Locals.push_back(VT); } in addLocal()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DTargetLoweringBase.cpp103 RTLIB::Libcall RTLIB::getFPLibCall(EVT VT, in getFPLibCall()
447 MVT VT) { in getOUTLINE_ATOMIC()
488 RTLIB::Libcall RTLIB::getSYNC(unsigned Opc, MVT VT) { in getSYNC()
689 for (MVT VT : MVT::fp_valuetypes()) { in initActions() local
698 for (MVT VT : MVT::all_valuetypes()) { in initActions() local
1063 static unsigned getVectorTypeBreakdownMVT(MVT VT, MVT &IntermediateVT, in getVectorTypeBreakdownMVT()
1379 MVT VT = (MVT::SimpleValueType) i; in computeRegisterProperties() local
1518 EVT VT, EVT &IntermediateVT, in getVectorTypeBreakdown()
1648 EVT VT = ValueVTs[j]; in GetReturnInfo() local
1697 LLVMContext &Context, const DataLayout &DL, EVT VT, unsigned AddrSpace, in allowsMemoryAccessForAlignment()
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H A DCallingConvLower.cpp103 MVT VT = Outs[i].VT; in CheckReturn() local
117 MVT VT = Outs[i].VT; in AnalyzeReturn() local
165 MVT VT = Ins[i].VT; in AnalyzeCallResult() local
178 void CCState::AnalyzeCallResult(MVT VT, CCAssignFn Fn) { in AnalyzeCallResult()
193 static bool isValueTypeInRegForCC(CallingConv::ID CC, MVT VT) { in isValueTypeInRegForCC()
202 MVT VT, CCAssignFn Fn) { in getRemainingRegParmsForType()
H A DValueTypes.cpp39 EVT VT; in getExtendedIntegerVT() local
45 EVT EVT::getExtendedVectorVT(LLVMContext &Context, EVT VT, unsigned NumElements, in getExtendedVectorVT()
54 EVT EVT::getExtendedVectorVT(LLVMContext &Context, EVT VT, ElementCount EC) { in getExtendedVectorVT()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86InterleavedAccess.cpp229 static MVT scaleVectorType(MVT VT) { in scaleVectorType()
257 static void genShuffleBland(MVT VT, ArrayRef<int> Mask, in genShuffleBland()
287 static void reorderSubVector(MVT VT, SmallVectorImpl<Value *> &TransposedMatrix, in reorderSubVector()
327 MVT VT = MVT::v8i16; in interleave8bitStride4VF8() local
367 MVT VT = MVT::getVectorVT(MVT::i8, NumOfElm); in interleave8bitStride4() local
436 static void createShuffleStride(MVT VT, int Stride, in createShuffleStride()
450 static void setGroupSize(MVT VT, SmallVectorImpl<int> &SizeInfo) { in setGroupSize()
473 static void DecodePALIGNRMask(MVT VT, unsigned Imm, in DecodePALIGNRMask()
558 MVT VT = MVT::getVT(Shuffles[0]->getType()); in deinterleave8bitStride3() local
606 static void group2Shuffle(MVT VT, SmallVectorImpl<int> &Mask, in group2Shuffle()
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H A DX86FastISel.cpp290 bool X86FastISel::isTypeLegal(Type *Ty, MVT &VT, bool AllowI1) { in isTypeLegal()
316 bool X86FastISel::X86FastEmitLoad(MVT VT, X86AddressMode &AM, in X86FastEmitLoad()
479 bool X86FastISel::X86FastEmitStore(EVT VT, unsigned ValReg, X86AddressMode &AM, in X86FastEmitStore()
652 bool X86FastISel::X86FastEmitStore(EVT VT, const Value *Val, in X86FastEmitStore()
1151 MVT VT; in X86SelectStore() local
1339 MVT VT; in X86SelectLoad() local
1358 static unsigned X86ChooseCmpOpcode(EVT VT, const X86Subtarget *Subtarget) { in X86ChooseCmpOpcode()
1385 static unsigned X86ChooseCmpImmediateOpcode(EVT VT, const ConstantInt *RHSC) { in X86ChooseCmpImmediateOpcode()
1403 bool X86FastISel::X86FastEmitCompare(const Value *Op0, const Value *Op1, EVT VT, in X86FastEmitCompare()
1439 MVT VT; in X86SelectCmp() local
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/freebsd/contrib/llvm-project/llvm/lib/Transforms/Instrumentation/
H A DNumericalStabilitySanitizer.cpp231 static Type *typeFromFTValueType(FTValueType VT, LLVMContext &Context) { in typeFromFTValueType()
246 static const char *typeNameFromFTValueType(FTValueType VT) { in typeNameFromFTValueType()
268 for (int VT = 0; VT < kNumValueTypes; ++VT) { in MappingConfig() local
312 if (const auto VT = ftValueTypeFromType(FT)) in getExtendedFPType() local
340 if (const auto VT = ftValueTypeFromType(FT)) in getMemoryExtentsOrDie() local
612 const FTValueType VT = static_cast<FTValueType>(I); in NumericalStabilitySanitizer() local
716 Type *VT = Arg.getType(); in createShadowArguments() local
815 Type *VT = Arg->getType(); in populateShadowStack() local
848 if (const auto VT = ftValueTypeFromType(Ty)) in emitCheckInternal() local
1049 Type *VT = Phi.getType(); in maybeCreateShadowPhi() local
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/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp165 auto addRegClassForRVV = [this](MVT VT) { in RISCVTargetLowering()
188 for (MVT VT : BoolVecVTs) in RISCVTargetLowering() local
190 for (MVT VT : IntVecVTs) { in RISCVTargetLowering() local
198 for (MVT VT : F16VecVTs) in RISCVTargetLowering() local
202 for (MVT VT : BF16VecVTs) in RISCVTargetLowering() local
206 for (MVT VT : F32VecVTs) in RISCVTargetLowering() local
210 for (MVT VT : F64VecVTs) in RISCVTargetLowering() local
214 auto addRegClassForFixedVectors = [this](MVT VT) { in RISCVTargetLowering()
220 for (MVT VT : MVT::integer_fixedlen_vector_valuetypes()) in RISCVTargetLowering() local
224 for (MVT VT : MVT::fp_fixedlen_vector_valuetypes()) in RISCVTargetLowering() local
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H A DRISCVISelDAGToDAG.cpp63 MVT VT = N->getSimpleValueType(0); in PreprocessISelDAG() local
80 MVT VT = N->getSimpleValueType(0); in PreprocessISelDAG() local
175 static SDValue selectImmSeq(SelectionDAG *CurDAG, const SDLoc &DL, const MVT VT, in selectImmSeq()
204 static SDValue selectImm(SelectionDAG *CurDAG, const SDLoc &DL, const MVT VT, in selectImm()
343 MVT VT = Node->getSimpleValueType(0); in selectVLSEG() local
382 MVT VT = Node->getSimpleValueType(0); in selectVLSEGFF() local
425 MVT VT = Node->getSimpleValueType(0); in selectVLXSEG() local
480 MVT VT = Node->getOperand(2)->getSimpleValueType(0); in selectVSSEG() local
510 MVT VT = Node->getOperand(2)->getSimpleValueType(0); in selectVSXSEG() local
605 MVT VT = Node->getSimpleValueType(0); in tryShrinkShlLogicImm() local
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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelDAGToDAG.cpp167 EVT VT = N->getValueType(0); in SelectExtractHigh() local
181 EVT VT = Op.getValueType(); in SelectRoundingVLShr() local
728 EVT VT = N.getValueType(); in SelectShiftedRegisterFromAnd() local
1469 EVT VT = N->getValueType(0); in SelectTable() local
1581 EVT VT = LD->getMemoryVT(); in tryIndexedLoad() local
1681 EVT VT = N->getValueType(0); in SelectLoad() local
1710 EVT VT = N->getValueType(0); in SelectPostLoad() local
1774 static unsigned SelectOpcodeFromVT(EVT VT, ArrayRef<unsigned> Opcodes) { in SelectOpcodeFromVT()
1833 EVT VT = N->getValueType(0); in SelectPExtPair() local
1847 EVT VT = N->getValueType(0); in SelectWhilePair() local
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H A DAArch64ISelLowering.cpp172 static inline EVT getPackedSVEVectorVT(EVT VT) { in getPackedSVEVectorVT()
212 static inline EVT getPromotedVTForPredicate(EVT VT) { in getPromotedVTForPredicate()
234 static inline bool isPackedVectorType(EVT VT, SelectionDAG &DAG) { in isPackedVectorType()
453 for (MVT VT : MVT::integer_fixedlen_vector_valuetypes()) in AArch64TargetLowering() local
457 for (MVT VT : MVT::fp_fixedlen_vector_valuetypes()) in AArch64TargetLowering() local
633 for (MVT VT : MVT::fixedlen_vector_valuetypes()) { in AArch64TargetLowering() local
685 for (MVT VT : MVT::fixedlen_vector_valuetypes()) { in AArch64TargetLowering() local
1028 for (MVT VT : MVT::fp_valuetypes()) { in AArch64TargetLowering() local
1035 for (MVT VT : MVT::integer_valuetypes()) in AArch64TargetLowering() local
1323 for (MVT VT : MVT::fixedlen_vector_valuetypes()) { in AArch64TargetLowering() local
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/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUISelLowering.cpp40 EVT AMDGPUTargetLowering::getEquivalentMemType(LLVMContext &Ctx, EVT VT) { in getEquivalentMemType()
183 for (MVT VT : MVT::integer_valuetypes()) in AMDGPUTargetLowering() local
187 for (MVT VT : MVT::integer_valuetypes()) { in AMDGPUTargetLowering() local
199 for (MVT VT : MVT::integer_fixedlen_vector_valuetypes()) in AMDGPUTargetLowering() local
461 for (MVT VT : ScalarIntVTs) { in AMDGPUTargetLowering() local
507 for (MVT VT : VectorIntTypes) { in AMDGPUTargetLowering() local
528 for (MVT VT : FloatVectorTypes) { in AMDGPUTargetLowering() local
703 static bool opMustUseVOP3Encoding(const SDNode *N, MVT VT) { in opMustUseVOP3Encoding()
764 MVT VT = N->getValueType(0).getScalarType().getSimpleVT(); in allUsesHaveSourceMods() local
782 EVT AMDGPUTargetLowering::getTypeForExtReturn(LLVMContext &Context, EVT VT, in getTypeForExtReturn()
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/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/
H A DLoongArchISelDAGToDAG.cpp47 MVT VT = Node->getSimpleValueType(0); in INITIALIZE_PASS() local
209 MVT VT = Addr.getSimpleValueType(); in SelectAddrConstant() local
275 EVT VT = N.getValueType(); in selectShiftMask() local
302 MVT VT = N.getSimpleValueType(); in selectSExti32() local
319 MVT VT = N.getSimpleValueType(); in selectZExti32() local
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMFastISel.cpp391 unsigned ARMFastISel::ARMMoveToFPReg(MVT VT, unsigned SrcReg) { in ARMMoveToFPReg()
401 unsigned ARMFastISel::ARMMoveToIntReg(MVT VT, unsigned SrcReg) { in ARMMoveToIntReg()
414 unsigned ARMFastISel::ARMMaterializeFP(const ConstantFP *CFP, MVT VT) { in ARMMaterializeFP()
453 unsigned ARMFastISel::ARMMaterializeInt(const Constant *C, MVT VT) { in ARMMaterializeInt()
522 unsigned ARMFastISel::ARMMaterializeGV(const GlobalValue *GV, MVT VT) { in ARMMaterializeGV()
629 MVT VT = CEVT.getSimpleVT(); in fastMaterializeConstant() local
647 MVT VT; in fastMaterializeAlloca() local
671 bool ARMFastISel::isTypeLegal(Type *Ty, MVT &VT) { in isTypeLegal()
683 bool ARMFastISel::isLoadTypeLegal(Type *Ty, MVT &VT) { in isLoadTypeLegal()
800 void ARMFastISel::ARMSimplifyAddress(Address &Addr, MVT VT, bool useAM3) { in ARMSimplifyAddress()
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/freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/AsmParser/
H A DWebAssemblyAsmTypeCheck.cpp159 for (auto VT : llvm::reverse(LastSig.Returns)) { in checkEnd() local
174 for (auto VT : llvm::reverse(Sig.Params)) in checkSig() local
416 auto VT = WebAssembly::regClassToValType(Op.RegClass); in typeCheck() local
425 auto VT = WebAssembly::regClassToValType(Op.RegClass); in typeCheck() local

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