458   virtual bool shouldExpandGetActiveLaneMask(EVT VT, EVT OpVT) const {  in shouldExpandGetActiveLaneMask()
469   virtual bool shouldExpandCttzElements(EVT VT) const { return true; }  in shouldExpandCttzElements()
479   virtual bool shouldReassociateReduction(unsigned RedOpc, EVT VT) const {  in shouldReassociateReduction()
501   getPreferredVectorAction(MVT VT) const {  in getPreferredVectorAction()
543   virtual bool isIntDivCheap(EVT VT, AttributeList Attr) const { return false; }  in isIntDivCheap()
546   virtual bool hasStandaloneRem(EVT VT) const {  in hasStandaloneRem()
706   virtual bool isCtpopFast(EVT VT) const {  in isCtpopFast()
712   virtual unsigned getCustomCtpopCost(EVT VT, ISD::CondCode Cond) const {  in getCustomCtpopCost()
756   virtual bool convertSetCCLogicToBitwiseLogic(EVT VT) const {  in convertSetCCLogicToBitwiseLogic()
765     MVT VT = MVT::getIntegerVT(NumBits);  in hasFastEqualityCompare()  local
894       EVT VT, unsigned ShiftOpc, bool MayTransformRotate,  in preferedOpcodeForCmpEqPiecesOfOperand()
905   virtual bool preferIncOfAddToSubOfNot(EVT VT) const {  in preferIncOfAddToSubOfNot()
912   virtual bool preferABDSToABSWithNSW(EVT VT) const {  in preferABDSToABSWithNSW()
923   virtual bool preferSextInRegOfTruncate(EVT TruncVT, EVT VT, EVT ExtVT) const {  in preferSextInRegOfTruncate()
958   virtual bool enableAggressiveFMAFusion(EVT VT) const { return false; }  in enableAggressiveFMAFusion()
1048   virtual const TargetRegisterClass *getRepRegClassFor(MVT VT) const {  in getRepRegClassFor()
1055   virtual uint8_t getRepRegClassCostFor(MVT VT) const {  in getRepRegClassCostFor()
1077   bool isTypeLegal(EVT VT) const {  in isTypeLegal()
1094     LegalizeTypeAction getTypeAction(MVT VT) const {  in getTypeAction()
1098     void setTypeAction(MVT VT, LegalizeTypeAction Action) {  in setTypeAction()
1127   LegalizeTypeAction getTypeAction(LLVMContext &Context, EVT VT) const {  in getTypeAction()
1130   LegalizeTypeAction getTypeAction(MVT VT) const {  in getTypeAction()
1140   virtual EVT getTypeToTransformTo(LLVMContext &Context, EVT VT) const {  in getTypeToTransformTo()
1148   EVT getTypeToExpandTo(LLVMContext &Context, EVT VT) const {  in getTypeToExpandTo()
1180       LLVMContext &Context, CallingConv::ID CC, EVT VT, EVT &IntermediateVT,  in getVectorTypeBreakdownForCallingConv()
1254   LegalizeAction getOperationAction(unsigned Op, EVT VT) const {  in getOperationAction()
1267   virtual bool isSupportedFixedPointOperation(unsigned Op, EVT VT,  in isSupportedFixedPointOperation()
1276   LegalizeAction getFixedPointOperationAction(unsigned Op, EVT VT,  in getFixedPointOperationAction()
1305   LegalizeAction getStrictFPOperationAction(unsigned Op, EVT VT) const {  in getStrictFPOperationAction()
1364   bool isOperationCustom(unsigned Op, EVT VT) const {  in isOperationCustom()
1426   bool isOperationExpand(unsigned Op, EVT VT) const {  in isOperationExpand()
1431   bool isOperationLegal(unsigned Op, EVT VT) const {  in isOperationLegal()
1521   LegalizeAction getIndexedLoadAction(unsigned IdxMode, MVT VT) const {  in getIndexedLoadAction()
1526   bool isIndexedLoadLegal(unsigned IdxMode, EVT VT) const {  in isIndexedLoadLegal()
1535   LegalizeAction getIndexedStoreAction(unsigned IdxMode, MVT VT) const {  in getIndexedStoreAction()
1540   bool isIndexedStoreLegal(unsigned IdxMode, EVT VT) const {  in isIndexedStoreLegal()
1549   LegalizeAction getIndexedMaskedLoadAction(unsigned IdxMode, MVT VT) const {  in getIndexedMaskedLoadAction()
1554   bool isIndexedMaskedLoadLegal(unsigned IdxMode, EVT VT) const {  in isIndexedMaskedLoadLegal()
1563   LegalizeAction getIndexedMaskedStoreAction(unsigned IdxMode, MVT VT) const {  in getIndexedMaskedStoreAction()
1568   bool isIndexedMaskedStoreLegal(unsigned IdxMode, EVT VT) const {  in isIndexedMaskedStoreLegal()
1576   virtual bool shouldExtendGSIndex(EVT VT, EVT &EltTy) const { return false; }  in shouldExtendGSIndex()
1600   getCondCodeAction(ISD::CondCode CC, MVT VT) const {  in getCondCodeAction()
1613   bool isCondCodeLegal(ISD::CondCode CC, MVT VT) const {  in isCondCodeLegal()
1619   bool isCondCodeLegalOrCustom(ISD::CondCode CC, MVT VT) const {  in isCondCodeLegalOrCustom()
1626   MVT getTypeToPromoteTo(unsigned Op, MVT VT) const {  in getTypeToPromoteTo()
1711   MVT getRegisterType(MVT VT) const {  in getRegisterType()
1717   MVT getRegisterType(LLVMContext &Context, EVT VT) const {  in getRegisterType()
1771                                             CallingConv::ID CC, EVT VT) const {  in getRegisterTypeForCallingConv()
1780                                                  EVT VT) const {  in getNumRegistersForCallingConv()
1815   bool isPaddedAtMostSignificantBitsWhenStored(EVT VT) const {  in isPaddedAtMostSignificantBitsWhenStored()
1822   bool hasBigEndianPartOrdering(EVT VT, const DataLayout &DL) const {  in hasBigEndianPartOrdering()
2379                                                EVT VT) const {  in shouldNormalizeToSelectSequence()
2391   virtual bool isProfitableToCombineMinNumMaxNum(EVT VT) const { return true; }  in isProfitableToCombineMinNumMaxNum()
2396   virtual bool convertSelectOfConstantsToMath(EVT VT) const {  in convertSelectOfConstantsToMath()
2406                                       EVT VT, SDValue C) const {  in decomposeMulByConstant()
2519   void addRegisterClass(MVT VT, const TargetRegisterClass *RC) {  in addRegisterClass()
2536   void setOperationAction(unsigned Op, MVT VT, LegalizeAction Action) {  in setOperationAction()
2540   void setOperationAction(ArrayRef<unsigned> Ops, MVT VT,  in setOperationAction()
2547     for (auto VT : VTs)  in setOperationAction()  local
2609   void setIndexedLoadAction(ArrayRef<unsigned> IdxModes, MVT VT,  in setIndexedLoadAction()
2617     for (auto VT : VTs)  in setIndexedLoadAction()  local
2626   void setIndexedStoreAction(ArrayRef<unsigned> IdxModes, MVT VT,  in setIndexedStoreAction()
2634     for (auto VT : VTs)  in setIndexedStoreAction()  local
2643   void setIndexedMaskedLoadAction(unsigned IdxMode, MVT VT,  in setIndexedMaskedLoadAction()
2653   void setIndexedMaskedStoreAction(unsigned IdxMode, MVT VT,  in setIndexedMaskedStoreAction()
2660   void setCondCodeAction(ArrayRef<ISD::CondCode> CCs, MVT VT,  in setCondCodeAction()
2676     for (auto VT : VTs)  in setCondCodeAction()  local
3017     EVT VT = getValueType(DL, Ext->getType());  in isExtLoad()  local
3207   virtual bool isFNegFree(EVT VT) const {  in isFNegFree()
3214   virtual bool isFAbsFree(EVT VT) const {  in isFAbsFree()
3285   virtual bool generateFMAsInMachineCombiner(EVT VT,  in generateFMAsInMachineCombiner()
3301                                                     EVT VT) const {  in shouldFoldSelectWithIdentityConstant()
3334   virtual bool isExtractVecEltCheap(EVT VT, unsigned Index) const {  in isExtractVecEltCheap()
3342   virtual bool shouldFormOverflowOp(unsigned Opcode, EVT VT,  in shouldFormOverflowOp()
3372   virtual bool shouldAvoidTransformToShift(EVT VT, unsigned Amount) const {  in shouldAvoidTransformToShift()
3378   virtual bool shouldFoldSelectWithSingleBitTest(EVT VT,  in shouldFoldSelectWithSingleBitTest()
3390   virtual bool shouldConvertFpToSat(unsigned Op, EVT FPVT, EVT VT) const {  in shouldConvertFpToSat()
3650   void setIndexedModeAction(unsigned IdxMode, MVT VT, unsigned Shift,  in setIndexedModeAction()
3659   LegalizeAction getIndexedModeAction(unsigned IdxMode, MVT VT,  in getIndexedModeAction()
4346   virtual bool isTypeDesirableForOp(unsigned /*Opc*/, EVT VT) const {  in isTypeDesirableForOp()
4810   virtual EVT getTypeForExtReturn(LLVMContext &Context, EVT VT,  in getTypeForExtReturn()