Lines Matching defs:VT
167 EVT VT = N->getValueType(0); in SelectExtractHigh() local
181 EVT VT = Op.getValueType(); in SelectRoundingVLShr() local
728 EVT VT = N.getValueType(); in SelectShiftedRegisterFromAnd() local
1469 EVT VT = N->getValueType(0); in SelectTable() local
1581 EVT VT = LD->getMemoryVT(); in tryIndexedLoad() local
1681 EVT VT = N->getValueType(0); in SelectLoad() local
1710 EVT VT = N->getValueType(0); in SelectPostLoad() local
1774 static unsigned SelectOpcodeFromVT(EVT VT, ArrayRef<unsigned> Opcodes) { in SelectOpcodeFromVT()
1833 EVT VT = N->getValueType(0); in SelectPExtPair() local
1847 EVT VT = N->getValueType(0); in SelectWhilePair() local
1863 EVT VT = N->getValueType(0); in SelectCVTIntrinsic() local
1884 EVT VT = N->getValueType(0); in SelectDestructiveMultiIntrinsic() local
1920 EVT VT = N->getValueType(0); in SelectPredicatedLoad() local
1955 EVT VT = N->getValueType(0); in SelectContiguousMultiVectorLoad() local
2002 EVT VT = Node->getValueType(0); in SelectMultiVectorLuti() local
2021 EVT VT = N->getValueType(0); in SelectClamp() local
2090 EVT VT = N->getValueType(0); in SelectMultiVectorMove() local
2126 EVT VT = N->getValueType(0); in SelectMultiVectorMoveZ() local
2143 EVT VT = N->getValueType(0); in SelectUnaryMultiIntrinsic() local
2171 EVT VT = N->getOperand(2)->getValueType(0); in SelectStore() local
2233 EVT VT = N->getOperand(2)->getValueType(0); in SelectPostStore() local
2261 EVT VT = V64Reg.getValueType(); in operator ()() local
2277 EVT VT = V128Reg.getValueType(); in NarrowVector() local
2289 EVT VT = N->getValueType(0); in SelectLoadLane() local
2327 EVT VT = N->getValueType(0); in SelectPostLoadLane() local
2381 EVT VT = N->getOperand(2)->getValueType(0); in SelectStoreLane() local
2409 EVT VT = N->getOperand(2)->getValueType(0); in SelectPostStoreLane() local
2447 EVT VT = N->getValueType(0); in isBitfieldExtractOpFromAnd() local
2538 EVT VT = N->getValueType(0); in isBitfieldExtractOpFromSExtInReg() local
2612 EVT VT = N->getValueType(0); in isBitfieldExtractOpFromShr() local
2676 EVT VT = N->getValueType(0); in tryBitfieldExtractOpFromSExt() local
2744 EVT VT = N->getValueType(0); in tryBitfieldExtractOp() local
2771 unsigned NumberOfIgnoredHighBits, EVT VT) { in isBitfieldDstMask()
3008 EVT VT = Op.getValueType(); in getLeftShift() local
3051 EVT VT = Op.getValueType(); in isBitfieldPositioningOp() local
3085 EVT VT = Op.getValueType(); in isBitfieldPositioningOpFromAnd() local
3207 EVT VT = Op.getValueType(); in isBitfieldPositioningOpFromShl() local
3232 static bool isShiftedMask(uint64_t Mask, EVT VT) { in isShiftedMask()
3244 EVT VT = N->getValueType(0); in tryBitfieldInsertOpFromOrAndImm() local
3336 EVT VT = Dst.getValueType(); in isWorthFoldingIntoOrrWithShift() local
3407 EVT VT = N->getValueType(0); in tryOrrWithShift() local
3508 EVT VT = N->getValueType(0); in tryBitfieldInsertOpFromOr() local
3578 EVT VT = OrOpd1Val.getValueType(); in tryBitfieldInsertOpFromOr() local
3704 EVT VT = N->getValueType(0); in tryBitfieldInsertInZeroOp() local
3730 EVT VT = N->getValueType(0); in tryShiftAmountMod() local
4127 bool AArch64DAGToDAGISel::SelectSVEAddSubImm(SDValue N, MVT VT, SDValue &Imm, in SelectSVEAddSubImm()
4167 bool AArch64DAGToDAGISel::SelectSVEAddSubSSatImm(SDValue N, MVT VT, in SelectSVEAddSubSSatImm()
4217 bool AArch64DAGToDAGISel::SelectSVECpyDupImm(SDValue N, MVT VT, SDValue &Imm, in SelectSVECpyDupImm()
4269 bool AArch64DAGToDAGISel::SelectSVEArithImm(SDValue N, MVT VT, SDValue &Imm) { in SelectSVEArithImm()
4297 bool AArch64DAGToDAGISel::SelectSVELogicalImm(SDValue N, MVT VT, SDValue &Imm, in SelectSVELogicalImm()
4428 EVT VT = N->getValueType(0); in trySelectCastFixedLengthToScalableVector() local
4457 EVT VT = N->getValueType(0); in trySelectCastScalableToFixedLengthVector() local
4483 EVT VT = N->getValueType(0); in trySelectXAR() local
4575 EVT VT = Node->getValueType(0); in Select() local
7334 EVT VT = N.getValueType(); in SelectAnyPredicate() local