1 /* SPDX-License-Identifier: GPL-2.0 */ 2 3 #ifndef __SH_SCI_COMMON_H__ 4 #define __SH_SCI_COMMON_H__ 5 6 #include <linux/serial_core.h> 7 8 /* Private port IDs */ 9 enum SCI_PORT_TYPE { 10 SCI_PORT_RSCI = BIT(7) | 0, 11 }; 12 13 enum SCI_CLKS { 14 SCI_FCK, /* Functional Clock */ 15 SCI_SCK, /* Optional External Clock */ 16 SCI_BRG_INT, /* Optional BRG Internal Clock Source */ 17 SCI_SCIF_CLK, /* Optional BRG External Clock Source */ 18 SCI_NUM_CLKS 19 }; 20 21 /* Offsets into the sci_port->irqs array */ 22 enum { 23 SCIx_ERI_IRQ, 24 SCIx_RXI_IRQ, 25 SCIx_TXI_IRQ, 26 SCIx_BRI_IRQ, 27 SCIx_DRI_IRQ, 28 SCIx_TEI_IRQ, 29 SCIx_NR_IRQS, 30 31 SCIx_MUX_IRQ = SCIx_NR_IRQS, /* special case */ 32 }; 33 34 /* Bit x set means sampling rate x + 1 is supported */ 35 #define SCI_SR(x) BIT((x) - 1) 36 #define SCI_SR_RANGE(x, y) GENMASK((y) - 1, (x) - 1) 37 38 void sci_release_port(struct uart_port *port); 39 int sci_request_port(struct uart_port *port); 40 void sci_config_port(struct uart_port *port, int flags); 41 int sci_verify_port(struct uart_port *port, struct serial_struct *ser); 42 void sci_pm(struct uart_port *port, unsigned int state, 43 unsigned int oldstate); 44 45 struct plat_sci_reg { 46 u8 offset; 47 u8 size; 48 }; 49 50 struct sci_port_params_bits { 51 unsigned int rxtx_enable; 52 unsigned int te_clear; 53 unsigned int poll_sent_bits; 54 }; 55 56 struct sci_common_regs { 57 unsigned int status; 58 unsigned int control; 59 }; 60 61 /* The actual number of needed registers. This is used by sci only */ 62 #define SCI_NR_REGS 20 63 64 struct sci_port_params { 65 const struct plat_sci_reg regs[SCI_NR_REGS]; 66 const struct sci_common_regs *common_regs; 67 const struct sci_port_params_bits *param_bits; 68 unsigned int fifosize; 69 unsigned int overrun_reg; 70 unsigned int overrun_mask; 71 unsigned int sampling_rate_mask; 72 unsigned int error_mask; 73 unsigned int error_clear; 74 }; 75 76 struct sci_port_ops { 77 u32 (*read_reg)(struct uart_port *port, int reg); 78 void (*write_reg)(struct uart_port *port, int reg, int value); 79 void (*clear_SCxSR)(struct uart_port *port, unsigned int mask); 80 81 void (*transmit_chars)(struct uart_port *port); 82 void (*receive_chars)(struct uart_port *port); 83 84 void (*poll_put_char)(struct uart_port *port, unsigned char c); 85 86 int (*set_rtrg)(struct uart_port *port, int rx_trig); 87 int (*rtrg_enabled)(struct uart_port *port); 88 89 void (*shutdown_complete)(struct uart_port *port); 90 91 void (*prepare_console_write)(struct uart_port *port, u32 ctrl); 92 void (*console_save)(struct uart_port *port); 93 void (*console_restore)(struct uart_port *port); 94 size_t (*suspend_regs_size)(void); 95 }; 96 97 struct sci_of_data { 98 const struct sci_port_params *params; 99 const struct uart_ops *uart_ops; 100 const struct sci_port_ops *ops; 101 unsigned short regtype; 102 unsigned short type; 103 }; 104 105 struct sci_port { 106 struct uart_port port; 107 108 /* Platform configuration */ 109 const struct sci_port_params *params; 110 const struct plat_sci_port *cfg; 111 112 unsigned int sampling_rate_mask; 113 resource_size_t reg_size; 114 struct mctrl_gpios *gpios; 115 116 /* Clocks */ 117 struct clk *clks[SCI_NUM_CLKS]; 118 unsigned long clk_rates[SCI_NUM_CLKS]; 119 120 int irqs[SCIx_NR_IRQS]; 121 char *irqstr[SCIx_NR_IRQS]; 122 123 struct dma_chan *chan_tx; 124 struct dma_chan *chan_rx; 125 126 struct reset_control *rstc; 127 struct sci_suspend_regs *suspend_regs; 128 129 #ifdef CONFIG_SERIAL_SH_SCI_DMA 130 struct dma_chan *chan_tx_saved; 131 struct dma_chan *chan_rx_saved; 132 dma_cookie_t cookie_tx; 133 dma_cookie_t cookie_rx[2]; 134 dma_cookie_t active_rx; 135 dma_addr_t tx_dma_addr; 136 unsigned int tx_dma_len; 137 struct scatterlist sg_rx[2]; 138 void *rx_buf[2]; 139 size_t buf_len_rx; 140 struct work_struct work_tx; 141 struct hrtimer rx_timer; 142 unsigned int rx_timeout; /* microseconds */ 143 #endif 144 unsigned int rx_frame; 145 int rx_trigger; 146 struct timer_list rx_fifo_timer; 147 int rx_fifo_timeout; 148 u16 hscif_tot; 149 150 u8 type; 151 u8 regtype; 152 153 const struct sci_port_ops *ops; 154 155 bool has_rtscts; 156 bool autorts; 157 bool tx_occurred; 158 }; 159 160 #define to_sci_port(uart) container_of((uart), struct sci_port, port) 161 162 void sci_port_disable(struct sci_port *sci_port); 163 void sci_port_enable(struct sci_port *sci_port); 164 165 int sci_startup(struct uart_port *port); 166 void sci_shutdown(struct uart_port *port); 167 168 #define min_sr(_port) ffs((_port)->sampling_rate_mask) 169 #define max_sr(_port) fls((_port)->sampling_rate_mask) 170 171 #ifdef CONFIG_SERIAL_SH_SCI_EARLYCON 172 int __init scix_early_console_setup(struct earlycon_device *device, const struct sci_of_data *data); 173 #endif 174 175 #endif /* __SH_SCI_COMMON_H__ */ 176