1# SPDX-License-Identifier: GPL-2.0-only 2# 3# For a description of the syntax of this configuration file, 4# see Documentation/kbuild/kconfig-language.rst. 5# 6 7config 64BIT 8 bool 9 10config 32BIT 11 bool 12 13config RISCV 14 def_bool y 15 select ACPI_GENERIC_GSI if ACPI 16 select ACPI_MCFG if (ACPI && PCI) 17 select ACPI_PPTT if ACPI 18 select ACPI_REDUCED_HARDWARE_ONLY if ACPI 19 select ACPI_RIMT if ACPI 20 select ACPI_SPCR_TABLE if ACPI 21 select ARCH_DMA_DEFAULT_COHERENT 22 select ARCH_ENABLE_HUGEPAGE_MIGRATION if HUGETLB_PAGE && MIGRATION 23 select ARCH_ENABLE_MEMORY_HOTPLUG if SPARSEMEM_VMEMMAP 24 select ARCH_ENABLE_MEMORY_HOTREMOVE if MEMORY_HOTPLUG 25 select ARCH_ENABLE_SPLIT_PMD_PTLOCK if PGTABLE_LEVELS > 2 26 select ARCH_ENABLE_THP_MIGRATION if TRANSPARENT_HUGEPAGE 27 select ARCH_HAS_BINFMT_FLAT 28 select ARCH_HAS_CURRENT_STACK_POINTER 29 select ARCH_HAS_DEBUG_VIRTUAL if MMU 30 select ARCH_HAS_DEBUG_VM_PGTABLE 31 select ARCH_HAS_DEBUG_WX 32 select ARCH_HAS_ELF_CORE_EFLAGS if BINFMT_ELF && ELF_CORE 33 select ARCH_HAS_FAST_MULTIPLIER 34 select ARCH_HAS_FORTIFY_SOURCE 35 select ARCH_HAS_GCOV_PROFILE_ALL 36 select ARCH_HAS_GIGANTIC_PAGE 37 select ARCH_HAS_HW_PTE_YOUNG 38 select ARCH_HAS_KCOV 39 select ARCH_HAS_KERNEL_FPU_SUPPORT if 64BIT && FPU 40 select ARCH_HAS_MEMBARRIER_CALLBACKS 41 select ARCH_HAS_MEMBARRIER_SYNC_CORE 42 select ARCH_HAS_MMIOWB 43 select ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE 44 select ARCH_HAS_PMEM_API 45 select ARCH_HAS_PREEMPT_LAZY 46 select ARCH_HAS_PREPARE_SYNC_CORE_CMD 47 select ARCH_HAS_PTDUMP if MMU 48 select ARCH_HAS_PTE_SPECIAL 49 select ARCH_HAS_SET_DIRECT_MAP if MMU 50 select ARCH_HAS_SET_MEMORY if MMU 51 select ARCH_HAS_STRICT_KERNEL_RWX if MMU && !XIP_KERNEL 52 select ARCH_HAS_STRICT_MODULE_RWX if MMU && !XIP_KERNEL 53 select ARCH_HAS_SYNC_CORE_BEFORE_USERMODE 54 select ARCH_HAS_SYSCALL_WRAPPER 55 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST 56 select ARCH_HAS_UBSAN 57 select ARCH_HAS_VDSO_ARCH_DATA if HAVE_GENERIC_VDSO 58 select ARCH_HAVE_NMI_SAFE_CMPXCHG 59 select ARCH_KEEP_MEMBLOCK if ACPI 60 select ARCH_MHP_MEMMAP_ON_MEMORY_ENABLE if 64BIT && MMU 61 select ARCH_OPTIONAL_KERNEL_RWX if ARCH_HAS_STRICT_KERNEL_RWX 62 select ARCH_OPTIONAL_KERNEL_RWX_DEFAULT 63 select ARCH_STACKWALK 64 select ARCH_SUPPORTS_ATOMIC_RMW 65 # clang >= 17: https://github.com/llvm/llvm-project/commit/62fa708ceb027713b386c7e0efda994f8bdc27e2 66 select ARCH_SUPPORTS_CFI if (!CC_IS_CLANG || CLANG_VERSION >= 170000) 67 select ARCH_SUPPORTS_DEBUG_PAGEALLOC if MMU 68 select ARCH_SUPPORTS_HUGE_PFNMAP if TRANSPARENT_HUGEPAGE 69 select ARCH_SUPPORTS_HUGETLBFS if MMU 70 select ARCH_SUPPORTS_LTO_CLANG if CMODEL_MEDANY 71 select ARCH_SUPPORTS_LTO_CLANG_THIN 72 select ARCH_SUPPORTS_MSEAL_SYSTEM_MAPPINGS if 64BIT && MMU 73 select ARCH_SUPPORTS_PAGE_TABLE_CHECK if MMU 74 select ARCH_SUPPORTS_PER_VMA_LOCK if MMU 75 select ARCH_SUPPORTS_RT 76 select ARCH_SUPPORTS_SHADOW_CALL_STACK if HAVE_SHADOW_CALL_STACK 77 select ARCH_SUPPORTS_SCHED_MC if SMP 78 select ARCH_USE_CMPXCHG_LOCKREF if 64BIT 79 select ARCH_USE_MEMTEST 80 select ARCH_USE_QUEUED_RWLOCKS 81 select ARCH_USE_SYM_ANNOTATIONS 82 select ARCH_USES_CFI_TRAPS if CFI 83 select ARCH_WANT_BATCHED_UNMAP_TLB_FLUSH if MMU 84 select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU 85 select ARCH_WANT_FRAME_POINTERS 86 select ARCH_WANT_GENERAL_HUGETLB if !RISCV_ISA_SVNAPOT 87 select ARCH_WANT_HUGE_PMD_SHARE if 64BIT 88 select ARCH_WANT_LD_ORPHAN_WARN if !XIP_KERNEL 89 select ARCH_WANT_OPTIMIZE_DAX_VMEMMAP 90 select ARCH_WANT_OPTIMIZE_HUGETLB_VMEMMAP 91 select ARCH_WANTS_NO_INSTR 92 select ARCH_WANTS_THP_SWAP if HAVE_ARCH_TRANSPARENT_HUGEPAGE 93 select ARCH_WEAK_RELEASE_ACQUIRE if ARCH_USE_QUEUED_SPINLOCKS 94 select BINFMT_FLAT_NO_DATA_START_OFFSET if !MMU 95 select BUILDTIME_TABLE_SORT if MMU 96 select CLINT_TIMER if RISCV_M_MODE 97 select CLONE_BACKWARDS 98 select COMMON_CLK 99 select CPU_NO_EFFICIENT_FFS if !RISCV_ISA_ZBB 100 select CPU_PM if CPU_IDLE || HIBERNATION || SUSPEND 101 select DYNAMIC_FTRACE if FUNCTION_TRACER 102 select EDAC_SUPPORT 103 select FRAME_POINTER if PERF_EVENTS || (FUNCTION_TRACER && !DYNAMIC_FTRACE) 104 select FTRACE_MCOUNT_USE_PATCHABLE_FUNCTION_ENTRY if DYNAMIC_FTRACE 105 select FUNCTION_ALIGNMENT_8B if DYNAMIC_FTRACE_WITH_CALL_OPS 106 select GENERIC_ARCH_TOPOLOGY 107 select GENERIC_ATOMIC64 if !64BIT 108 select GENERIC_CLOCKEVENTS_BROADCAST if SMP 109 select GENERIC_CPU_DEVICES 110 select GENERIC_CPU_VULNERABILITIES 111 select GENERIC_EARLY_IOREMAP 112 select GENERIC_ENTRY 113 select GENERIC_GETTIMEOFDAY if HAVE_GENERIC_VDSO && 64BIT 114 select GENERIC_IDLE_POLL_SETUP 115 select GENERIC_IOREMAP if MMU 116 select GENERIC_IRQ_IPI if SMP 117 select GENERIC_IRQ_IPI_MUX if SMP 118 select GENERIC_IRQ_MULTI_HANDLER 119 select GENERIC_IRQ_SHOW 120 select GENERIC_IRQ_SHOW_LEVEL 121 select GENERIC_LIB_DEVMEM_IS_ALLOWED 122 select GENERIC_PENDING_IRQ if SMP 123 select GENERIC_PCI_IOMAP 124 select GENERIC_SCHED_CLOCK 125 select GENERIC_SMP_IDLE_THREAD 126 select GENERIC_TIME_VSYSCALL if GENERIC_GETTIMEOFDAY 127 select HARDIRQS_SW_RESEND 128 select HAS_IOPORT if MMU 129 select HAVE_ALIGNED_STRUCT_PAGE 130 select HAVE_ARCH_AUDITSYSCALL 131 select HAVE_ARCH_HUGE_VMALLOC if HAVE_ARCH_HUGE_VMAP 132 select HAVE_ARCH_HUGE_VMAP if MMU && 64BIT 133 select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL 134 select HAVE_ARCH_JUMP_LABEL_RELATIVE if !XIP_KERNEL 135 select HAVE_ARCH_KASAN if MMU && 64BIT 136 select HAVE_ARCH_KASAN_VMALLOC if MMU && 64BIT 137 select HAVE_ARCH_KFENCE if MMU && 64BIT 138 select HAVE_ARCH_KSTACK_ERASE 139 select HAVE_ARCH_KGDB if !XIP_KERNEL 140 select HAVE_ARCH_KGDB_QXFER_PKT 141 select HAVE_ARCH_MMAP_RND_BITS if MMU 142 select HAVE_ARCH_MMAP_RND_COMPAT_BITS if COMPAT 143 select HAVE_ARCH_RANDOMIZE_KSTACK_OFFSET 144 select HAVE_ARCH_SECCOMP_FILTER 145 select HAVE_ARCH_SOFT_DIRTY if 64BIT && MMU && RISCV_ISA_SVRSW60T59B 146 select HAVE_ARCH_THREAD_STRUCT_WHITELIST 147 select HAVE_ARCH_TRACEHOOK 148 select HAVE_ARCH_TRANSPARENT_HUGEPAGE if 64BIT && MMU 149 select HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD if 64BIT && MMU 150 select HAVE_ARCH_USERFAULTFD_MINOR if 64BIT && USERFAULTFD 151 select HAVE_ARCH_USERFAULTFD_WP if 64BIT && MMU && USERFAULTFD && RISCV_ISA_SVRSW60T59B 152 select HAVE_ARCH_VMAP_STACK if MMU && 64BIT 153 select HAVE_ASM_MODVERSIONS 154 select HAVE_CONTEXT_TRACKING_USER 155 select HAVE_DEBUG_KMEMLEAK 156 select HAVE_DMA_CONTIGUOUS if MMU 157 select HAVE_DYNAMIC_FTRACE if !XIP_KERNEL && MMU && (CLANG_SUPPORTS_DYNAMIC_FTRACE || GCC_SUPPORTS_DYNAMIC_FTRACE) 158 select FUNCTION_ALIGNMENT_4B if HAVE_DYNAMIC_FTRACE && RISCV_ISA_C 159 select HAVE_DYNAMIC_FTRACE_WITH_DIRECT_CALLS if HAVE_DYNAMIC_FTRACE_WITH_CALL_OPS 160 select HAVE_DYNAMIC_FTRACE_WITH_CALL_OPS if (DYNAMIC_FTRACE_WITH_ARGS && !CFI) 161 select HAVE_DYNAMIC_FTRACE_WITH_ARGS if HAVE_DYNAMIC_FTRACE 162 select HAVE_FTRACE_GRAPH_FUNC 163 select HAVE_FUNCTION_GRAPH_TRACER if HAVE_DYNAMIC_FTRACE_WITH_ARGS 164 select HAVE_FUNCTION_GRAPH_FREGS 165 select HAVE_FUNCTION_TRACER if !XIP_KERNEL && HAVE_DYNAMIC_FTRACE 166 select HAVE_EBPF_JIT if MMU 167 select HAVE_GENERIC_TIF_BITS 168 select HAVE_GUP_FAST if MMU 169 select HAVE_FUNCTION_ARG_ACCESS_API 170 select HAVE_FUNCTION_ERROR_INJECTION 171 select HAVE_GCC_PLUGINS 172 select HAVE_GENERIC_VDSO if MMU 173 select HAVE_IRQ_TIME_ACCOUNTING 174 select HAVE_KERNEL_BZIP2 if !XIP_KERNEL && !EFI_ZBOOT 175 select HAVE_KERNEL_GZIP if !XIP_KERNEL && !EFI_ZBOOT 176 select HAVE_KERNEL_LZ4 if !XIP_KERNEL && !EFI_ZBOOT 177 select HAVE_KERNEL_LZMA if !XIP_KERNEL && !EFI_ZBOOT 178 select HAVE_KERNEL_LZO if !XIP_KERNEL && !EFI_ZBOOT 179 select HAVE_KERNEL_UNCOMPRESSED if !XIP_KERNEL && !EFI_ZBOOT 180 select HAVE_KERNEL_ZSTD if !XIP_KERNEL && !EFI_ZBOOT 181 select HAVE_KERNEL_XZ if !XIP_KERNEL && !EFI_ZBOOT 182 select HAVE_KPROBES if !XIP_KERNEL 183 select HAVE_KRETPROBES if !XIP_KERNEL 184 # https://github.com/ClangBuiltLinux/linux/issues/1881 185 select HAVE_LD_DEAD_CODE_DATA_ELIMINATION if !LD_IS_LLD 186 select HAVE_MOVE_PMD 187 select HAVE_MOVE_PUD 188 select HAVE_PAGE_SIZE_4KB 189 select HAVE_PCI 190 select HAVE_PERF_EVENTS 191 select HAVE_PERF_REGS 192 select HAVE_PERF_USER_STACK_DUMP 193 select HAVE_POSIX_CPU_TIMERS_TASK_WORK 194 select HAVE_PREEMPT_DYNAMIC_KEY if !XIP_KERNEL 195 select HAVE_REGS_AND_STACK_ACCESS_API 196 select HAVE_RETHOOK if !XIP_KERNEL 197 select HAVE_RSEQ 198 select HAVE_RUST if RUSTC_SUPPORTS_RISCV && CC_IS_CLANG 199 select HAVE_SAMPLE_FTRACE_DIRECT 200 select HAVE_SAMPLE_FTRACE_DIRECT_MULTI 201 select HAVE_STACKPROTECTOR 202 select HAVE_SYSCALL_TRACEPOINTS 203 select HOTPLUG_PARALLEL if HOTPLUG_CPU 204 select IRQ_DOMAIN 205 select IRQ_FORCED_THREADING 206 select KASAN_VMALLOC if KASAN 207 select LOCK_MM_AND_FIND_VMA 208 select MMU_GATHER_RCU_TABLE_FREE if SMP && MMU 209 select MODULES_USE_ELF_RELA if MODULES 210 select OF 211 select OF_EARLY_FLATTREE 212 select OF_IRQ 213 select PCI_DOMAINS_GENERIC if PCI 214 select PCI_ECAM if (ACPI && PCI) 215 select PCI_MSI if PCI 216 select RELOCATABLE if !MMU && !PHYS_RAM_BASE_FIXED 217 select RISCV_ALTERNATIVE if !XIP_KERNEL 218 select RISCV_APLIC 219 select RISCV_IMSIC 220 select RISCV_INTC 221 select RISCV_TIMER if RISCV_SBI 222 select SIFIVE_PLIC 223 select SPARSE_IRQ 224 select SYSCTL_EXCEPTION_TRACE 225 select THREAD_INFO_IN_TASK 226 select TRACE_IRQFLAGS_SUPPORT 227 select UACCESS_MEMCPY if !MMU 228 select VDSO_GETRANDOM if HAVE_GENERIC_VDSO && 64BIT 229 select USER_STACKTRACE_SUPPORT 230 select ZONE_DMA32 if 64BIT 231 232config RUSTC_SUPPORTS_RISCV 233 def_bool y 234 depends on 64BIT 235 # Shadow call stack requires rustc version 1.82+ due to use of the 236 # -Zsanitizer=shadow-call-stack flag. 237 depends on !SHADOW_CALL_STACK || RUSTC_VERSION >= 108200 238 239config CLANG_SUPPORTS_DYNAMIC_FTRACE 240 def_bool CC_IS_CLANG 241 # https://github.com/ClangBuiltLinux/linux/issues/1817 242 depends on AS_IS_GNU || (AS_IS_LLVM && (LD_IS_LLD || LD_VERSION >= 23600)) 243 244config GCC_SUPPORTS_DYNAMIC_FTRACE 245 def_bool CC_IS_GCC 246 depends on $(cc-option,-fpatchable-function-entry=8) 247 depends on CC_HAS_MIN_FUNCTION_ALIGNMENT || !RISCV_ISA_C 248 249config HAVE_SHADOW_CALL_STACK 250 def_bool $(cc-option,-fsanitize=shadow-call-stack) 251 # https://github.com/riscv-non-isa/riscv-elf-psabi-doc/commit/a484e843e6eeb51f0cb7b8819e50da6d2444d769 252 depends on $(ld-option,--no-relax-gp) 253 254# https://github.com/llvm/llvm-project/commit/bbc0f99f3bc96f1db16f649fc21dd18e5b0918f6 255config ARCH_HAS_BROKEN_DWARF5 256 def_bool y 257 # https://github.com/llvm/llvm-project/commit/1df5ea29b43690b6622db2cad7b745607ca4de6a 258 depends on AS_IS_LLVM && AS_VERSION < 180000 259 # https://github.com/llvm/llvm-project/commit/7ffabb61a5569444b5ac9322e22e5471cc5e4a77 260 depends on LD_IS_LLD && LLD_VERSION < 180000 261 262config ARCH_MMAP_RND_BITS_MIN 263 default 18 if 64BIT 264 default 8 265 266config ARCH_MMAP_RND_COMPAT_BITS_MIN 267 default 8 268 269# max bits determined by the following formula: 270# VA_BITS - PAGE_SHIFT - 3 271config ARCH_MMAP_RND_BITS_MAX 272 default 24 if 64BIT # SV39 based 273 default 17 274 275config ARCH_MMAP_RND_COMPAT_BITS_MAX 276 default 17 277 278# set if we run in machine mode, cleared if we run in supervisor mode 279config RISCV_M_MODE 280 bool "Build a kernel that runs in machine mode" 281 depends on !MMU 282 default y 283 help 284 Select this option if you want to run the kernel in M-mode, 285 without the assistance of any other firmware. 286 287# set if we are running in S-mode and can use SBI calls 288config RISCV_SBI 289 bool 290 depends on !RISCV_M_MODE 291 default y 292 293config MMU 294 bool "MMU-based Paged Memory Management Support" 295 default y 296 help 297 Select if you want MMU-based virtualised addressing space 298 support by paged memory management. If unsure, say 'Y'. 299 300config KASAN_SHADOW_OFFSET 301 hex 302 depends on KASAN_GENERIC 303 default 0xdfffffff00000000 if 64BIT 304 default 0xffffffff if 32BIT 305 306config ARCH_FLATMEM_ENABLE 307 def_bool !NUMA 308 309config ARCH_SPARSEMEM_ENABLE 310 def_bool y 311 depends on MMU 312 select SPARSEMEM_STATIC if 32BIT && SPARSEMEM 313 select SPARSEMEM_VMEMMAP_ENABLE if 64BIT 314 315config ARCH_SELECT_MEMORY_MODEL 316 def_bool ARCH_SPARSEMEM_ENABLE 317 318config ARCH_SUPPORTS_UPROBES 319 def_bool y 320 321config STACKTRACE_SUPPORT 322 def_bool y 323 324config GENERIC_BUG 325 def_bool y 326 depends on BUG 327 select GENERIC_BUG_RELATIVE_POINTERS if 64BIT 328 329config GENERIC_BUG_RELATIVE_POINTERS 330 bool 331 332config GENERIC_CALIBRATE_DELAY 333 def_bool y 334 335config GENERIC_CSUM 336 def_bool y 337 338config GENERIC_HWEIGHT 339 def_bool y 340 341config FIX_EARLYCON_MEM 342 def_bool MMU 343 344config ILLEGAL_POINTER_VALUE 345 hex 346 default 0 if 32BIT 347 default 0xdead000000000000 if 64BIT 348 349config PGTABLE_LEVELS 350 int 351 default 5 if 64BIT 352 default 2 353 354config LOCKDEP_SUPPORT 355 def_bool y 356 357config RISCV_DMA_NONCOHERENT 358 bool 359 select ARCH_HAS_DMA_PREP_COHERENT 360 select ARCH_HAS_SETUP_DMA_OPS 361 select ARCH_HAS_SYNC_DMA_FOR_CPU 362 select ARCH_HAS_SYNC_DMA_FOR_DEVICE 363 select DMA_BOUNCE_UNALIGNED_KMALLOC if SWIOTLB 364 365config RISCV_NONSTANDARD_CACHE_OPS 366 bool 367 help 368 This enables function pointer support for non-standard noncoherent 369 systems to handle cache management. 370 371config AS_HAS_INSN 372 def_bool $(as-instr,.insn 0x100000f) 373 374config AS_HAS_OPTION_ARCH 375 # https://github.com/llvm/llvm-project/commit/9e8ed3403c191ab9c4903e8eeb8f732ff8a43cb4 376 def_bool y 377 depends on $(as-instr, .option arch$(comma) +m) 378 379source "arch/riscv/Kconfig.socs" 380source "arch/riscv/Kconfig.errata" 381 382menu "Platform type" 383 384config NONPORTABLE 385 bool "Allow configurations that result in non-portable kernels" 386 help 387 RISC-V kernel binaries are compatible between all known systems 388 whenever possible, but there are some use cases that can only be 389 satisfied by configurations that result in kernel binaries that are 390 not portable between systems. 391 392 Selecting N does not guarantee kernels will be portable to all known 393 systems. Selecting any of the options guarded by NONPORTABLE will 394 result in kernel binaries that are unlikely to be portable between 395 systems. 396 397 If unsure, say N. 398 399choice 400 prompt "Base ISA" 401 default ARCH_RV64I 402 help 403 This selects the base ISA that this kernel will target and must match 404 the target platform. 405 406config ARCH_RV32I 407 bool "RV32I" 408 depends on NONPORTABLE 409 select 32BIT 410 select GENERIC_LIB_ASHLDI3 411 select GENERIC_LIB_ASHRDI3 412 select GENERIC_LIB_LSHRDI3 413 select GENERIC_LIB_UCMPDI2 414 415config ARCH_RV64I 416 bool "RV64I" 417 select 64BIT 418 select ARCH_SUPPORTS_INT128 if CC_HAS_INT128 419 select SWIOTLB if MMU 420 421endchoice 422 423# We must be able to map all physical memory into the kernel, but the compiler 424# is still a bit more efficient when generating code if it's setup in a manner 425# such that it can only map 2GiB of memory. 426choice 427 prompt "Kernel Code Model" 428 default CMODEL_MEDLOW if 32BIT 429 default CMODEL_MEDANY if 64BIT 430 431 config CMODEL_MEDLOW 432 bool "medium low code model" 433 config CMODEL_MEDANY 434 bool "medium any code model" 435endchoice 436 437config MODULE_SECTIONS 438 bool 439 select HAVE_MOD_ARCH_SPECIFIC 440 441config SMP 442 bool "Symmetric Multi-Processing" 443 help 444 This enables support for systems with more than one CPU. If 445 you say N here, the kernel will run on single and 446 multiprocessor machines, but will use only one CPU of a 447 multiprocessor machine. If you say Y here, the kernel will run 448 on many, but not all, single processor machines. On a single 449 processor machine, the kernel will run faster if you say N 450 here. 451 452 If you don't know what to do here, say N. 453 454config NR_CPUS 455 int "Maximum number of CPUs (2-512)" 456 depends on SMP 457 range 2 512 if !RISCV_SBI_V01 458 range 2 32 if RISCV_SBI_V01 && 32BIT 459 range 2 64 if RISCV_SBI_V01 && 64BIT 460 default "32" if 32BIT 461 default "64" if 64BIT 462 463config HOTPLUG_CPU 464 bool "Support for hot-pluggable CPUs" 465 depends on SMP 466 select GENERIC_IRQ_MIGRATION 467 help 468 469 Say Y here to experiment with turning CPUs off and on. CPUs 470 can be controlled through /sys/devices/system/cpu. 471 472 Say N if you want to disable CPU hotplug. 473 474choice 475 prompt "CPU Tuning" 476 default TUNE_GENERIC 477 478config TUNE_GENERIC 479 bool "generic" 480 481endchoice 482 483# Common NUMA Features 484config NUMA 485 bool "NUMA Memory Allocation and Scheduler Support" 486 depends on SMP && MMU 487 select ARCH_SUPPORTS_NUMA_BALANCING 488 select GENERIC_ARCH_NUMA 489 select HAVE_SETUP_PER_CPU_AREA 490 select NEED_PER_CPU_EMBED_FIRST_CHUNK 491 select NEED_PER_CPU_PAGE_FIRST_CHUNK 492 select OF_NUMA 493 select USE_PERCPU_NUMA_NODE_ID 494 help 495 Enable NUMA (Non-Uniform Memory Access) support. 496 497 The kernel will try to allocate memory used by a CPU on the 498 local memory of the CPU and add some more NUMA awareness to the kernel. 499 500config NODES_SHIFT 501 int "Maximum NUMA Nodes (as a power of 2)" 502 range 1 10 503 default "2" 504 depends on NUMA 505 help 506 Specify the maximum number of NUMA Nodes available on the target 507 system. Increases memory reserved to accommodate various tables. 508 509choice 510 prompt "RISC-V spinlock type" 511 default RISCV_COMBO_SPINLOCKS 512 513config RISCV_TICKET_SPINLOCKS 514 bool "Using ticket spinlock" 515 516config RISCV_QUEUED_SPINLOCKS 517 bool "Using queued spinlock" 518 depends on SMP && MMU && NONPORTABLE 519 select ARCH_USE_QUEUED_SPINLOCKS 520 help 521 The queued spinlock implementation requires the forward progress 522 guarantee of cmpxchg()/xchg() atomic operations: CAS with Zabha or 523 LR/SC with Ziccrse provide such guarantee. 524 525 Select this if and only if Zabha or Ziccrse is available on your 526 platform, RISCV_QUEUED_SPINLOCKS must not be selected for platforms 527 without one of those extensions. 528 529 If unsure, select RISCV_COMBO_SPINLOCKS, which will use qspinlocks 530 when supported and otherwise ticket spinlocks. 531 532config RISCV_COMBO_SPINLOCKS 533 bool "Using combo spinlock" 534 depends on SMP && MMU 535 select ARCH_USE_QUEUED_SPINLOCKS 536 help 537 Embed both queued spinlock and ticket lock so that the spinlock 538 implementation can be chosen at runtime. 539 540endchoice 541 542config RISCV_ALTERNATIVE 543 bool 544 depends on !XIP_KERNEL 545 help 546 This Kconfig allows the kernel to automatically patch the 547 erratum or cpufeature required by the execution platform at run 548 time. The code patching overhead is minimal, as it's only done 549 once at boot and once on each module load. 550 551config RISCV_ALTERNATIVE_EARLY 552 bool 553 depends on RISCV_ALTERNATIVE 554 help 555 Allows early patching of the kernel for special errata 556 557config RISCV_ISA_C 558 bool "Emit compressed instructions when building Linux" 559 default y 560 help 561 Adds "C" to the ISA subsets that the toolchain is allowed to emit 562 when building Linux, which results in compressed instructions in the 563 Linux binary. This option produces a kernel that will not run on 564 systems that do not support compressed instructions. 565 566 If you don't know what to do here, say Y. 567 568config RISCV_ISA_SUPM 569 bool "Supm extension for userspace pointer masking" 570 depends on 64BIT 571 default y 572 help 573 Add support for pointer masking in userspace (Supm) when the 574 underlying hardware extension (Smnpm or Ssnpm) is detected at boot. 575 576 If this option is disabled, userspace will be unable to use 577 the prctl(PR_{SET,GET}_TAGGED_ADDR_CTRL) API. 578 579config RISCV_ISA_SVNAPOT 580 bool "Svnapot extension support for supervisor mode NAPOT pages" 581 depends on 64BIT && MMU 582 depends on RISCV_ALTERNATIVE 583 default y 584 help 585 Enable support for the Svnapot ISA-extension when it is detected 586 at boot. 587 588 The Svnapot extension is used to mark contiguous PTEs as a range 589 of contiguous virtual-to-physical translations for a naturally 590 aligned power-of-2 (NAPOT) granularity larger than the base 4KB page 591 size. When HUGETLBFS is also selected this option unconditionally 592 allocates some memory for each NAPOT page size supported by the kernel. 593 When optimizing for low memory consumption and for platforms without 594 the Svnapot extension, it may be better to say N here. 595 596 If you don't know what to do here, say Y. 597 598config RISCV_ISA_SVPBMT 599 bool "Svpbmt extension support for supervisor mode page-based memory types" 600 depends on 64BIT && MMU 601 depends on RISCV_ALTERNATIVE 602 default y 603 help 604 Add support for the Svpbmt ISA-extension (Supervisor-mode: 605 page-based memory types) in the kernel when it is detected at boot. 606 607 The memory type for a page contains a combination of attributes 608 that indicate the cacheability, idempotency, and ordering 609 properties for access to that page. 610 611 The Svpbmt extension is only available on 64-bit cpus. 612 613 If you don't know what to do here, say Y. 614 615config TOOLCHAIN_HAS_V 616 bool 617 default y 618 depends on !64BIT || $(cc-option,-mabi=lp64 -march=rv64imv) 619 depends on !32BIT || $(cc-option,-mabi=ilp32 -march=rv32imv) 620 depends on LD_IS_LLD || LD_VERSION >= 23800 621 depends on AS_HAS_OPTION_ARCH 622 623config RISCV_ISA_V 624 bool "Vector extension support" 625 depends on TOOLCHAIN_HAS_V 626 depends on FPU 627 select DYNAMIC_SIGFRAME 628 default y 629 help 630 Add support for the Vector extension when it is detected at boot. 631 When this option is disabled, neither the kernel nor userspace may 632 use vector procedures. 633 634 If you don't know what to do here, say Y. 635 636config RISCV_ISA_V_DEFAULT_ENABLE 637 bool "Enable userspace Vector by default" 638 depends on RISCV_ISA_V 639 default y 640 help 641 Say Y here if you want to enable Vector in userspace by default. 642 Otherwise, userspace has to make explicit prctl() call to enable 643 Vector, or enable it via the sysctl interface. 644 645 If you don't know what to do here, say Y. 646 647config RISCV_ISA_V_UCOPY_THRESHOLD 648 int "Threshold size for vectorized user copies" 649 depends on RISCV_ISA_V 650 default 768 651 help 652 Prefer using vectorized copy_to_user()/copy_from_user() when the 653 workload size exceeds this value. 654 655config RISCV_ISA_V_PREEMPTIVE 656 bool "Run kernel-mode Vector with kernel preemption" 657 depends on PREEMPTION 658 depends on RISCV_ISA_V 659 default y 660 help 661 Usually, in-kernel SIMD routines are run with preemption disabled. 662 Functions which invoke long running SIMD thus must yield the core's 663 vector unit to prevent blocking other tasks for too long. 664 665 This config allows the kernel to run SIMD without explicitly disabling 666 preemption. Enabling this config will result in higher memory consumption 667 due to the allocation of per-task's kernel Vector context. 668 669config RISCV_ISA_ZAWRS 670 bool "Zawrs extension support for more efficient busy waiting" 671 depends on RISCV_ALTERNATIVE 672 default y 673 help 674 The Zawrs extension defines instructions to be used in polling loops 675 which allow a hart to enter a low-power state or to trap to the 676 hypervisor while waiting on a store to a memory location. Enable the 677 use of these instructions in the kernel when the Zawrs extension is 678 detected at boot. 679 680config TOOLCHAIN_HAS_ZABHA 681 bool 682 default y 683 depends on !64BIT || $(cc-option,-mabi=lp64 -march=rv64ima_zabha) 684 depends on !32BIT || $(cc-option,-mabi=ilp32 -march=rv32ima_zabha) 685 depends on AS_HAS_OPTION_ARCH 686 687config RISCV_ISA_ZABHA 688 bool "Zabha extension support for atomic byte/halfword operations" 689 depends on TOOLCHAIN_HAS_ZABHA 690 depends on RISCV_ALTERNATIVE 691 default y 692 help 693 Enable the use of the Zabha ISA-extension to implement kernel 694 byte/halfword atomic memory operations when it is detected at boot. 695 696 If you don't know what to do here, say Y. 697 698config TOOLCHAIN_HAS_ZACAS 699 bool 700 default y 701 depends on !64BIT || $(cc-option,-mabi=lp64 -march=rv64ima_zacas) 702 depends on !32BIT || $(cc-option,-mabi=ilp32 -march=rv32ima_zacas) 703 depends on AS_HAS_OPTION_ARCH 704 705config RISCV_ISA_ZACAS 706 bool "Zacas extension support for atomic CAS" 707 depends on RISCV_ALTERNATIVE 708 default y 709 help 710 Enable the use of the Zacas ISA-extension to implement kernel atomic 711 cmpxchg operations when it is detected at boot. 712 713 If you don't know what to do here, say Y. 714 715config TOOLCHAIN_HAS_ZBB 716 bool 717 default y 718 depends on !64BIT || $(cc-option,-mabi=lp64 -march=rv64ima_zbb) 719 depends on !32BIT || $(cc-option,-mabi=ilp32 -march=rv32ima_zbb) 720 depends on LD_IS_LLD || LD_VERSION >= 23900 721 depends on AS_HAS_OPTION_ARCH 722 723# This symbol indicates that the toolchain supports all v1.0 vector crypto 724# extensions, including Zvk*, Zvbb, and Zvbc. LLVM added all of these at once. 725# binutils added all except Zvkb, then added Zvkb. So we just check for Zvkb. 726config TOOLCHAIN_HAS_VECTOR_CRYPTO 727 def_bool $(as-instr, .option arch$(comma) +v$(comma) +zvkb) 728 depends on AS_HAS_OPTION_ARCH 729 730config TOOLCHAIN_HAS_ZBA 731 bool 732 default y 733 depends on !64BIT || $(cc-option,-mabi=lp64 -march=rv64ima_zba) 734 depends on !32BIT || $(cc-option,-mabi=ilp32 -march=rv32ima_zba) 735 depends on LD_IS_LLD || LD_VERSION >= 23900 736 depends on AS_HAS_OPTION_ARCH 737 738config RISCV_ISA_ZBA 739 bool "Zba extension support for bit manipulation instructions" 740 default y 741 help 742 Add support for enabling optimisations in the kernel when the Zba 743 extension is detected at boot. 744 745 The Zba extension provides instructions to accelerate the generation 746 of addresses that index into arrays of basic data types. 747 748 If you don't know what to do here, say Y. 749 750config RISCV_ISA_ZBB 751 bool "Zbb extension support for bit manipulation instructions" 752 depends on RISCV_ALTERNATIVE 753 default y 754 help 755 Add support for enabling optimisations in the kernel when the 756 Zbb extension is detected at boot. Some optimisations may 757 additionally depend on toolchain support for Zbb. 758 759 The Zbb extension provides instructions to accelerate a number 760 of bit-specific operations (count bit population, sign extending, 761 bitrotation, etc). 762 763 If you don't know what to do here, say Y. 764 765config TOOLCHAIN_HAS_ZBC 766 bool 767 default y 768 depends on !64BIT || $(cc-option,-mabi=lp64 -march=rv64ima_zbc) 769 depends on !32BIT || $(cc-option,-mabi=ilp32 -march=rv32ima_zbc) 770 depends on LD_IS_LLD || LD_VERSION >= 23900 771 depends on AS_HAS_OPTION_ARCH 772 773config RISCV_ISA_ZBC 774 bool "Zbc extension support for carry-less multiplication instructions" 775 depends on TOOLCHAIN_HAS_ZBC 776 depends on MMU 777 depends on RISCV_ALTERNATIVE 778 default y 779 help 780 Adds support to dynamically detect the presence of the Zbc 781 extension (carry-less multiplication) and enable its usage. 782 783 The Zbc extension could accelerate CRC (cyclic redundancy check) 784 calculations. 785 786 If you don't know what to do here, say Y. 787 788config TOOLCHAIN_HAS_ZBKB 789 bool 790 default y 791 depends on !64BIT || $(cc-option,-mabi=lp64 -march=rv64ima_zbkb) 792 depends on !32BIT || $(cc-option,-mabi=ilp32 -march=rv32ima_zbkb) 793 depends on LD_IS_LLD || LD_VERSION >= 23900 794 depends on AS_HAS_OPTION_ARCH 795 796config RISCV_ISA_ZBKB 797 bool "Zbkb extension support for bit manipulation instructions" 798 depends on TOOLCHAIN_HAS_ZBKB 799 depends on RISCV_ALTERNATIVE 800 default y 801 help 802 Adds support to dynamically detect the presence of the ZBKB 803 extension (bit manipulation for cryptography) and enable its usage. 804 805 The Zbkb extension provides instructions to accelerate a number 806 of common cryptography operations (pack, zip, etc). 807 808 If you don't know what to do here, say Y. 809 810config RISCV_ISA_ZICBOM 811 bool "Zicbom extension support for non-coherent DMA operation" 812 depends on MMU 813 depends on RISCV_ALTERNATIVE 814 default y 815 select RISCV_DMA_NONCOHERENT 816 select DMA_DIRECT_REMAP 817 help 818 Add support for the Zicbom extension (Cache Block Management 819 Operations) and enable its use in the kernel when it is detected 820 at boot. 821 822 The Zicbom extension can be used to handle for example 823 non-coherent DMA support on devices that need it. 824 825 If you don't know what to do here, say Y. 826 827config RISCV_ISA_ZICBOZ 828 bool "Zicboz extension support for faster zeroing of memory" 829 depends on RISCV_ALTERNATIVE 830 default y 831 help 832 Enable the use of the Zicboz extension (cbo.zero instruction) 833 in the kernel when it is detected at boot. 834 835 The Zicboz extension is used for faster zeroing of memory. 836 837 If you don't know what to do here, say Y. 838 839config RISCV_ISA_ZICBOP 840 bool "Zicbop extension support for cache block prefetch" 841 depends on MMU 842 depends on RISCV_ALTERNATIVE 843 default y 844 help 845 Adds support to dynamically detect the presence of the ZICBOP 846 extension (Cache Block Prefetch Operations) and enable its 847 usage. 848 849 The Zicbop extension can be used to prefetch cache blocks for 850 read/write fetch. 851 852 If you don't know what to do here, say Y. 853 854config RISCV_ISA_SVRSW60T59B 855 bool "Svrsw60t59b extension support for using PTE bits 60 and 59" 856 depends on MMU && 64BIT 857 depends on RISCV_ALTERNATIVE 858 default y 859 help 860 Adds support to dynamically detect the presence of the Svrsw60t59b 861 extension and enable its usage. 862 863 The Svrsw60t59b extension allows to free the PTE reserved bits 60 864 and 59 for software to use. 865 866 If you don't know what to do here, say Y. 867 868config TOOLCHAIN_NEEDS_EXPLICIT_ZICSR_ZIFENCEI 869 def_bool y 870 # https://sourceware.org/git/?p=binutils-gdb.git;a=commit;h=aed44286efa8ae8717a77d94b51ac3614e2ca6dc 871 # https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=98416dbb0a62579d4a7a4a76bab51b5b52fec2cd 872 depends on AS_IS_GNU && AS_VERSION >= 23600 873 help 874 Binutils-2.38 and GCC-12.1.0 bumped the default ISA spec to the newer 875 20191213 version, which moves some instructions from the I extension to 876 the Zicsr and Zifencei extensions. This requires explicitly specifying 877 Zicsr and Zifencei when binutils >= 2.38 or GCC >= 12.1.0. Zicsr 878 and Zifencei are supported in binutils from version 2.36 onwards. 879 To make life easier, and avoid forcing toolchains that default to a 880 newer ISA spec to version 2.2, relax the check to binutils >= 2.36. 881 For clang < 17 or GCC < 11.3.0, for which this is not possible or need 882 special treatment, this is dealt with in TOOLCHAIN_NEEDS_OLD_ISA_SPEC. 883 884config TOOLCHAIN_NEEDS_OLD_ISA_SPEC 885 def_bool y 886 depends on TOOLCHAIN_NEEDS_EXPLICIT_ZICSR_ZIFENCEI 887 # https://github.com/llvm/llvm-project/commit/22e199e6afb1263c943c0c0d4498694e15bf8a16 888 # https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=d29f5d6ab513c52fd872f532c492e35ae9fd6671 889 depends on (CC_IS_CLANG && CLANG_VERSION < 170000) || (CC_IS_GCC && GCC_VERSION < 110300) 890 help 891 Certain versions of clang and GCC do not support zicsr and zifencei via 892 -march. This option causes an older ISA spec compatible with these older 893 versions of clang and GCC to be passed to GAS, which has the same result 894 as passing zicsr and zifencei to -march. 895 896config FPU 897 bool "FPU support" 898 default y 899 help 900 Add support for floating point operations when an FPU is detected at 901 boot. When this option is disabled, neither the kernel nor userspace 902 may use the floating point unit. 903 904 If you don't know what to do here, say Y. 905 906config IRQ_STACKS 907 bool "Independent irq & softirq stacks" if EXPERT 908 default y 909 select HAVE_IRQ_EXIT_ON_IRQ_STACK 910 select HAVE_SOFTIRQ_ON_OWN_STACK 911 help 912 Add independent irq & softirq stacks for percpu to prevent kernel stack 913 overflows. We may save some memory footprint by disabling IRQ_STACKS. 914 915config THREAD_SIZE_ORDER 916 int "Kernel stack size (in power-of-two numbers of page size)" if VMAP_STACK && EXPERT 917 range 0 4 918 default 1 if 32BIT 919 default 2 920 help 921 Specify the Pages of thread stack size (from 4KB to 64KB), which also 922 affects irq stack size, which is equal to thread stack size. 923 924config RISCV_MISALIGNED 925 bool 926 help 927 Embed support for detecting and emulating misaligned 928 scalar or vector loads and stores. 929 930config RISCV_SCALAR_MISALIGNED 931 bool 932 select RISCV_MISALIGNED 933 select SYSCTL_ARCH_UNALIGN_ALLOW 934 help 935 Embed support for emulating misaligned loads and stores. 936 937config RISCV_VECTOR_MISALIGNED 938 bool 939 select RISCV_MISALIGNED 940 depends on RISCV_ISA_V 941 help 942 Enable detecting support for vector misaligned loads and stores. 943 944choice 945 prompt "Unaligned Accesses Support" 946 default RISCV_PROBE_UNALIGNED_ACCESS 947 help 948 This determines the level of support for unaligned accesses. This 949 information is used by the kernel to perform optimizations. It is also 950 exposed to user space via the hwprobe syscall. The hardware will be 951 probed at boot by default. 952 953config RISCV_PROBE_UNALIGNED_ACCESS 954 bool "Probe for hardware unaligned access support" 955 select RISCV_SCALAR_MISALIGNED 956 help 957 During boot, the kernel will run a series of tests to determine the 958 speed of unaligned accesses. This probing will dynamically determine 959 the speed of unaligned accesses on the underlying system. If unaligned 960 memory accesses trap into the kernel as they are not supported by the 961 system, the kernel will emulate the unaligned accesses to preserve the 962 UABI. 963 964config RISCV_EMULATED_UNALIGNED_ACCESS 965 bool "Emulate unaligned access where system support is missing" 966 select RISCV_SCALAR_MISALIGNED 967 help 968 If unaligned memory accesses trap into the kernel as they are not 969 supported by the system, the kernel will emulate the unaligned 970 accesses to preserve the UABI. When the underlying system does support 971 unaligned accesses, the unaligned accesses are assumed to be slow. 972 973config RISCV_SLOW_UNALIGNED_ACCESS 974 bool "Assume the system supports slow unaligned memory accesses" 975 depends on NONPORTABLE 976 help 977 Assume that the system supports slow unaligned memory accesses. The 978 kernel and userspace programs may not be able to run at all on systems 979 that do not support unaligned memory accesses. 980 981config RISCV_EFFICIENT_UNALIGNED_ACCESS 982 bool "Assume the system supports fast unaligned memory accesses" 983 depends on NONPORTABLE 984 select DCACHE_WORD_ACCESS if MMU 985 select HAVE_EFFICIENT_UNALIGNED_ACCESS 986 help 987 Assume that the system supports fast unaligned memory accesses. When 988 enabled, this option improves the performance of the kernel on such 989 systems. However, the kernel and userspace programs will run much more 990 slowly, or will not be able to run at all, on systems that do not 991 support efficient unaligned memory accesses. 992 993endchoice 994 995choice 996 prompt "Vector unaligned Accesses Support" 997 depends on RISCV_ISA_V 998 default RISCV_PROBE_VECTOR_UNALIGNED_ACCESS 999 help 1000 This determines the level of support for vector unaligned accesses. This 1001 information is used by the kernel to perform optimizations. It is also 1002 exposed to user space via the hwprobe syscall. The hardware will be 1003 probed at boot by default. 1004 1005config RISCV_PROBE_VECTOR_UNALIGNED_ACCESS 1006 bool "Probe speed of vector unaligned accesses" 1007 select RISCV_VECTOR_MISALIGNED 1008 depends on RISCV_ISA_V 1009 help 1010 During boot, the kernel will run a series of tests to determine the 1011 speed of vector unaligned accesses if they are supported. This probing 1012 will dynamically determine the speed of vector unaligned accesses on 1013 the underlying system if they are supported. 1014 1015config RISCV_SLOW_VECTOR_UNALIGNED_ACCESS 1016 bool "Assume the system supports slow vector unaligned memory accesses" 1017 depends on NONPORTABLE 1018 help 1019 Assume that the system supports slow vector unaligned memory accesses. The 1020 kernel and userspace programs may not be able to run at all on systems 1021 that do not support unaligned memory accesses. 1022 1023config RISCV_EFFICIENT_VECTOR_UNALIGNED_ACCESS 1024 bool "Assume the system supports fast vector unaligned memory accesses" 1025 depends on NONPORTABLE 1026 help 1027 Assume that the system supports fast vector unaligned memory accesses. When 1028 enabled, this option improves the performance of the kernel on such 1029 systems. However, the kernel and userspace programs will run much more 1030 slowly, or will not be able to run at all, on systems that do not 1031 support efficient unaligned memory accesses. 1032 1033endchoice 1034 1035source "arch/riscv/Kconfig.vendor" 1036 1037endmenu # "Platform type" 1038 1039menu "Kernel features" 1040 1041source "kernel/Kconfig.hz" 1042 1043config RISCV_SBI_V01 1044 bool "SBI v0.1 support" 1045 depends on RISCV_SBI 1046 help 1047 This config allows kernel to use SBI v0.1 APIs. This will be 1048 deprecated in future once legacy M-mode software are no longer in use. 1049 1050config RISCV_BOOT_SPINWAIT 1051 bool "Spinwait booting method" 1052 depends on SMP 1053 default y if RISCV_SBI_V01 || RISCV_M_MODE 1054 help 1055 This enables support for booting Linux via spinwait method. In the 1056 spinwait method, all cores randomly jump to Linux. One of the cores 1057 gets chosen via lottery and all other keep spinning on a percpu 1058 variable. This method cannot support CPU hotplug and sparse hartid 1059 scheme. It should be only enabled for M-mode Linux or platforms relying 1060 on older firmware without SBI HSM extension. All other platforms should 1061 rely on ordered booting via SBI HSM extension which gets chosen 1062 dynamically at runtime if the firmware supports it. 1063 1064 Since spinwait is incompatible with sparse hart IDs, it requires 1065 NR_CPUS be large enough to contain the physical hart ID of the first 1066 hart to enter Linux. 1067 1068 If unsure what to do here, say N. 1069 1070config ARCH_SUPPORTS_KEXEC 1071 def_bool y 1072 1073config ARCH_SELECTS_KEXEC 1074 def_bool y 1075 depends on KEXEC 1076 select HOTPLUG_CPU if SMP 1077 1078config ARCH_SUPPORTS_KEXEC_FILE 1079 def_bool 64BIT 1080 1081config ARCH_SELECTS_KEXEC_FILE 1082 def_bool y 1083 depends on KEXEC_FILE 1084 select HAVE_IMA_KEXEC if IMA 1085 select KEXEC_ELF 1086 1087config ARCH_SUPPORTS_KEXEC_PURGATORY 1088 def_bool ARCH_SUPPORTS_KEXEC_FILE 1089 1090config ARCH_SUPPORTS_CRASH_DUMP 1091 def_bool y 1092 1093config ARCH_DEFAULT_CRASH_DUMP 1094 def_bool y 1095 1096config ARCH_HAS_GENERIC_CRASHKERNEL_RESERVATION 1097 def_bool CRASH_RESERVE 1098 1099config COMPAT 1100 bool "Kernel support for 32-bit U-mode" 1101 default 64BIT 1102 depends on 64BIT && MMU 1103 help 1104 This option enables support for a 32-bit U-mode running under a 64-bit 1105 kernel at S-mode. riscv32-specific components such as system calls, 1106 the user helper functions (vdso), signal rt_frame functions and the 1107 ptrace interface are handled appropriately by the kernel. 1108 1109 If you want to execute 32-bit userspace applications, say Y. 1110 1111config PARAVIRT 1112 bool "Enable paravirtualization code" 1113 depends on RISCV_SBI 1114 help 1115 This changes the kernel so it can modify itself when it is run 1116 under a hypervisor, potentially improving performance significantly 1117 over full virtualization. 1118 1119config PARAVIRT_TIME_ACCOUNTING 1120 bool "Paravirtual steal time accounting" 1121 depends on PARAVIRT 1122 help 1123 Select this option to enable fine granularity task steal time 1124 accounting. Time spent executing other tasks in parallel with 1125 the current vCPU is discounted from the vCPU power. To account for 1126 that, there can be a small performance impact. 1127 1128 If in doubt, say N here. 1129 1130config RELOCATABLE 1131 bool "Build a relocatable kernel" 1132 depends on !XIP_KERNEL 1133 select MODULE_SECTIONS if MODULES 1134 select ARCH_VMLINUX_NEEDS_RELOCS 1135 help 1136 This builds a kernel as a Position Independent Executable (PIE), 1137 which retains all relocation metadata required to relocate the 1138 kernel binary at runtime to a different virtual address than the 1139 address it was linked at. 1140 Since RISCV uses the RELA relocation format, this requires a 1141 relocation pass at runtime even if the kernel is loaded at the 1142 same address it was linked at. 1143 1144 If unsure, say N. 1145 1146config RANDOMIZE_BASE 1147 bool "Randomize the address of the kernel image" 1148 select RELOCATABLE 1149 depends on MMU && 64BIT && !XIP_KERNEL 1150 help 1151 Randomizes the virtual address at which the kernel image is 1152 loaded, as a security feature that deters exploit attempts 1153 relying on knowledge of the location of kernel internals. 1154 1155 It is the bootloader's job to provide entropy, by passing a 1156 random u64 value in /chosen/kaslr-seed at kernel entry. 1157 1158 When booting via the UEFI stub, it will invoke the firmware's 1159 EFI_RNG_PROTOCOL implementation (if available) to supply entropy 1160 to the kernel proper. In addition, it will randomise the physical 1161 location of the kernel Image as well. 1162 1163 If unsure, say N. 1164 1165endmenu # "Kernel features" 1166 1167menu "Boot options" 1168 1169config CMDLINE 1170 string "Built-in kernel command line" 1171 help 1172 For most platforms, the arguments for the kernel's command line 1173 are provided at run-time, during boot. However, there are cases 1174 where either no arguments are being provided or the provided 1175 arguments are insufficient or even invalid. 1176 1177 When that occurs, it is possible to define a built-in command 1178 line here and choose how the kernel should use it later on. 1179 1180choice 1181 prompt "Built-in command line usage" 1182 depends on CMDLINE != "" 1183 default CMDLINE_FALLBACK 1184 help 1185 Choose how the kernel will handle the provided built-in command 1186 line. 1187 1188config CMDLINE_FALLBACK 1189 bool "Use bootloader kernel arguments if available" 1190 help 1191 Use the built-in command line as fallback in case we get nothing 1192 during boot. This is the default behaviour. 1193 1194config CMDLINE_EXTEND 1195 bool "Extend bootloader kernel arguments" 1196 help 1197 The built-in command line will be appended to the command- 1198 line arguments provided during boot. This is useful in 1199 cases where the provided arguments are insufficient and 1200 you don't want to or cannot modify them. 1201 1202config CMDLINE_FORCE 1203 bool "Always use the default kernel command string" 1204 help 1205 Always use the built-in command line, even if we get one during 1206 boot. This is useful in case you need to override the provided 1207 command line on systems where you don't have or want control 1208 over it. 1209 1210endchoice 1211 1212config EFI_STUB 1213 bool 1214 1215config EFI 1216 bool "UEFI runtime support" 1217 depends on OF && !XIP_KERNEL 1218 depends on MMU 1219 default y 1220 select ARCH_SUPPORTS_ACPI if 64BIT 1221 select EFI_GENERIC_STUB 1222 select EFI_PARAMS_FROM_FDT 1223 select EFI_RUNTIME_WRAPPERS 1224 select EFI_STUB 1225 select LIBFDT 1226 select RISCV_ISA_C 1227 select UCS2_STRING 1228 help 1229 This option provides support for runtime services provided 1230 by UEFI firmware (such as non-volatile variables, realtime 1231 clock, and platform reset). A UEFI stub is also provided to 1232 allow the kernel to be booted as an EFI application. This 1233 is only useful on systems that have UEFI firmware. 1234 1235config DMI 1236 bool "Enable support for SMBIOS (DMI) tables" 1237 depends on EFI 1238 default y 1239 help 1240 This enables SMBIOS/DMI feature for systems. 1241 1242 This option is only useful on systems that have UEFI firmware. 1243 However, even with this option, the resultant kernel should 1244 continue to boot on existing non-UEFI platforms. 1245 1246config CC_HAVE_STACKPROTECTOR_TLS 1247 def_bool $(cc-option,-mstack-protector-guard=tls -mstack-protector-guard-reg=tp -mstack-protector-guard-offset=0) 1248 1249config STACKPROTECTOR_PER_TASK 1250 def_bool y 1251 depends on !RANDSTRUCT 1252 depends on STACKPROTECTOR && CC_HAVE_STACKPROTECTOR_TLS 1253 1254config PHYS_RAM_BASE_FIXED 1255 bool "Explicitly specified physical RAM address" 1256 depends on NONPORTABLE 1257 default n 1258 1259config PHYS_RAM_BASE 1260 hex "Platform Physical RAM address" 1261 depends on PHYS_RAM_BASE_FIXED 1262 default "0x80000000" 1263 help 1264 This is the physical address of RAM in the system. It has to be 1265 explicitly specified to run early relocations of read-write data 1266 from flash to RAM. 1267 1268config XIP_KERNEL 1269 bool "Kernel Execute-In-Place from ROM" 1270 depends on MMU && SPARSEMEM && NONPORTABLE 1271 # This prevents XIP from being enabled by all{yes,mod}config, which 1272 # fail to build since XIP doesn't support large kernels. 1273 depends on !COMPILE_TEST 1274 select PHYS_RAM_BASE_FIXED 1275 help 1276 Execute-In-Place allows the kernel to run from non-volatile storage 1277 directly addressable by the CPU, such as NOR flash. This saves RAM 1278 space since the text section of the kernel is not loaded from flash 1279 to RAM. Read-write sections, such as the data section and stack, 1280 are still copied to RAM. The XIP kernel is not compressed since 1281 it has to run directly from flash, so it will take more space to 1282 store it. The flash address used to link the kernel object files, 1283 and for storing it, is configuration dependent. Therefore, if you 1284 say Y here, you must know the proper physical address where to 1285 store the kernel image depending on your own flash memory usage. 1286 1287 Also note that the make target becomes "make xipImage" rather than 1288 "make zImage" or "make Image". The final kernel binary to put in 1289 ROM memory will be arch/riscv/boot/xipImage. 1290 1291 SPARSEMEM is required because the kernel text and rodata that are 1292 flash resident are not backed by memmap, then any attempt to get 1293 a struct page on those regions will trigger a fault. 1294 1295 If unsure, say N. 1296 1297config XIP_PHYS_ADDR 1298 hex "XIP Kernel Physical Location" 1299 depends on XIP_KERNEL 1300 default "0x21000000" 1301 help 1302 This is the physical address in your flash memory the kernel will 1303 be linked for and stored to. This address is dependent on your 1304 own flash usage. 1305 1306config RISCV_ISA_FALLBACK 1307 bool "Permit falling back to parsing riscv,isa for extension support by default" 1308 default y 1309 help 1310 Parsing the "riscv,isa" devicetree property has been deprecated and 1311 replaced by a list of explicitly defined strings. For compatibility 1312 with existing platforms, the kernel will fall back to parsing the 1313 "riscv,isa" property if the replacements are not found. 1314 1315 Selecting N here will result in a kernel that does not use the 1316 fallback, unless the commandline "riscv_isa_fallback" parameter is 1317 present. 1318 1319 Please see the dt-binding, located at 1320 Documentation/devicetree/bindings/riscv/extensions.yaml for details 1321 on the replacement properties, "riscv,isa-base" and 1322 "riscv,isa-extensions". 1323 1324config BUILTIN_DTB 1325 bool "Built-in device tree" 1326 depends on OF && NONPORTABLE 1327 select GENERIC_BUILTIN_DTB 1328 help 1329 Build a device tree into the Linux image. 1330 This option should be selected if no bootloader is being used. 1331 If unsure, say N. 1332 1333 1334config BUILTIN_DTB_NAME 1335 string "Built-in device tree source" 1336 depends on BUILTIN_DTB 1337 help 1338 DTS file path (without suffix, relative to arch/riscv/boot/dts) 1339 for the DTS file that will be used to produce the DTB linked into the 1340 kernel. 1341 1342endmenu # "Boot options" 1343 1344config PORTABLE 1345 bool 1346 default !NONPORTABLE 1347 select EFI 1348 select MMU 1349 select OF 1350 1351config ARCH_PROC_KCORE_TEXT 1352 def_bool y 1353 1354menu "Power management options" 1355 1356source "kernel/power/Kconfig" 1357 1358config ARCH_HIBERNATION_POSSIBLE 1359 def_bool y 1360 1361config ARCH_HIBERNATION_HEADER 1362 def_bool HIBERNATION 1363 1364config ARCH_SUSPEND_POSSIBLE 1365 def_bool y 1366 1367endmenu # "Power management options" 1368 1369menu "CPU Power Management" 1370 1371source "drivers/cpuidle/Kconfig" 1372 1373source "drivers/cpufreq/Kconfig" 1374 1375endmenu # "CPU Power Management" 1376 1377source "arch/riscv/kvm/Kconfig" 1378 1379source "drivers/acpi/Kconfig" 1380