1# SPDX-License-Identifier: GPL-2.0-only 2# 3# For a description of the syntax of this configuration file, 4# see Documentation/kbuild/kconfig-language.rst. 5# 6 7config 64BIT 8 bool 9 10config 32BIT 11 bool 12 13config RISCV 14 def_bool y 15 select ACPI_GENERIC_GSI if ACPI 16 select ACPI_MCFG if (ACPI && PCI) 17 select ACPI_PPTT if ACPI 18 select ACPI_REDUCED_HARDWARE_ONLY if ACPI 19 select ACPI_RIMT if ACPI 20 select ACPI_SPCR_TABLE if ACPI 21 select ARCH_DMA_DEFAULT_COHERENT 22 select ARCH_ENABLE_HUGEPAGE_MIGRATION if HUGETLB_PAGE && MIGRATION 23 select ARCH_ENABLE_MEMORY_HOTPLUG if SPARSEMEM_VMEMMAP 24 select ARCH_ENABLE_SPLIT_PMD_PTLOCK if PGTABLE_LEVELS > 2 25 select ARCH_HAS_PMD_SOFTLEAVES if TRANSPARENT_HUGEPAGE 26 select ARCH_HAS_ACPI_TABLE_UPGRADE if ACPI 27 select ARCH_HAS_BINFMT_FLAT 28 select ARCH_HAS_CC_CAN_LINK 29 select ARCH_HAS_CURRENT_STACK_POINTER 30 select ARCH_HAS_DEBUG_VIRTUAL if MMU 31 select ARCH_HAS_DEBUG_VM_PGTABLE 32 select ARCH_HAS_DEBUG_WX 33 select ARCH_HAS_DELAY_TIMER 34 select ARCH_HAS_ELF_CORE_EFLAGS if BINFMT_ELF && ELF_CORE 35 select ARCH_HAS_FAST_MULTIPLIER 36 select ARCH_HAS_FORTIFY_SOURCE 37 select ARCH_HAS_GCOV_PROFILE_ALL 38 select ARCH_HAS_GIGANTIC_PAGE 39 select ARCH_HAS_HW_PTE_YOUNG 40 select ARCH_HAS_KCOV 41 select ARCH_HAS_KERNEL_FPU_SUPPORT if 64BIT && FPU 42 select ARCH_HAS_MEMBARRIER_CALLBACKS 43 select ARCH_HAS_MEMBARRIER_SYNC_CORE 44 select ARCH_HAS_MMIOWB 45 select ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE 46 select ARCH_HAS_PMEM_API 47 select ARCH_HAS_PREEMPT_LAZY 48 select ARCH_HAS_PREPARE_SYNC_CORE_CMD 49 select ARCH_HAS_PTDUMP if MMU 50 select ARCH_HAS_PTE_SPECIAL 51 select ARCH_HAS_SET_DIRECT_MAP if MMU 52 select ARCH_HAS_SET_MEMORY if MMU 53 select ARCH_HAS_STRICT_KERNEL_RWX if MMU 54 select ARCH_HAS_STRICT_MODULE_RWX if MMU 55 select ARCH_HAS_SYNC_CORE_BEFORE_USERMODE 56 select ARCH_HAS_SYSCALL_WRAPPER 57 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST 58 select ARCH_HAS_UBSAN 59 select ARCH_HAS_VDSO_ARCH_DATA 60 select ARCH_HAVE_NMI_SAFE_CMPXCHG 61 select ARCH_KEEP_MEMBLOCK if ACPI || KEXEC 62 select ARCH_MHP_MEMMAP_ON_MEMORY_ENABLE if 64BIT && MMU 63 select ARCH_OPTIONAL_KERNEL_RWX if ARCH_HAS_STRICT_KERNEL_RWX 64 select ARCH_OPTIONAL_KERNEL_RWX_DEFAULT 65 select ARCH_STACKWALK 66 select ARCH_SUPPORTS_ATOMIC_RMW 67 select ARCH_SUPPORTS_CFI 68 select ARCH_SUPPORTS_DEBUG_PAGEALLOC if MMU 69 select ARCH_SUPPORTS_HUGE_PFNMAP if TRANSPARENT_HUGEPAGE 70 select ARCH_SUPPORTS_HUGETLBFS if MMU 71 select ARCH_SUPPORTS_LTO_CLANG if CMODEL_MEDANY 72 select ARCH_SUPPORTS_LTO_CLANG_THIN 73 select ARCH_SUPPORTS_MSEAL_SYSTEM_MAPPINGS if 64BIT && MMU 74 select ARCH_SUPPORTS_PAGE_TABLE_CHECK if MMU 75 select ARCH_SUPPORTS_PER_VMA_LOCK if MMU 76 select ARCH_HAS_PTE_PROTNONE if MMU 77 select ARCH_SUPPORTS_RT 78 select ARCH_SUPPORTS_SHADOW_CALL_STACK if HAVE_SHADOW_CALL_STACK 79 select ARCH_SUPPORTS_SCHED_MC if SMP 80 select ARCH_USE_CMPXCHG_LOCKREF if 64BIT 81 select ARCH_USE_MEMTEST 82 select ARCH_USE_QUEUED_RWLOCKS 83 select ARCH_USE_SYM_ANNOTATIONS 84 select ARCH_USES_CFI_TRAPS if CFI 85 select ARCH_WANT_BATCHED_UNMAP_TLB_FLUSH if MMU 86 select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU 87 select ARCH_WANT_FRAME_POINTERS 88 select ARCH_WANT_GENERAL_HUGETLB if !RISCV_ISA_SVNAPOT 89 select ARCH_WANT_HUGE_PMD_SHARE if 64BIT 90 select ARCH_WANT_LD_ORPHAN_WARN 91 select ARCH_WANT_OPTIMIZE_DAX_VMEMMAP 92 select ARCH_WANT_OPTIMIZE_HUGETLB_VMEMMAP 93 select ARCH_WANTS_NO_INSTR 94 select ARCH_WANTS_THP_SWAP if HAVE_ARCH_TRANSPARENT_HUGEPAGE 95 select ARCH_WEAK_RELEASE_ACQUIRE if ARCH_USE_QUEUED_SPINLOCKS 96 select BINFMT_FLAT_NO_DATA_START_OFFSET if !MMU 97 select BUILDTIME_TABLE_SORT if MMU 98 select CLINT_TIMER if RISCV_M_MODE 99 select CLONE_BACKWARDS 100 select COMMON_CLK 101 select CPU_NO_EFFICIENT_FFS if !RISCV_ISA_ZBB 102 select CPU_PM if CPU_IDLE || HIBERNATION || SUSPEND 103 select DYNAMIC_FTRACE if FUNCTION_TRACER 104 select EDAC_SUPPORT 105 select FRAME_POINTER if PERF_EVENTS || (FUNCTION_TRACER && !DYNAMIC_FTRACE) 106 select FTRACE_MCOUNT_USE_PATCHABLE_FUNCTION_ENTRY if DYNAMIC_FTRACE 107 select FUNCTION_ALIGNMENT_8B if DYNAMIC_FTRACE_WITH_CALL_OPS 108 select GENERIC_ARCH_TOPOLOGY 109 select GENERIC_ATOMIC64 if !64BIT 110 select GENERIC_BITREVERSE if HAVE_ARCH_BITREVERSE 111 select GENERIC_CLOCKEVENTS_BROADCAST if SMP 112 select GENERIC_CPU_DEVICES 113 select GENERIC_CPU_VULNERABILITIES 114 select GENERIC_EARLY_IOREMAP 115 select GENERIC_ENTRY 116 select GENERIC_GETTIMEOFDAY if MMU && 64BIT 117 select GENERIC_IDLE_POLL_SETUP 118 select GENERIC_IOREMAP if MMU 119 select HAVE_IOREMAP_PROT if MMU 120 select GENERIC_IRQ_IPI if SMP 121 select GENERIC_IRQ_IPI_MUX if SMP 122 select GENERIC_IRQ_MULTI_HANDLER 123 select GENERIC_IRQ_SHOW 124 select GENERIC_IRQ_SHOW_LEVEL 125 select GENERIC_LIB_DEVMEM_IS_ALLOWED 126 select GENERIC_PENDING_IRQ if SMP 127 select GENERIC_PCI_IOMAP 128 select GENERIC_SCHED_CLOCK 129 select GENERIC_SMP_IDLE_THREAD 130 select HARDIRQS_SW_RESEND 131 select HAS_IOPORT if MMU 132 select HAVE_ALIGNED_STRUCT_PAGE 133 select HAVE_ARCH_AUDITSYSCALL 134 select HAVE_ARCH_BITREVERSE if RISCV_ISA_ZBKB && BITREVERSE 135 select HAVE_ARCH_HUGE_VMALLOC if HAVE_ARCH_HUGE_VMAP 136 select HAVE_ARCH_HUGE_VMAP if MMU && 64BIT 137 select HAVE_ARCH_JUMP_LABEL 138 select HAVE_ARCH_JUMP_LABEL_RELATIVE 139 select HAVE_ARCH_KASAN if MMU && 64BIT 140 select HAVE_ARCH_KASAN_VMALLOC if MMU && 64BIT 141 select HAVE_ARCH_KFENCE if MMU && 64BIT 142 select HAVE_ARCH_KSTACK_ERASE 143 select HAVE_ARCH_KGDB 144 select HAVE_ARCH_KGDB_QXFER_PKT 145 select HAVE_ARCH_MMAP_RND_BITS if MMU 146 select HAVE_ARCH_MMAP_RND_COMPAT_BITS if COMPAT 147 select HAVE_ARCH_RANDOMIZE_KSTACK_OFFSET 148 select HAVE_ARCH_SECCOMP_FILTER 149 select HAVE_ARCH_SOFT_DIRTY if 64BIT && MMU && RISCV_ISA_SVRSW60T59B 150 select HAVE_ARCH_THREAD_STRUCT_WHITELIST 151 select HAVE_ARCH_TRACEHOOK 152 select HAVE_ARCH_TRANSPARENT_HUGEPAGE if 64BIT && MMU 153 select HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD if 64BIT && MMU 154 select HAVE_ARCH_USERFAULTFD_MINOR if 64BIT && USERFAULTFD 155 select HAVE_ARCH_USERFAULTFD_WP if 64BIT && MMU && USERFAULTFD && RISCV_ISA_SVRSW60T59B 156 select HAVE_ARCH_VMAP_STACK if MMU && 64BIT 157 select HAVE_ASM_MODVERSIONS 158 select HAVE_BUILDTIME_MCOUNT_SORT 159 select HAVE_CONTEXT_TRACKING_USER 160 select HAVE_DEBUG_KMEMLEAK 161 select HAVE_DMA_CONTIGUOUS if MMU 162 select HAVE_DYNAMIC_FTRACE if MMU && (CLANG_SUPPORTS_DYNAMIC_FTRACE || GCC_SUPPORTS_DYNAMIC_FTRACE) 163 select FUNCTION_ALIGNMENT_4B if DYNAMIC_FTRACE && RISCV_ISA_C 164 select HAVE_DYNAMIC_FTRACE_WITH_DIRECT_CALLS if HAVE_DYNAMIC_FTRACE_WITH_CALL_OPS 165 select HAVE_DYNAMIC_FTRACE_WITH_CALL_OPS if (DYNAMIC_FTRACE_WITH_ARGS && !CFI) 166 select HAVE_DYNAMIC_FTRACE_WITH_ARGS if HAVE_DYNAMIC_FTRACE 167 select HAVE_FTRACE_GRAPH_FUNC 168 select HAVE_FUNCTION_GRAPH_TRACER if HAVE_DYNAMIC_FTRACE_WITH_ARGS 169 select HAVE_FUNCTION_GRAPH_FREGS 170 select HAVE_FUNCTION_TRACER if HAVE_DYNAMIC_FTRACE 171 select HAVE_EBPF_JIT if MMU 172 select HAVE_GENERIC_TIF_BITS 173 select HAVE_GUP_FAST if MMU 174 select HAVE_FUNCTION_ARG_ACCESS_API 175 select HAVE_FUNCTION_ERROR_INJECTION 176 select HAVE_GCC_PLUGINS 177 select HAVE_IRQ_TIME_ACCOUNTING 178 select HAVE_KERNEL_BZIP2 if !EFI_ZBOOT 179 select HAVE_KERNEL_GZIP if !EFI_ZBOOT 180 select HAVE_KERNEL_LZ4 if !EFI_ZBOOT 181 select HAVE_KERNEL_LZMA if !EFI_ZBOOT 182 select HAVE_KERNEL_LZO if !EFI_ZBOOT 183 select HAVE_KERNEL_UNCOMPRESSED if !EFI_ZBOOT 184 select HAVE_KERNEL_ZSTD if !EFI_ZBOOT 185 select HAVE_KERNEL_XZ if !EFI_ZBOOT 186 select HAVE_KPROBES 187 select HAVE_KRETPROBES 188 # https://github.com/ClangBuiltLinux/linux/issues/1881 189 select HAVE_LD_DEAD_CODE_DATA_ELIMINATION if !LD_IS_LLD 190 select HAVE_MOVE_PMD 191 select HAVE_MOVE_PUD 192 select HAVE_PAGE_SIZE_4KB 193 select HAVE_PCI 194 select HAVE_PERF_EVENTS 195 select HAVE_PERF_REGS 196 select HAVE_PERF_USER_STACK_DUMP 197 select HAVE_POSIX_CPU_TIMERS_TASK_WORK 198 select HAVE_PREEMPT_DYNAMIC_KEY 199 select HAVE_REGS_AND_STACK_ACCESS_API 200 select HAVE_RETHOOK 201 select HAVE_RSEQ 202 select HAVE_RUST if RUSTC_SUPPORTS_RISCV && CC_IS_CLANG 203 select HAVE_SAMPLE_FTRACE_DIRECT 204 select HAVE_SAMPLE_FTRACE_DIRECT_MULTI 205 select HAVE_STACKPROTECTOR 206 select HAVE_SYSCALL_TRACEPOINTS 207 select HOTPLUG_PARALLEL if HOTPLUG_CPU 208 select IRQ_DOMAIN 209 select IRQ_FORCED_THREADING 210 select KASAN_VMALLOC if KASAN 211 select LOCK_MM_AND_FIND_VMA 212 select MMU_GATHER_RCU_TABLE_FREE if SMP && MMU 213 select MODULES_USE_ELF_RELA if MODULES 214 select OF 215 select OF_EARLY_FLATTREE 216 select OF_IRQ 217 select PCI_DOMAINS_GENERIC if PCI 218 select PCI_ECAM if (ACPI && PCI) 219 select PCI_MSI if PCI 220 select RELOCATABLE if !MMU && !PHYS_RAM_BASE_FIXED 221 select RISCV_ALTERNATIVE 222 select RISCV_APLIC 223 select RISCV_IMSIC 224 select RISCV_INTC 225 select RISCV_TIMER if RISCV_SBI 226 select SIFIVE_PLIC 227 select SPARSE_IRQ 228 select SYSCTL_EXCEPTION_TRACE 229 select THREAD_INFO_IN_TASK 230 select TRACE_IRQFLAGS_SUPPORT 231 select UACCESS_MEMCPY if !MMU 232 select VDSO_DATASTORE if MMU 233 select VDSO_GETRANDOM if MMU && 64BIT 234 select USER_STACKTRACE_SUPPORT 235 select ZONE_DMA32 if 64BIT 236 237config RUSTC_SUPPORTS_RISCV 238 def_bool y 239 depends on 64BIT 240 241config CLANG_SUPPORTS_DYNAMIC_FTRACE 242 def_bool CC_IS_CLANG 243 # https://github.com/ClangBuiltLinux/linux/issues/1817 244 depends on AS_IS_GNU || (AS_IS_LLVM && (LD_IS_LLD || LD_VERSION >= 23600)) 245 246config GCC_SUPPORTS_DYNAMIC_FTRACE 247 def_bool CC_IS_GCC 248 depends on $(cc-option,-fpatchable-function-entry=8) 249 depends on CC_HAS_MIN_FUNCTION_ALIGNMENT || !RISCV_ISA_C 250 251config HAVE_SHADOW_CALL_STACK 252 def_bool $(cc-option,-fsanitize=shadow-call-stack) 253 # https://github.com/riscv-non-isa/riscv-elf-psabi-doc/commit/a484e843e6eeb51f0cb7b8819e50da6d2444d769 254 depends on $(ld-option,--no-relax-gp) 255 256# https://github.com/llvm/llvm-project/commit/bbc0f99f3bc96f1db16f649fc21dd18e5b0918f6 257config ARCH_HAS_BROKEN_DWARF5 258 def_bool y 259 # https://github.com/llvm/llvm-project/commit/1df5ea29b43690b6622db2cad7b745607ca4de6a 260 depends on AS_IS_LLVM && AS_VERSION < 180000 261 # https://github.com/llvm/llvm-project/commit/7ffabb61a5569444b5ac9322e22e5471cc5e4a77 262 depends on LD_IS_LLD && LLD_VERSION < 180000 263 264config ARCH_MMAP_RND_BITS_MIN 265 default 18 if 64BIT 266 default 8 267 268config ARCH_MMAP_RND_COMPAT_BITS_MIN 269 default 8 270 271# max bits determined by the following formula: 272# VA_BITS - PAGE_SHIFT - 3 273config ARCH_MMAP_RND_BITS_MAX 274 default 24 if 64BIT # SV39 based 275 default 17 276 277config ARCH_MMAP_RND_COMPAT_BITS_MAX 278 default 17 279 280# set if we run in machine mode, cleared if we run in supervisor mode 281config RISCV_M_MODE 282 bool "Build a kernel that runs in machine mode" 283 depends on !MMU 284 default y 285 help 286 Select this option if you want to run the kernel in M-mode, 287 without the assistance of any other firmware. 288 289# set if we are running in S-mode and can use SBI calls 290config RISCV_SBI 291 bool 292 depends on !RISCV_M_MODE 293 default y 294 295config MMU 296 bool "MMU-based Paged Memory Management Support" 297 default y 298 help 299 Select if you want MMU-based virtualised addressing space 300 support by paged memory management. If unsure, say 'Y'. 301 302config KASAN_SHADOW_OFFSET 303 hex 304 depends on KASAN_GENERIC 305 default 0xdfffffff00000000 if 64BIT 306 default 0xffffffff if 32BIT 307 308config ARCH_FLATMEM_ENABLE 309 def_bool !NUMA 310 311config ARCH_SPARSEMEM_ENABLE 312 def_bool y 313 depends on MMU 314 select SPARSEMEM_STATIC if 32BIT && SPARSEMEM 315 select SPARSEMEM_VMEMMAP_ENABLE if 64BIT 316 317config ARCH_SELECT_MEMORY_MODEL 318 def_bool ARCH_SPARSEMEM_ENABLE 319 320config ARCH_SUPPORTS_UPROBES 321 def_bool y 322 323config STACKTRACE_SUPPORT 324 def_bool y 325 326config GENERIC_BUG 327 def_bool y 328 depends on BUG 329 select GENERIC_BUG_RELATIVE_POINTERS 330 331config GENERIC_BUG_RELATIVE_POINTERS 332 bool 333 334config GENERIC_CALIBRATE_DELAY 335 def_bool y 336 337config GENERIC_CSUM 338 def_bool y 339 340config GENERIC_HWEIGHT 341 def_bool y 342 343config FIX_EARLYCON_MEM 344 def_bool MMU 345 346config ILLEGAL_POINTER_VALUE 347 hex 348 default 0 if 32BIT 349 default 0xdead000000000000 if 64BIT 350 351config PGTABLE_LEVELS 352 int 353 default 5 if 64BIT 354 default 2 355 356config LOCKDEP_SUPPORT 357 def_bool y 358 359config RISCV_DMA_NONCOHERENT 360 bool 361 select ARCH_HAS_DMA_PREP_COHERENT 362 select ARCH_HAS_SETUP_DMA_OPS 363 select ARCH_HAS_SYNC_DMA_FOR_CPU 364 select ARCH_HAS_SYNC_DMA_FOR_DEVICE 365 select DMA_BOUNCE_UNALIGNED_KMALLOC if SWIOTLB 366 367config RISCV_NONSTANDARD_CACHE_OPS 368 bool 369 help 370 This enables function pointer support for non-standard noncoherent 371 systems to handle cache management. 372 373config AS_HAS_INSN 374 def_bool $(as-instr,.insn 0x100000f) 375 376config AS_HAS_OPTION_ARCH 377 # https://github.com/llvm/llvm-project/commit/9e8ed3403c191ab9c4903e8eeb8f732ff8a43cb4 378 def_bool y 379 depends on $(as-instr, .option arch$(comma) +m) 380 381source "arch/riscv/Kconfig.socs" 382source "arch/riscv/Kconfig.errata" 383 384menu "Platform type" 385 386config NONPORTABLE 387 bool "Allow configurations that result in non-portable kernels" 388 help 389 RISC-V kernel binaries are compatible between all known systems 390 whenever possible, but there are some use cases that can only be 391 satisfied by configurations that result in kernel binaries that are 392 not portable between systems. 393 394 Selecting N does not guarantee kernels will be portable to all known 395 systems. Selecting any of the options guarded by NONPORTABLE will 396 result in kernel binaries that are unlikely to be portable between 397 systems. 398 399 If unsure, say N. 400 401choice 402 prompt "Base ISA" 403 default ARCH_RV64I 404 help 405 This selects the base ISA that this kernel will target and must match 406 the target platform. 407 408config ARCH_RV32I 409 bool "RV32I" 410 depends on NONPORTABLE 411 select 32BIT 412 select GENERIC_LIB_UCMPDI2 413 414config ARCH_RV64I 415 bool "RV64I" 416 select 64BIT 417 select ARCH_SUPPORTS_INT128 if CC_HAS_INT128 418 select SWIOTLB if MMU 419 420endchoice 421 422# We must be able to map all physical memory into the kernel, but the compiler 423# is still a bit more efficient when generating code if it's setup in a manner 424# such that it can only map 2GiB of memory. 425choice 426 prompt "Kernel Code Model" 427 default CMODEL_MEDLOW if 32BIT 428 default CMODEL_MEDANY if 64BIT 429 430 config CMODEL_MEDLOW 431 bool "medium low code model" 432 config CMODEL_MEDANY 433 bool "medium any code model" 434endchoice 435 436config MODULE_SECTIONS 437 bool 438 select HAVE_MOD_ARCH_SPECIFIC 439 440config SMP 441 bool "Symmetric Multi-Processing" 442 help 443 This enables support for systems with more than one CPU. If 444 you say N here, the kernel will run on single and 445 multiprocessor machines, but will use only one CPU of a 446 multiprocessor machine. If you say Y here, the kernel will run 447 on many, but not all, single processor machines. On a single 448 processor machine, the kernel will run faster if you say N 449 here. 450 451 If you don't know what to do here, say N. 452 453config NR_CPUS 454 int "Maximum number of CPUs (2-512)" 455 depends on SMP 456 range 2 512 if !RISCV_SBI_V01 && 64BIT 457 range 2 128 if !RISCV_SBI_V01 && 32BIT 458 range 2 64 if RISCV_SBI_V01 && 64BIT 459 range 2 32 if RISCV_SBI_V01 && 32BIT 460 default "32" if 32BIT 461 default "64" if RISCV_SBI_V01 && 64BIT 462 default "256" if !RISCV_SBI_V01 && 64BIT 463 464config HOTPLUG_CPU 465 bool "Support for hot-pluggable CPUs" 466 depends on SMP 467 select GENERIC_IRQ_MIGRATION 468 help 469 470 Say Y here to experiment with turning CPUs off and on. CPUs 471 can be controlled through /sys/devices/system/cpu. 472 473 Say N if you want to disable CPU hotplug. 474 475choice 476 prompt "CPU Tuning" 477 default TUNE_GENERIC 478 479config TUNE_GENERIC 480 bool "generic" 481 482endchoice 483 484# Common NUMA Features 485config NUMA 486 bool "NUMA Memory Allocation and Scheduler Support" 487 depends on SMP && MMU 488 select ARCH_SUPPORTS_NUMA_BALANCING 489 select GENERIC_ARCH_NUMA 490 select HAVE_SETUP_PER_CPU_AREA 491 select NEED_PER_CPU_EMBED_FIRST_CHUNK 492 select NEED_PER_CPU_PAGE_FIRST_CHUNK 493 select OF_NUMA 494 select USE_PERCPU_NUMA_NODE_ID 495 help 496 Enable NUMA (Non-Uniform Memory Access) support. 497 498 The kernel will try to allocate memory used by a CPU on the 499 local memory of the CPU and add some more NUMA awareness to the kernel. 500 501config NODES_SHIFT 502 int "Maximum NUMA Nodes (as a power of 2)" 503 range 1 10 504 default "2" 505 depends on NUMA 506 help 507 Specify the maximum number of NUMA Nodes available on the target 508 system. Increases memory reserved to accommodate various tables. 509 510choice 511 prompt "RISC-V spinlock type" 512 default RISCV_COMBO_SPINLOCKS 513 514config RISCV_TICKET_SPINLOCKS 515 bool "Using ticket spinlock" 516 517config RISCV_QUEUED_SPINLOCKS 518 bool "Using queued spinlock" 519 depends on SMP && MMU && NONPORTABLE 520 select ARCH_USE_QUEUED_SPINLOCKS 521 help 522 The queued spinlock implementation requires the forward progress 523 guarantee of cmpxchg()/xchg() atomic operations: CAS with Zabha or 524 LR/SC with Ziccrse provide such guarantee. 525 526 Select this if and only if Zabha or Ziccrse is available on your 527 platform, RISCV_QUEUED_SPINLOCKS must not be selected for platforms 528 without one of those extensions. 529 530 If unsure, select RISCV_COMBO_SPINLOCKS, which will use qspinlocks 531 when supported and otherwise ticket spinlocks. 532 533config RISCV_COMBO_SPINLOCKS 534 bool "Using combo spinlock" 535 depends on SMP && MMU 536 select ARCH_USE_QUEUED_SPINLOCKS 537 help 538 Embed both queued spinlock and ticket lock so that the spinlock 539 implementation can be chosen at runtime. 540 541endchoice 542 543config RISCV_ALTERNATIVE 544 bool 545 help 546 This Kconfig allows the kernel to automatically patch the 547 erratum or cpufeature required by the execution platform at run 548 time. The code patching overhead is minimal, as it's only done 549 once at boot and once on each module load. 550 551config RISCV_ALTERNATIVE_EARLY 552 bool 553 depends on RISCV_ALTERNATIVE 554 help 555 Allows early patching of the kernel for special errata 556 557config RISCV_ISA_C 558 bool "Emit compressed instructions when building Linux" 559 default y 560 help 561 Adds "C" to the ISA subsets that the toolchain is allowed to emit 562 when building Linux, which results in compressed instructions in the 563 Linux binary. This option produces a kernel that will not run on 564 systems that do not support compressed instructions. 565 566 If you don't know what to do here, say Y. 567 568config RISCV_ISA_SUPM 569 bool "Supm extension for userspace pointer masking" 570 depends on 64BIT 571 default y 572 help 573 Add support for pointer masking in userspace (Supm) when the 574 underlying hardware extension (Smnpm or Ssnpm) is detected at boot. 575 576 If this option is disabled, userspace will be unable to use 577 the prctl(PR_{SET,GET}_TAGGED_ADDR_CTRL) API. 578 579config RISCV_ISA_SVNAPOT 580 bool "Svnapot extension support for supervisor mode NAPOT pages" 581 depends on 64BIT && MMU 582 depends on RISCV_ALTERNATIVE 583 default y 584 help 585 Enable support for the Svnapot ISA-extension when it is detected 586 at boot. 587 588 The Svnapot extension is used to mark contiguous PTEs as a range 589 of contiguous virtual-to-physical translations for a naturally 590 aligned power-of-2 (NAPOT) granularity larger than the base 4KB page 591 size. When HUGETLBFS is also selected this option unconditionally 592 allocates some memory for each NAPOT page size supported by the kernel. 593 When optimizing for low memory consumption and for platforms without 594 the Svnapot extension, it may be better to say N here. 595 596 If you don't know what to do here, say Y. 597 598config RISCV_ISA_SSQOSID 599 bool "Ssqosid extension support for supervisor mode Quality of Service ID" 600 depends on 64BIT 601 default n 602 help 603 Adds support for the Ssqosid ISA extension (Supervisor-mode 604 Quality of Service ID). 605 606 Ssqosid defines the srmcfg CSR which allows the system to tag the 607 running process with an RCID (Resource Control ID) and MCID 608 (Monitoring Counter ID). The RCID is used to determine resource 609 allocation. The MCID is used to track resource usage in event 610 counters. 611 612 For example, a cache controller may use the RCID to apply a 613 cache partitioning scheme and use the MCID to track how much 614 cache a process, or a group of processes, is using. 615 616config RISCV_ISA_SVPBMT 617 bool "Svpbmt extension support for supervisor mode page-based memory types" 618 depends on 64BIT && MMU 619 depends on RISCV_ALTERNATIVE 620 default y 621 help 622 Add support for the Svpbmt ISA-extension (Supervisor-mode: 623 page-based memory types) in the kernel when it is detected at boot. 624 625 The memory type for a page contains a combination of attributes 626 that indicate the cacheability, idempotency, and ordering 627 properties for access to that page. 628 629 The Svpbmt extension is only available on 64-bit cpus. 630 631 If you don't know what to do here, say Y. 632 633config TOOLCHAIN_HAS_V 634 bool 635 default y 636 depends on !64BIT || $(cc-option,-mabi=lp64 -march=rv64imv) 637 depends on !32BIT || $(cc-option,-mabi=ilp32 -march=rv32imv) 638 depends on LD_IS_LLD || LD_VERSION >= 23800 639 depends on AS_HAS_OPTION_ARCH 640 641config RISCV_ISA_V 642 bool "Vector extension support" 643 depends on TOOLCHAIN_HAS_V 644 depends on FPU 645 select DYNAMIC_SIGFRAME 646 default y 647 help 648 Add support for the Vector extension when it is detected at boot. 649 When this option is disabled, neither the kernel nor userspace may 650 use vector procedures. 651 652 If you don't know what to do here, say Y. 653 654config RISCV_ISA_V_DEFAULT_ENABLE 655 bool "Enable userspace Vector by default" 656 depends on RISCV_ISA_V 657 default y 658 help 659 Say Y here if you want to enable Vector in userspace by default. 660 Otherwise, userspace has to make explicit prctl() call to enable 661 Vector, or enable it via the sysctl interface. 662 663 If you don't know what to do here, say Y. 664 665config RISCV_ISA_V_UCOPY_THRESHOLD 666 int "Threshold size for vectorized user copies" 667 depends on RISCV_ISA_V 668 default 768 669 help 670 Prefer using vectorized copy_to_user()/copy_from_user() when the 671 workload size exceeds this value. 672 673config RISCV_ISA_V_PREEMPTIVE 674 bool "Run kernel-mode Vector with kernel preemption" 675 depends on PREEMPTION 676 depends on RISCV_ISA_V 677 default y 678 help 679 Usually, in-kernel SIMD routines are run with preemption disabled. 680 Functions which invoke long running SIMD thus must yield the core's 681 vector unit to prevent blocking other tasks for too long. 682 683 This config allows the kernel to run SIMD without explicitly disabling 684 preemption. Enabling this config will result in higher memory consumption 685 due to the allocation of per-task's kernel Vector context. 686 687config RISCV_ISA_ZAWRS 688 bool "Zawrs extension support for more efficient busy waiting" 689 depends on RISCV_ALTERNATIVE 690 default y 691 help 692 The Zawrs extension defines instructions to be used in polling loops 693 which allow a hart to enter a low-power state or to trap to the 694 hypervisor while waiting on a store to a memory location. Enable the 695 use of these instructions in the kernel when the Zawrs extension is 696 detected at boot. 697 698config TOOLCHAIN_HAS_ZABHA 699 bool 700 default y 701 depends on !64BIT || $(cc-option,-mabi=lp64 -march=rv64ima_zabha) 702 depends on !32BIT || $(cc-option,-mabi=ilp32 -march=rv32ima_zabha) 703 depends on AS_HAS_OPTION_ARCH 704 705config RISCV_ISA_ZABHA 706 bool "Zabha extension support for atomic byte/halfword operations" 707 depends on TOOLCHAIN_HAS_ZABHA 708 depends on RISCV_ALTERNATIVE 709 default y 710 help 711 Enable the use of the Zabha ISA-extension to implement kernel 712 byte/halfword atomic memory operations when it is detected at boot. 713 714 If you don't know what to do here, say Y. 715 716config TOOLCHAIN_HAS_ZACAS 717 bool 718 default y 719 depends on !64BIT || $(cc-option,-mabi=lp64 -march=rv64ima_zacas) 720 depends on !32BIT || $(cc-option,-mabi=ilp32 -march=rv32ima_zacas) 721 depends on AS_HAS_OPTION_ARCH 722 723config RISCV_ISA_ZACAS 724 bool "Zacas extension support for atomic CAS" 725 depends on RISCV_ALTERNATIVE 726 default y 727 help 728 Enable the use of the Zacas ISA-extension to implement kernel atomic 729 cmpxchg operations when it is detected at boot. 730 731 If you don't know what to do here, say Y. 732 733config TOOLCHAIN_HAS_ZBB 734 bool 735 default y 736 depends on !64BIT || $(cc-option,-mabi=lp64 -march=rv64ima_zbb) 737 depends on !32BIT || $(cc-option,-mabi=ilp32 -march=rv32ima_zbb) 738 depends on LD_IS_LLD || LD_VERSION >= 23900 739 depends on AS_HAS_OPTION_ARCH 740 741# This symbol indicates that the toolchain supports all v1.0 vector crypto 742# extensions, including Zvk*, Zvbb, and Zvbc. LLVM added all of these at once. 743# binutils added all except Zvkb, then added Zvkb. So we just check for Zvkb. 744config TOOLCHAIN_HAS_VECTOR_CRYPTO 745 def_bool $(as-instr, .option arch$(comma) +v$(comma) +zvkb) 746 depends on AS_HAS_OPTION_ARCH 747 748config TOOLCHAIN_HAS_ZBA 749 bool 750 default y 751 depends on !64BIT || $(cc-option,-mabi=lp64 -march=rv64ima_zba) 752 depends on !32BIT || $(cc-option,-mabi=ilp32 -march=rv32ima_zba) 753 depends on LD_IS_LLD || LD_VERSION >= 23900 754 depends on AS_HAS_OPTION_ARCH 755 756config RISCV_ISA_ZBA 757 bool "Zba extension support for bit manipulation instructions" 758 default y 759 help 760 Add support for enabling optimisations in the kernel when the Zba 761 extension is detected at boot. 762 763 The Zba extension provides instructions to accelerate the generation 764 of addresses that index into arrays of basic data types. 765 766 If you don't know what to do here, say Y. 767 768config RISCV_ISA_ZBB 769 bool "Zbb extension support for bit manipulation instructions" 770 depends on RISCV_ALTERNATIVE 771 default y 772 help 773 Add support for enabling optimisations in the kernel when the 774 Zbb extension is detected at boot. Some optimisations may 775 additionally depend on toolchain support for Zbb. 776 777 The Zbb extension provides instructions to accelerate a number 778 of bit-specific operations (count bit population, sign extending, 779 bitrotation, etc). 780 781 If you don't know what to do here, say Y. 782 783config TOOLCHAIN_HAS_ZBC 784 bool 785 default y 786 depends on !64BIT || $(cc-option,-mabi=lp64 -march=rv64ima_zbc) 787 depends on !32BIT || $(cc-option,-mabi=ilp32 -march=rv32ima_zbc) 788 depends on LD_IS_LLD || LD_VERSION >= 23900 789 depends on AS_HAS_OPTION_ARCH 790 791config RISCV_ISA_ZBC 792 bool "Zbc extension support for carry-less multiplication instructions" 793 depends on TOOLCHAIN_HAS_ZBC 794 depends on MMU 795 depends on RISCV_ALTERNATIVE 796 default y 797 help 798 Adds support to dynamically detect the presence of the Zbc 799 extension (carry-less multiplication) and enable its usage. 800 801 The Zbc extension could accelerate CRC (cyclic redundancy check) 802 calculations. 803 804 If you don't know what to do here, say Y. 805 806config TOOLCHAIN_HAS_ZBKB 807 bool 808 default y 809 depends on !64BIT || $(cc-option,-mabi=lp64 -march=rv64ima_zbkb) 810 depends on !32BIT || $(cc-option,-mabi=ilp32 -march=rv32ima_zbkb) 811 depends on LD_IS_LLD || LD_VERSION >= 23900 812 depends on AS_HAS_OPTION_ARCH 813 814config RISCV_ISA_ZBKB 815 bool "Zbkb extension support for bit manipulation instructions" 816 depends on TOOLCHAIN_HAS_ZBKB 817 depends on RISCV_ALTERNATIVE 818 default y 819 help 820 Adds support to dynamically detect the presence of the ZBKB 821 extension (bit manipulation for cryptography) and enable its usage. 822 823 The Zbkb extension provides instructions to accelerate a number 824 of common cryptography operations (pack, zip, etc). 825 826 If you don't know what to do here, say Y. 827 828config RISCV_ISA_ZICBOM 829 bool "Zicbom extension support for non-coherent DMA operation" 830 depends on MMU 831 depends on RISCV_ALTERNATIVE 832 default y 833 select RISCV_DMA_NONCOHERENT 834 select DMA_DIRECT_REMAP 835 help 836 Add support for the Zicbom extension (Cache Block Management 837 Operations) and enable its use in the kernel when it is detected 838 at boot. 839 840 The Zicbom extension can be used to handle for example 841 non-coherent DMA support on devices that need it. 842 843 If you don't know what to do here, say Y. 844 845config RISCV_ISA_ZICBOZ 846 bool "Zicboz extension support for faster zeroing of memory" 847 depends on RISCV_ALTERNATIVE 848 default y 849 help 850 Enable the use of the Zicboz extension (cbo.zero instruction) 851 in the kernel when it is detected at boot. 852 853 The Zicboz extension is used for faster zeroing of memory. 854 855 If you don't know what to do here, say Y. 856 857config RISCV_ISA_ZICBOP 858 bool "Zicbop extension support for cache block prefetch" 859 depends on MMU 860 depends on RISCV_ALTERNATIVE 861 default y 862 help 863 Adds support to dynamically detect the presence of the ZICBOP 864 extension (Cache Block Prefetch Operations) and enable its 865 usage. 866 867 The Zicbop extension can be used to prefetch cache blocks for 868 read/write fetch. 869 870 If you don't know what to do here, say Y. 871 872config RISCV_ISA_SVRSW60T59B 873 bool "Svrsw60t59b extension support for using PTE bits 60 and 59" 874 depends on MMU && 64BIT 875 depends on RISCV_ALTERNATIVE 876 default y 877 help 878 Adds support to dynamically detect the presence of the Svrsw60t59b 879 extension and enable its usage. 880 881 The Svrsw60t59b extension allows to free the PTE reserved bits 60 882 and 59 for software to use. 883 884 If you don't know what to do here, say Y. 885 886config TOOLCHAIN_NEEDS_EXPLICIT_ZICSR_ZIFENCEI 887 def_bool y 888 # https://sourceware.org/git/?p=binutils-gdb.git;a=commit;h=aed44286efa8ae8717a77d94b51ac3614e2ca6dc 889 # https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=98416dbb0a62579d4a7a4a76bab51b5b52fec2cd 890 depends on AS_IS_GNU && AS_VERSION >= 23600 891 help 892 Binutils-2.38 and GCC-12.1.0 bumped the default ISA spec to the newer 893 20191213 version, which moves some instructions from the I extension to 894 the Zicsr and Zifencei extensions. This requires explicitly specifying 895 Zicsr and Zifencei when binutils >= 2.38 or GCC >= 12.1.0. Zicsr 896 and Zifencei are supported in binutils from version 2.36 onwards. 897 To make life easier, and avoid forcing toolchains that default to a 898 newer ISA spec to version 2.2, relax the check to binutils >= 2.36. 899 For GCC < 11.3.0, for which this is not possible or need special 900 treatment, this is dealt with in TOOLCHAIN_NEEDS_OLD_ISA_SPEC. 901 902config TOOLCHAIN_NEEDS_OLD_ISA_SPEC 903 def_bool y 904 depends on TOOLCHAIN_NEEDS_EXPLICIT_ZICSR_ZIFENCEI 905 # https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=d29f5d6ab513c52fd872f532c492e35ae9fd6671 906 depends on CC_IS_GCC && GCC_VERSION < 110300 907 help 908 Certain versions of GCC do not support zicsr and zifencei via -march. 909 This option causes an older ISA spec compatible with these older 910 versions of GCC to be passed to GAS, which has the same result 911 as passing zicsr and zifencei to -march. 912 913config FPU 914 bool "FPU support" 915 default y 916 help 917 Add support for floating point operations when an FPU is detected at 918 boot. When this option is disabled, neither the kernel nor userspace 919 may use the floating point unit. 920 921 If you don't know what to do here, say Y. 922 923config IRQ_STACKS 924 bool "Independent irq & softirq stacks" if EXPERT 925 default y 926 select HAVE_IRQ_EXIT_ON_IRQ_STACK 927 select HAVE_SOFTIRQ_ON_OWN_STACK 928 help 929 Add independent irq & softirq stacks for percpu to prevent kernel stack 930 overflows. We may save some memory footprint by disabling IRQ_STACKS. 931 932config THREAD_SIZE_ORDER 933 int "Kernel stack size (in power-of-two numbers of page size)" if VMAP_STACK && EXPERT 934 range 0 4 935 default 1 if 32BIT 936 default 2 937 help 938 Specify the Pages of thread stack size (from 4KB to 64KB), which also 939 affects irq stack size, which is equal to thread stack size. 940 941config RISCV_MISALIGNED 942 bool 943 help 944 Embed support for detecting and emulating misaligned 945 scalar or vector loads and stores. 946 947config RISCV_SCALAR_MISALIGNED 948 bool 949 select RISCV_MISALIGNED 950 select SYSCTL_ARCH_UNALIGN_ALLOW 951 help 952 Embed support for emulating misaligned loads and stores. 953 954config RISCV_VECTOR_MISALIGNED 955 bool 956 select RISCV_MISALIGNED 957 depends on RISCV_ISA_V 958 help 959 Enable detecting support for vector misaligned loads and stores. 960 961config RISCV_SBI_FWFT_DELEGATE_MISALIGNED 962 bool "Request firmware delegation of unaligned access exceptions" 963 depends on RISCV_SBI 964 depends on NONPORTABLE 965 help 966 Use SBI FWFT to request delegation of load address misaligned and 967 store address misaligned exceptions, if possible, and prefer Linux 968 kernel emulation of these accesses to firmware emulation. 969 970 Unfortunately, Linux's emulation is still incomplete. Namely, it 971 currently does not handle vector instructions and KVM guest accesses. 972 On platforms where these accesses would have been handled by firmware, 973 enabling this causes unexpected kernel oopses, userspaces crashes and 974 KVM guest crashes. If you are sure that these are not a problem for 975 your platform, you can say Y here, which may improve performance. 976 977 Saying N here will not worsen emulation support for unaligned accesses 978 even in the case where the firmware also has incomplete support. It 979 simply keeps the firmware's emulation enabled. 980 981 If you don't know what to do here, say N. 982 983choice 984 prompt "Unaligned Accesses Support" 985 default RISCV_PROBE_UNALIGNED_ACCESS 986 help 987 This determines the level of support for unaligned accesses. This 988 information is used by the kernel to perform optimizations. It is also 989 exposed to user space via the hwprobe syscall. The hardware will be 990 probed at boot by default. 991 992config RISCV_PROBE_UNALIGNED_ACCESS 993 bool "Probe for hardware unaligned access support" 994 select RISCV_SCALAR_MISALIGNED 995 help 996 During boot, the kernel will run a series of tests to determine the 997 speed of unaligned accesses. This probing will dynamically determine 998 the speed of unaligned accesses on the underlying system. If unaligned 999 memory accesses trap into the kernel as they are not supported by the 1000 system, the kernel will emulate the unaligned accesses to preserve the 1001 UABI. 1002 1003config RISCV_EMULATED_UNALIGNED_ACCESS 1004 bool "Emulate unaligned access where system support is missing" 1005 select RISCV_SCALAR_MISALIGNED 1006 help 1007 If unaligned memory accesses trap into the kernel as they are not 1008 supported by the system, the kernel will emulate the unaligned 1009 accesses to preserve the UABI. When the underlying system does support 1010 unaligned accesses, the unaligned accesses are assumed to be slow. 1011 1012config RISCV_SLOW_UNALIGNED_ACCESS 1013 bool "Assume the system supports slow unaligned memory accesses" 1014 depends on NONPORTABLE 1015 help 1016 Assume that the system supports slow unaligned memory accesses. The 1017 kernel and userspace programs may not be able to run at all on systems 1018 that do not support unaligned memory accesses. 1019 1020config RISCV_EFFICIENT_UNALIGNED_ACCESS 1021 bool "Assume the system supports fast unaligned memory accesses" 1022 depends on NONPORTABLE 1023 select DCACHE_WORD_ACCESS if MMU 1024 select HAVE_EFFICIENT_UNALIGNED_ACCESS 1025 help 1026 Assume that the system supports fast unaligned memory accesses. When 1027 enabled, this option improves the performance of the kernel on such 1028 systems. However, the kernel and userspace programs will run much more 1029 slowly, or will not be able to run at all, on systems that do not 1030 support efficient unaligned memory accesses. 1031 1032endchoice 1033 1034choice 1035 prompt "Vector unaligned Accesses Support" 1036 depends on RISCV_ISA_V 1037 default RISCV_PROBE_VECTOR_UNALIGNED_ACCESS 1038 help 1039 This determines the level of support for vector unaligned accesses. This 1040 information is used by the kernel to perform optimizations. It is also 1041 exposed to user space via the hwprobe syscall. The hardware will be 1042 probed at boot by default. 1043 1044config RISCV_PROBE_VECTOR_UNALIGNED_ACCESS 1045 bool "Probe speed of vector unaligned accesses" 1046 select RISCV_VECTOR_MISALIGNED 1047 help 1048 During boot, the kernel will run a series of tests to determine the 1049 speed of vector unaligned accesses if they are supported. This probing 1050 will dynamically determine the speed of vector unaligned accesses on 1051 the underlying system if they are supported. 1052 1053config RISCV_SLOW_VECTOR_UNALIGNED_ACCESS 1054 bool "Assume the system supports slow vector unaligned memory accesses" 1055 depends on NONPORTABLE 1056 help 1057 Assume that the system supports slow vector unaligned memory accesses. The 1058 kernel and userspace programs may not be able to run at all on systems 1059 that do not support unaligned memory accesses. 1060 1061config RISCV_EFFICIENT_VECTOR_UNALIGNED_ACCESS 1062 bool "Assume the system supports fast vector unaligned memory accesses" 1063 depends on NONPORTABLE 1064 help 1065 Assume that the system supports fast vector unaligned memory accesses. When 1066 enabled, this option improves the performance of the kernel on such 1067 systems. However, the kernel and userspace programs will run much more 1068 slowly, or will not be able to run at all, on systems that do not 1069 support efficient unaligned memory accesses. 1070 1071endchoice 1072 1073source "arch/riscv/Kconfig.vendor" 1074 1075endmenu # "Platform type" 1076 1077menu "Kernel features" 1078 1079source "kernel/Kconfig.hz" 1080 1081config RISCV_SBI_V01 1082 bool "SBI v0.1 support" 1083 depends on RISCV_SBI 1084 help 1085 This config allows kernel to use SBI v0.1 APIs. This will be 1086 deprecated in future once legacy M-mode software are no longer in use. 1087 1088config RISCV_BOOT_SPINWAIT 1089 bool "Spinwait booting method" 1090 depends on SMP 1091 default y if RISCV_SBI_V01 || RISCV_M_MODE 1092 help 1093 This enables support for booting Linux via spinwait method. In the 1094 spinwait method, all cores randomly jump to Linux. One of the cores 1095 gets chosen via lottery and all other keep spinning on a percpu 1096 variable. This method cannot support CPU hotplug and sparse hartid 1097 scheme. It should be only enabled for M-mode Linux or platforms relying 1098 on older firmware without SBI HSM extension. All other platforms should 1099 rely on ordered booting via SBI HSM extension which gets chosen 1100 dynamically at runtime if the firmware supports it. 1101 1102 Since spinwait is incompatible with sparse hart IDs, it requires 1103 NR_CPUS be large enough to contain the physical hart ID of the first 1104 hart to enter Linux. 1105 1106 If unsure what to do here, say N. 1107 1108config ARCH_SUPPORTS_KEXEC 1109 def_bool y 1110 1111config ARCH_SELECTS_KEXEC 1112 def_bool y 1113 depends on KEXEC 1114 select HOTPLUG_CPU if SMP 1115 1116config ARCH_SUPPORTS_KEXEC_FILE 1117 def_bool 64BIT 1118 1119config ARCH_SELECTS_KEXEC_FILE 1120 def_bool y 1121 depends on KEXEC_FILE 1122 select HAVE_IMA_KEXEC if IMA 1123 select KEXEC_ELF 1124 1125config ARCH_SUPPORTS_KEXEC_PURGATORY 1126 def_bool ARCH_SUPPORTS_KEXEC_FILE 1127 1128config ARCH_SUPPORTS_CRASH_DUMP 1129 def_bool y 1130 1131config ARCH_DEFAULT_CRASH_DUMP 1132 def_bool y 1133 1134config ARCH_HAS_GENERIC_CRASHKERNEL_RESERVATION 1135 def_bool CRASH_RESERVE 1136 1137config COMPAT 1138 bool "Kernel support for 32-bit U-mode" 1139 default 64BIT 1140 depends on 64BIT && MMU 1141 help 1142 This option enables support for a 32-bit U-mode running under a 64-bit 1143 kernel at S-mode. riscv32-specific components such as system calls, 1144 the user helper functions (vdso), signal rt_frame functions and the 1145 ptrace interface are handled appropriately by the kernel. 1146 1147 If you want to execute 32-bit userspace applications, say Y. 1148 1149config PARAVIRT 1150 bool "Enable paravirtualization code" 1151 depends on RISCV_SBI 1152 select HAVE_PV_STEAL_CLOCK_GEN 1153 help 1154 This changes the kernel so it can modify itself when it is run 1155 under a hypervisor, potentially improving performance significantly 1156 over full virtualization. 1157 1158config PARAVIRT_TIME_ACCOUNTING 1159 bool "Paravirtual steal time accounting" 1160 depends on PARAVIRT 1161 help 1162 Select this option to enable fine granularity task steal time 1163 accounting. Time spent executing other tasks in parallel with 1164 the current vCPU is discounted from the vCPU power. To account for 1165 that, there can be a small performance impact. 1166 1167 If in doubt, say N here. 1168 1169config RELOCATABLE 1170 bool "Build a relocatable kernel" 1171 select MODULE_SECTIONS if MODULES 1172 select ARCH_VMLINUX_NEEDS_RELOCS 1173 help 1174 This builds a kernel as a Position Independent Executable (PIE), 1175 which retains all relocation metadata required to relocate the 1176 kernel binary at runtime to a different virtual address than the 1177 address it was linked at. 1178 Since RISCV uses the RELA relocation format, this requires a 1179 relocation pass at runtime even if the kernel is loaded at the 1180 same address it was linked at. 1181 1182 If unsure, say N. 1183 1184config RANDOMIZE_BASE 1185 bool "Randomize the address of the kernel image" 1186 depends on RELOCATABLE 1187 depends on MMU && 64BIT 1188 help 1189 Randomizes the virtual address at which the kernel image is 1190 loaded, as a security feature that deters exploit attempts 1191 relying on knowledge of the location of kernel internals. 1192 1193 It is the bootloader's job to provide entropy, by passing a 1194 random u64 value in /chosen/kaslr-seed at kernel entry. 1195 1196 When booting via the UEFI stub, it will invoke the firmware's 1197 EFI_RNG_PROTOCOL implementation (if available) to supply entropy 1198 to the kernel proper. In addition, it will randomise the physical 1199 location of the kernel Image as well. 1200 1201 If unsure, say N. 1202 1203config RISCV_USER_CFI 1204 def_bool y 1205 bool "riscv userspace control flow integrity" 1206 depends on 64BIT && MMU && \ 1207 $(cc-option,-mabi=lp64 -march=rv64ima_zicfiss_zicfilp -fcf-protection=full) 1208 depends on RISCV_ALTERNATIVE 1209 select RISCV_SBI 1210 select ARCH_HAS_USER_SHADOW_STACK 1211 select ARCH_USES_HIGH_VMA_FLAGS 1212 select DYNAMIC_SIGFRAME 1213 help 1214 Provides CPU-assisted control flow integrity to userspace tasks. 1215 Control flow integrity is provided by implementing shadow stack for 1216 backward edge and indirect branch tracking for forward edge. 1217 Shadow stack protection is a hardware feature that detects function 1218 return address corruption. This helps mitigate ROP attacks. 1219 Indirect branch tracking enforces that all indirect branches must land 1220 on a landing pad instruction else CPU will fault. This mitigates against 1221 JOP / COP attacks. Applications must be enabled to use it, and old userspace 1222 does not get protection "for free". 1223 default y. 1224 1225endmenu # "Kernel features" 1226 1227menu "Boot options" 1228 1229config CMDLINE 1230 string "Built-in kernel command line" 1231 help 1232 For most platforms, the arguments for the kernel's command line 1233 are provided at run-time, during boot. However, there are cases 1234 where either no arguments are being provided or the provided 1235 arguments are insufficient or even invalid. 1236 1237 When that occurs, it is possible to define a built-in command 1238 line here and choose how the kernel should use it later on. 1239 1240choice 1241 prompt "Built-in command line usage" 1242 depends on CMDLINE != "" 1243 default CMDLINE_FALLBACK 1244 help 1245 Choose how the kernel will handle the provided built-in command 1246 line. 1247 1248config CMDLINE_FALLBACK 1249 bool "Use bootloader kernel arguments if available" 1250 help 1251 Use the built-in command line as fallback in case we get nothing 1252 during boot. This is the default behaviour. 1253 1254config CMDLINE_EXTEND 1255 bool "Extend bootloader kernel arguments" 1256 help 1257 The built-in command line will be appended to the command- 1258 line arguments provided during boot. This is useful in 1259 cases where the provided arguments are insufficient and 1260 you don't want to or cannot modify them. 1261 1262config CMDLINE_FORCE 1263 bool "Always use the default kernel command string" 1264 help 1265 Always use the built-in command line, even if we get one during 1266 boot. This is useful in case you need to override the provided 1267 command line on systems where you don't have or want control 1268 over it. 1269 1270endchoice 1271 1272config EFI_STUB 1273 bool 1274 1275config EFI 1276 bool "UEFI runtime support" 1277 depends on OF 1278 depends on MMU 1279 default y 1280 select ARCH_SUPPORTS_ACPI if 64BIT 1281 select EFI_GENERIC_STUB 1282 select EFI_PARAMS_FROM_FDT 1283 select EFI_RUNTIME_WRAPPERS 1284 select EFI_STUB 1285 select LIBFDT 1286 select RISCV_ISA_C 1287 select UCS2_STRING 1288 help 1289 This option provides support for runtime services provided 1290 by UEFI firmware (such as non-volatile variables, realtime 1291 clock, and platform reset). A UEFI stub is also provided to 1292 allow the kernel to be booted as an EFI application. This 1293 is only useful on systems that have UEFI firmware. 1294 1295config DMI 1296 bool "Enable support for SMBIOS (DMI) tables" 1297 depends on EFI 1298 default y 1299 help 1300 This enables SMBIOS/DMI feature for systems. 1301 1302 This option is only useful on systems that have UEFI firmware. 1303 However, even with this option, the resultant kernel should 1304 continue to boot on existing non-UEFI platforms. 1305 1306config CC_HAVE_STACKPROTECTOR_TLS 1307 def_bool $(cc-option,-mstack-protector-guard=tls -mstack-protector-guard-reg=tp -mstack-protector-guard-offset=0) 1308 1309config STACKPROTECTOR_PER_TASK 1310 def_bool y 1311 depends on !RANDSTRUCT 1312 depends on STACKPROTECTOR && CC_HAVE_STACKPROTECTOR_TLS 1313 1314config PHYS_RAM_BASE_FIXED 1315 bool "Explicitly specified physical RAM address" 1316 depends on NONPORTABLE 1317 default n 1318 1319config PHYS_RAM_BASE 1320 hex "Platform Physical RAM address" 1321 depends on PHYS_RAM_BASE_FIXED 1322 default "0x80000000" 1323 help 1324 This is the physical address of RAM in the system. It has to be 1325 explicitly specified to run early relocations of read-write data 1326 from flash to RAM. 1327 1328config RISCV_ISA_FALLBACK 1329 bool "Permit falling back to parsing riscv,isa for extension support by default" 1330 default y 1331 help 1332 Parsing the "riscv,isa" devicetree property has been deprecated and 1333 replaced by a list of explicitly defined strings. For compatibility 1334 with existing platforms, the kernel will fall back to parsing the 1335 "riscv,isa" property if the replacements are not found. 1336 1337 Selecting N here will result in a kernel that does not use the 1338 fallback, unless the commandline "riscv_isa_fallback" parameter is 1339 present. 1340 1341 Please see the dt-binding, located at 1342 Documentation/devicetree/bindings/riscv/extensions.yaml for details 1343 on the replacement properties, "riscv,isa-base" and 1344 "riscv,isa-extensions". 1345 1346config BUILTIN_DTB 1347 bool "Built-in device tree" 1348 depends on OF && NONPORTABLE 1349 select GENERIC_BUILTIN_DTB 1350 help 1351 Build a device tree into the Linux image. 1352 This option should be selected if no bootloader is being used. 1353 If unsure, say N. 1354 1355 1356config BUILTIN_DTB_NAME 1357 string "Built-in device tree source" 1358 depends on BUILTIN_DTB 1359 help 1360 DTS file path (without suffix, relative to arch/riscv/boot/dts) 1361 for the DTS file that will be used to produce the DTB linked into the 1362 kernel. 1363 1364endmenu # "Boot options" 1365 1366config PORTABLE 1367 bool 1368 default !NONPORTABLE 1369 select EFI 1370 select MMU 1371 select OF 1372 1373config ARCH_PROC_KCORE_TEXT 1374 def_bool y 1375 1376config ARCH_CC_CAN_LINK 1377 bool 1378 default $(cc_can_link_user,-march=rv64g -mabi=lp64d) if 64BIT && FPU 1379 default $(cc_can_link_user,-march=rv64g -mabi=lp64) if 64BIT 1380 default $(cc_can_link_user,-march=rv32g -mabi=ilp32d) if FPU 1381 default $(cc_can_link_user,-march=rv32g -mabi=ilp32) 1382 1383config ARCH_USERFLAGS 1384 string 1385 default "-march=rv64g -mabi=lp64d" if 64BIT && FPU 1386 default "-march=rv64g -mabi=lp64" if 64BIT 1387 default "-march=rv32g -mabi=ilp32d" if FPU 1388 default "-march=rv32g -mabi=ilp32" 1389 1390menu "Power management options" 1391 1392source "kernel/power/Kconfig" 1393 1394config ARCH_HIBERNATION_POSSIBLE 1395 def_bool y 1396 1397config ARCH_HIBERNATION_HEADER 1398 def_bool HIBERNATION 1399 1400config ARCH_SUSPEND_POSSIBLE 1401 def_bool y 1402 1403endmenu # "Power management options" 1404 1405menu "CPU Power Management" 1406 1407source "drivers/cpuidle/Kconfig" 1408 1409source "drivers/cpufreq/Kconfig" 1410 1411endmenu # "CPU Power Management" 1412 1413source "arch/riscv/kvm/Kconfig" 1414 1415source "drivers/acpi/Kconfig" 1416