1# SPDX-License-Identifier: GPL-2.0-only 2# 3# For a description of the syntax of this configuration file, 4# see Documentation/kbuild/kconfig-language.rst. 5# 6 7config 64BIT 8 bool 9 10config 32BIT 11 bool 12 13config RISCV 14 def_bool y 15 select ACPI_GENERIC_GSI if ACPI 16 select ACPI_MCFG if (ACPI && PCI) 17 select ACPI_PPTT if ACPI 18 select ACPI_REDUCED_HARDWARE_ONLY if ACPI 19 select ACPI_RIMT if ACPI 20 select ACPI_SPCR_TABLE if ACPI 21 select ARCH_DMA_DEFAULT_COHERENT 22 select ARCH_ENABLE_HUGEPAGE_MIGRATION if HUGETLB_PAGE && MIGRATION 23 select ARCH_ENABLE_MEMORY_HOTPLUG if SPARSEMEM_VMEMMAP 24 select ARCH_ENABLE_SPLIT_PMD_PTLOCK if PGTABLE_LEVELS > 2 25 select ARCH_ENABLE_THP_MIGRATION if TRANSPARENT_HUGEPAGE 26 select ARCH_HAS_BINFMT_FLAT 27 select ARCH_HAS_CURRENT_STACK_POINTER 28 select ARCH_HAS_DEBUG_VIRTUAL if MMU 29 select ARCH_HAS_DEBUG_VM_PGTABLE 30 select ARCH_HAS_DEBUG_WX 31 select ARCH_HAS_ELF_CORE_EFLAGS if BINFMT_ELF && ELF_CORE 32 select ARCH_HAS_FAST_MULTIPLIER 33 select ARCH_HAS_FORTIFY_SOURCE 34 select ARCH_HAS_GCOV_PROFILE_ALL 35 select ARCH_HAS_GIGANTIC_PAGE 36 select ARCH_HAS_HW_PTE_YOUNG 37 select ARCH_HAS_KCOV 38 select ARCH_HAS_KERNEL_FPU_SUPPORT if 64BIT && FPU 39 select ARCH_HAS_MEMBARRIER_CALLBACKS 40 select ARCH_HAS_MEMBARRIER_SYNC_CORE 41 select ARCH_HAS_MMIOWB 42 select ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE 43 select ARCH_HAS_PMEM_API 44 select ARCH_HAS_PREEMPT_LAZY 45 select ARCH_HAS_PREPARE_SYNC_CORE_CMD 46 select ARCH_HAS_PTDUMP if MMU 47 select ARCH_HAS_PTE_SPECIAL 48 select ARCH_HAS_SET_DIRECT_MAP if MMU 49 select ARCH_HAS_SET_MEMORY if MMU 50 select ARCH_HAS_STRICT_KERNEL_RWX if MMU 51 select ARCH_HAS_STRICT_MODULE_RWX if MMU 52 select ARCH_HAS_SYNC_CORE_BEFORE_USERMODE 53 select ARCH_HAS_SYSCALL_WRAPPER 54 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST 55 select ARCH_HAS_UBSAN 56 select ARCH_HAS_VDSO_ARCH_DATA if HAVE_GENERIC_VDSO 57 select ARCH_HAVE_NMI_SAFE_CMPXCHG 58 select ARCH_KEEP_MEMBLOCK if ACPI 59 select ARCH_MHP_MEMMAP_ON_MEMORY_ENABLE if 64BIT && MMU 60 select ARCH_OPTIONAL_KERNEL_RWX if ARCH_HAS_STRICT_KERNEL_RWX 61 select ARCH_OPTIONAL_KERNEL_RWX_DEFAULT 62 select ARCH_STACKWALK 63 select ARCH_SUPPORTS_ATOMIC_RMW 64 # clang >= 17: https://github.com/llvm/llvm-project/commit/62fa708ceb027713b386c7e0efda994f8bdc27e2 65 select ARCH_SUPPORTS_CFI if (!CC_IS_CLANG || CLANG_VERSION >= 170000) 66 select ARCH_SUPPORTS_DEBUG_PAGEALLOC if MMU 67 select ARCH_SUPPORTS_HUGE_PFNMAP if TRANSPARENT_HUGEPAGE 68 select ARCH_SUPPORTS_HUGETLBFS if MMU 69 select ARCH_SUPPORTS_LTO_CLANG if CMODEL_MEDANY 70 select ARCH_SUPPORTS_LTO_CLANG_THIN 71 select ARCH_SUPPORTS_MSEAL_SYSTEM_MAPPINGS if 64BIT && MMU 72 select ARCH_SUPPORTS_PAGE_TABLE_CHECK if MMU 73 select ARCH_SUPPORTS_PER_VMA_LOCK if MMU 74 select ARCH_SUPPORTS_RT 75 select ARCH_SUPPORTS_SHADOW_CALL_STACK if HAVE_SHADOW_CALL_STACK 76 select ARCH_SUPPORTS_SCHED_MC if SMP 77 select ARCH_USE_CMPXCHG_LOCKREF if 64BIT 78 select ARCH_USE_MEMTEST 79 select ARCH_USE_QUEUED_RWLOCKS 80 select ARCH_USE_SYM_ANNOTATIONS 81 select ARCH_USES_CFI_TRAPS if CFI 82 select ARCH_WANT_BATCHED_UNMAP_TLB_FLUSH if MMU 83 select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU 84 select ARCH_WANT_FRAME_POINTERS 85 select ARCH_WANT_GENERAL_HUGETLB if !RISCV_ISA_SVNAPOT 86 select ARCH_WANT_HUGE_PMD_SHARE if 64BIT 87 select ARCH_WANT_LD_ORPHAN_WARN 88 select ARCH_WANT_OPTIMIZE_DAX_VMEMMAP 89 select ARCH_WANT_OPTIMIZE_HUGETLB_VMEMMAP 90 select ARCH_WANTS_NO_INSTR 91 select ARCH_WANTS_THP_SWAP if HAVE_ARCH_TRANSPARENT_HUGEPAGE 92 select ARCH_WEAK_RELEASE_ACQUIRE if ARCH_USE_QUEUED_SPINLOCKS 93 select BINFMT_FLAT_NO_DATA_START_OFFSET if !MMU 94 select BUILDTIME_TABLE_SORT if MMU 95 select CLINT_TIMER if RISCV_M_MODE 96 select CLONE_BACKWARDS 97 select COMMON_CLK 98 select CPU_NO_EFFICIENT_FFS if !RISCV_ISA_ZBB 99 select CPU_PM if CPU_IDLE || HIBERNATION || SUSPEND 100 select DYNAMIC_FTRACE if FUNCTION_TRACER 101 select EDAC_SUPPORT 102 select FRAME_POINTER if PERF_EVENTS || (FUNCTION_TRACER && !DYNAMIC_FTRACE) 103 select FTRACE_MCOUNT_USE_PATCHABLE_FUNCTION_ENTRY if DYNAMIC_FTRACE 104 select FUNCTION_ALIGNMENT_8B if DYNAMIC_FTRACE_WITH_CALL_OPS 105 select GENERIC_ARCH_TOPOLOGY 106 select GENERIC_ATOMIC64 if !64BIT 107 select GENERIC_CLOCKEVENTS_BROADCAST if SMP 108 select GENERIC_CPU_DEVICES 109 select GENERIC_CPU_VULNERABILITIES 110 select GENERIC_EARLY_IOREMAP 111 select GENERIC_ENTRY 112 select GENERIC_GETTIMEOFDAY if HAVE_GENERIC_VDSO && 64BIT 113 select GENERIC_IDLE_POLL_SETUP 114 select GENERIC_IOREMAP if MMU 115 select HAVE_IOREMAP_PROT if MMU 116 select GENERIC_IRQ_IPI if SMP 117 select GENERIC_IRQ_IPI_MUX if SMP 118 select GENERIC_IRQ_MULTI_HANDLER 119 select GENERIC_IRQ_SHOW 120 select GENERIC_IRQ_SHOW_LEVEL 121 select GENERIC_LIB_DEVMEM_IS_ALLOWED 122 select GENERIC_PENDING_IRQ if SMP 123 select GENERIC_PCI_IOMAP 124 select GENERIC_SCHED_CLOCK 125 select GENERIC_SMP_IDLE_THREAD 126 select GENERIC_TIME_VSYSCALL if GENERIC_GETTIMEOFDAY 127 select HARDIRQS_SW_RESEND 128 select HAS_IOPORT if MMU 129 select HAVE_ALIGNED_STRUCT_PAGE 130 select HAVE_ARCH_AUDITSYSCALL 131 select HAVE_ARCH_HUGE_VMALLOC if HAVE_ARCH_HUGE_VMAP 132 select HAVE_ARCH_HUGE_VMAP if MMU && 64BIT 133 select HAVE_ARCH_JUMP_LABEL 134 select HAVE_ARCH_JUMP_LABEL_RELATIVE 135 select HAVE_ARCH_KASAN if MMU && 64BIT 136 select HAVE_ARCH_KASAN_VMALLOC if MMU && 64BIT 137 select HAVE_ARCH_KFENCE if MMU && 64BIT 138 select HAVE_ARCH_KSTACK_ERASE 139 select HAVE_ARCH_KGDB 140 select HAVE_ARCH_KGDB_QXFER_PKT 141 select HAVE_ARCH_MMAP_RND_BITS if MMU 142 select HAVE_ARCH_MMAP_RND_COMPAT_BITS if COMPAT 143 select HAVE_ARCH_RANDOMIZE_KSTACK_OFFSET 144 select HAVE_ARCH_SECCOMP_FILTER 145 select HAVE_ARCH_SOFT_DIRTY if 64BIT && MMU && RISCV_ISA_SVRSW60T59B 146 select HAVE_ARCH_THREAD_STRUCT_WHITELIST 147 select HAVE_ARCH_TRACEHOOK 148 select HAVE_ARCH_TRANSPARENT_HUGEPAGE if 64BIT && MMU 149 select HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD if 64BIT && MMU 150 select HAVE_ARCH_USERFAULTFD_MINOR if 64BIT && USERFAULTFD 151 select HAVE_ARCH_USERFAULTFD_WP if 64BIT && MMU && USERFAULTFD && RISCV_ISA_SVRSW60T59B 152 select HAVE_ARCH_VMAP_STACK if MMU && 64BIT 153 select HAVE_ASM_MODVERSIONS 154 select HAVE_CONTEXT_TRACKING_USER 155 select HAVE_DEBUG_KMEMLEAK 156 select HAVE_DMA_CONTIGUOUS if MMU 157 select HAVE_DYNAMIC_FTRACE if MMU && (CLANG_SUPPORTS_DYNAMIC_FTRACE || GCC_SUPPORTS_DYNAMIC_FTRACE) 158 select FUNCTION_ALIGNMENT_4B if HAVE_DYNAMIC_FTRACE && RISCV_ISA_C 159 select HAVE_DYNAMIC_FTRACE_WITH_DIRECT_CALLS if HAVE_DYNAMIC_FTRACE_WITH_CALL_OPS 160 select HAVE_DYNAMIC_FTRACE_WITH_CALL_OPS if (DYNAMIC_FTRACE_WITH_ARGS && !CFI) 161 select HAVE_DYNAMIC_FTRACE_WITH_ARGS if HAVE_DYNAMIC_FTRACE 162 select HAVE_FTRACE_GRAPH_FUNC 163 select HAVE_FUNCTION_GRAPH_TRACER if HAVE_DYNAMIC_FTRACE_WITH_ARGS 164 select HAVE_FUNCTION_GRAPH_FREGS 165 select HAVE_FUNCTION_TRACER if HAVE_DYNAMIC_FTRACE 166 select HAVE_EBPF_JIT if MMU 167 select HAVE_GENERIC_TIF_BITS 168 select HAVE_GUP_FAST if MMU 169 select HAVE_FUNCTION_ARG_ACCESS_API 170 select HAVE_FUNCTION_ERROR_INJECTION 171 select HAVE_GCC_PLUGINS 172 select HAVE_GENERIC_VDSO if MMU 173 select HAVE_IRQ_TIME_ACCOUNTING 174 select HAVE_KERNEL_BZIP2 if !EFI_ZBOOT 175 select HAVE_KERNEL_GZIP if !EFI_ZBOOT 176 select HAVE_KERNEL_LZ4 if !EFI_ZBOOT 177 select HAVE_KERNEL_LZMA if !EFI_ZBOOT 178 select HAVE_KERNEL_LZO if !EFI_ZBOOT 179 select HAVE_KERNEL_UNCOMPRESSED if !EFI_ZBOOT 180 select HAVE_KERNEL_ZSTD if !EFI_ZBOOT 181 select HAVE_KERNEL_XZ if !EFI_ZBOOT 182 select HAVE_KPROBES 183 select HAVE_KRETPROBES 184 # https://github.com/ClangBuiltLinux/linux/issues/1881 185 select HAVE_LD_DEAD_CODE_DATA_ELIMINATION if !LD_IS_LLD 186 select HAVE_MOVE_PMD 187 select HAVE_MOVE_PUD 188 select HAVE_PAGE_SIZE_4KB 189 select HAVE_PCI 190 select HAVE_PERF_EVENTS 191 select HAVE_PERF_REGS 192 select HAVE_PERF_USER_STACK_DUMP 193 select HAVE_POSIX_CPU_TIMERS_TASK_WORK 194 select HAVE_PREEMPT_DYNAMIC_KEY 195 select HAVE_REGS_AND_STACK_ACCESS_API 196 select HAVE_RETHOOK 197 select HAVE_RSEQ 198 select HAVE_RUST if RUSTC_SUPPORTS_RISCV && CC_IS_CLANG 199 select HAVE_SAMPLE_FTRACE_DIRECT 200 select HAVE_SAMPLE_FTRACE_DIRECT_MULTI 201 select HAVE_STACKPROTECTOR 202 select HAVE_SYSCALL_TRACEPOINTS 203 select HOTPLUG_PARALLEL if HOTPLUG_CPU 204 select IRQ_DOMAIN 205 select IRQ_FORCED_THREADING 206 select KASAN_VMALLOC if KASAN 207 select LOCK_MM_AND_FIND_VMA 208 select MMU_GATHER_RCU_TABLE_FREE if SMP && MMU 209 select MODULES_USE_ELF_RELA if MODULES 210 select OF 211 select OF_EARLY_FLATTREE 212 select OF_IRQ 213 select PCI_DOMAINS_GENERIC if PCI 214 select PCI_ECAM if (ACPI && PCI) 215 select PCI_MSI if PCI 216 select RELOCATABLE if !MMU && !PHYS_RAM_BASE_FIXED 217 select RISCV_ALTERNATIVE 218 select RISCV_APLIC 219 select RISCV_IMSIC 220 select RISCV_INTC 221 select RISCV_TIMER if RISCV_SBI 222 select SIFIVE_PLIC 223 select SPARSE_IRQ 224 select SYSCTL_EXCEPTION_TRACE 225 select THREAD_INFO_IN_TASK 226 select TRACE_IRQFLAGS_SUPPORT 227 select UACCESS_MEMCPY if !MMU 228 select VDSO_GETRANDOM if HAVE_GENERIC_VDSO && 64BIT 229 select USER_STACKTRACE_SUPPORT 230 select ZONE_DMA32 if 64BIT 231 232config RUSTC_SUPPORTS_RISCV 233 def_bool y 234 depends on 64BIT 235 236config CLANG_SUPPORTS_DYNAMIC_FTRACE 237 def_bool CC_IS_CLANG 238 # https://github.com/ClangBuiltLinux/linux/issues/1817 239 depends on AS_IS_GNU || (AS_IS_LLVM && (LD_IS_LLD || LD_VERSION >= 23600)) 240 241config GCC_SUPPORTS_DYNAMIC_FTRACE 242 def_bool CC_IS_GCC 243 depends on $(cc-option,-fpatchable-function-entry=8) 244 depends on CC_HAS_MIN_FUNCTION_ALIGNMENT || !RISCV_ISA_C 245 246config HAVE_SHADOW_CALL_STACK 247 def_bool $(cc-option,-fsanitize=shadow-call-stack) 248 # https://github.com/riscv-non-isa/riscv-elf-psabi-doc/commit/a484e843e6eeb51f0cb7b8819e50da6d2444d769 249 depends on $(ld-option,--no-relax-gp) 250 251# https://github.com/llvm/llvm-project/commit/bbc0f99f3bc96f1db16f649fc21dd18e5b0918f6 252config ARCH_HAS_BROKEN_DWARF5 253 def_bool y 254 # https://github.com/llvm/llvm-project/commit/1df5ea29b43690b6622db2cad7b745607ca4de6a 255 depends on AS_IS_LLVM && AS_VERSION < 180000 256 # https://github.com/llvm/llvm-project/commit/7ffabb61a5569444b5ac9322e22e5471cc5e4a77 257 depends on LD_IS_LLD && LLD_VERSION < 180000 258 259config ARCH_MMAP_RND_BITS_MIN 260 default 18 if 64BIT 261 default 8 262 263config ARCH_MMAP_RND_COMPAT_BITS_MIN 264 default 8 265 266# max bits determined by the following formula: 267# VA_BITS - PAGE_SHIFT - 3 268config ARCH_MMAP_RND_BITS_MAX 269 default 24 if 64BIT # SV39 based 270 default 17 271 272config ARCH_MMAP_RND_COMPAT_BITS_MAX 273 default 17 274 275# set if we run in machine mode, cleared if we run in supervisor mode 276config RISCV_M_MODE 277 bool "Build a kernel that runs in machine mode" 278 depends on !MMU 279 default y 280 help 281 Select this option if you want to run the kernel in M-mode, 282 without the assistance of any other firmware. 283 284# set if we are running in S-mode and can use SBI calls 285config RISCV_SBI 286 bool 287 depends on !RISCV_M_MODE 288 default y 289 290config MMU 291 bool "MMU-based Paged Memory Management Support" 292 default y 293 help 294 Select if you want MMU-based virtualised addressing space 295 support by paged memory management. If unsure, say 'Y'. 296 297config KASAN_SHADOW_OFFSET 298 hex 299 depends on KASAN_GENERIC 300 default 0xdfffffff00000000 if 64BIT 301 default 0xffffffff if 32BIT 302 303config ARCH_FLATMEM_ENABLE 304 def_bool !NUMA 305 306config ARCH_SPARSEMEM_ENABLE 307 def_bool y 308 depends on MMU 309 select SPARSEMEM_STATIC if 32BIT && SPARSEMEM 310 select SPARSEMEM_VMEMMAP_ENABLE if 64BIT 311 312config ARCH_SELECT_MEMORY_MODEL 313 def_bool ARCH_SPARSEMEM_ENABLE 314 315config ARCH_SUPPORTS_UPROBES 316 def_bool y 317 318config STACKTRACE_SUPPORT 319 def_bool y 320 321config GENERIC_BUG 322 def_bool y 323 depends on BUG 324 select GENERIC_BUG_RELATIVE_POINTERS if 64BIT 325 326config GENERIC_BUG_RELATIVE_POINTERS 327 bool 328 329config GENERIC_CALIBRATE_DELAY 330 def_bool y 331 332config GENERIC_CSUM 333 def_bool y 334 335config GENERIC_HWEIGHT 336 def_bool y 337 338config FIX_EARLYCON_MEM 339 def_bool MMU 340 341config ILLEGAL_POINTER_VALUE 342 hex 343 default 0 if 32BIT 344 default 0xdead000000000000 if 64BIT 345 346config PGTABLE_LEVELS 347 int 348 default 5 if 64BIT 349 default 2 350 351config LOCKDEP_SUPPORT 352 def_bool y 353 354config RISCV_DMA_NONCOHERENT 355 bool 356 select ARCH_HAS_DMA_PREP_COHERENT 357 select ARCH_HAS_SETUP_DMA_OPS 358 select ARCH_HAS_SYNC_DMA_FOR_CPU 359 select ARCH_HAS_SYNC_DMA_FOR_DEVICE 360 select DMA_BOUNCE_UNALIGNED_KMALLOC if SWIOTLB 361 362config RISCV_NONSTANDARD_CACHE_OPS 363 bool 364 help 365 This enables function pointer support for non-standard noncoherent 366 systems to handle cache management. 367 368config AS_HAS_INSN 369 def_bool $(as-instr,.insn 0x100000f) 370 371config AS_HAS_OPTION_ARCH 372 # https://github.com/llvm/llvm-project/commit/9e8ed3403c191ab9c4903e8eeb8f732ff8a43cb4 373 def_bool y 374 depends on $(as-instr, .option arch$(comma) +m) 375 376source "arch/riscv/Kconfig.socs" 377source "arch/riscv/Kconfig.errata" 378 379menu "Platform type" 380 381config NONPORTABLE 382 bool "Allow configurations that result in non-portable kernels" 383 help 384 RISC-V kernel binaries are compatible between all known systems 385 whenever possible, but there are some use cases that can only be 386 satisfied by configurations that result in kernel binaries that are 387 not portable between systems. 388 389 Selecting N does not guarantee kernels will be portable to all known 390 systems. Selecting any of the options guarded by NONPORTABLE will 391 result in kernel binaries that are unlikely to be portable between 392 systems. 393 394 If unsure, say N. 395 396choice 397 prompt "Base ISA" 398 default ARCH_RV64I 399 help 400 This selects the base ISA that this kernel will target and must match 401 the target platform. 402 403config ARCH_RV32I 404 bool "RV32I" 405 depends on NONPORTABLE 406 select 32BIT 407 select GENERIC_LIB_ASHLDI3 408 select GENERIC_LIB_ASHRDI3 409 select GENERIC_LIB_LSHRDI3 410 select GENERIC_LIB_UCMPDI2 411 412config ARCH_RV64I 413 bool "RV64I" 414 select 64BIT 415 select ARCH_SUPPORTS_INT128 if CC_HAS_INT128 416 select SWIOTLB if MMU 417 418endchoice 419 420# We must be able to map all physical memory into the kernel, but the compiler 421# is still a bit more efficient when generating code if it's setup in a manner 422# such that it can only map 2GiB of memory. 423choice 424 prompt "Kernel Code Model" 425 default CMODEL_MEDLOW if 32BIT 426 default CMODEL_MEDANY if 64BIT 427 428 config CMODEL_MEDLOW 429 bool "medium low code model" 430 config CMODEL_MEDANY 431 bool "medium any code model" 432endchoice 433 434config MODULE_SECTIONS 435 bool 436 select HAVE_MOD_ARCH_SPECIFIC 437 438config SMP 439 bool "Symmetric Multi-Processing" 440 help 441 This enables support for systems with more than one CPU. If 442 you say N here, the kernel will run on single and 443 multiprocessor machines, but will use only one CPU of a 444 multiprocessor machine. If you say Y here, the kernel will run 445 on many, but not all, single processor machines. On a single 446 processor machine, the kernel will run faster if you say N 447 here. 448 449 If you don't know what to do here, say N. 450 451config NR_CPUS 452 int "Maximum number of CPUs (2-512)" 453 depends on SMP 454 range 2 512 if !RISCV_SBI_V01 455 range 2 32 if RISCV_SBI_V01 && 32BIT 456 range 2 64 if RISCV_SBI_V01 && 64BIT 457 default "32" if 32BIT 458 default "64" if 64BIT 459 460config HOTPLUG_CPU 461 bool "Support for hot-pluggable CPUs" 462 depends on SMP 463 select GENERIC_IRQ_MIGRATION 464 help 465 466 Say Y here to experiment with turning CPUs off and on. CPUs 467 can be controlled through /sys/devices/system/cpu. 468 469 Say N if you want to disable CPU hotplug. 470 471choice 472 prompt "CPU Tuning" 473 default TUNE_GENERIC 474 475config TUNE_GENERIC 476 bool "generic" 477 478endchoice 479 480# Common NUMA Features 481config NUMA 482 bool "NUMA Memory Allocation and Scheduler Support" 483 depends on SMP && MMU 484 select ARCH_SUPPORTS_NUMA_BALANCING 485 select GENERIC_ARCH_NUMA 486 select HAVE_SETUP_PER_CPU_AREA 487 select NEED_PER_CPU_EMBED_FIRST_CHUNK 488 select NEED_PER_CPU_PAGE_FIRST_CHUNK 489 select OF_NUMA 490 select USE_PERCPU_NUMA_NODE_ID 491 help 492 Enable NUMA (Non-Uniform Memory Access) support. 493 494 The kernel will try to allocate memory used by a CPU on the 495 local memory of the CPU and add some more NUMA awareness to the kernel. 496 497config NODES_SHIFT 498 int "Maximum NUMA Nodes (as a power of 2)" 499 range 1 10 500 default "2" 501 depends on NUMA 502 help 503 Specify the maximum number of NUMA Nodes available on the target 504 system. Increases memory reserved to accommodate various tables. 505 506choice 507 prompt "RISC-V spinlock type" 508 default RISCV_COMBO_SPINLOCKS 509 510config RISCV_TICKET_SPINLOCKS 511 bool "Using ticket spinlock" 512 513config RISCV_QUEUED_SPINLOCKS 514 bool "Using queued spinlock" 515 depends on SMP && MMU && NONPORTABLE 516 select ARCH_USE_QUEUED_SPINLOCKS 517 help 518 The queued spinlock implementation requires the forward progress 519 guarantee of cmpxchg()/xchg() atomic operations: CAS with Zabha or 520 LR/SC with Ziccrse provide such guarantee. 521 522 Select this if and only if Zabha or Ziccrse is available on your 523 platform, RISCV_QUEUED_SPINLOCKS must not be selected for platforms 524 without one of those extensions. 525 526 If unsure, select RISCV_COMBO_SPINLOCKS, which will use qspinlocks 527 when supported and otherwise ticket spinlocks. 528 529config RISCV_COMBO_SPINLOCKS 530 bool "Using combo spinlock" 531 depends on SMP && MMU 532 select ARCH_USE_QUEUED_SPINLOCKS 533 help 534 Embed both queued spinlock and ticket lock so that the spinlock 535 implementation can be chosen at runtime. 536 537endchoice 538 539config RISCV_ALTERNATIVE 540 bool 541 help 542 This Kconfig allows the kernel to automatically patch the 543 erratum or cpufeature required by the execution platform at run 544 time. The code patching overhead is minimal, as it's only done 545 once at boot and once on each module load. 546 547config RISCV_ALTERNATIVE_EARLY 548 bool 549 depends on RISCV_ALTERNATIVE 550 help 551 Allows early patching of the kernel for special errata 552 553config RISCV_ISA_C 554 bool "Emit compressed instructions when building Linux" 555 default y 556 help 557 Adds "C" to the ISA subsets that the toolchain is allowed to emit 558 when building Linux, which results in compressed instructions in the 559 Linux binary. This option produces a kernel that will not run on 560 systems that do not support compressed instructions. 561 562 If you don't know what to do here, say Y. 563 564config RISCV_ISA_SUPM 565 bool "Supm extension for userspace pointer masking" 566 depends on 64BIT 567 default y 568 help 569 Add support for pointer masking in userspace (Supm) when the 570 underlying hardware extension (Smnpm or Ssnpm) is detected at boot. 571 572 If this option is disabled, userspace will be unable to use 573 the prctl(PR_{SET,GET}_TAGGED_ADDR_CTRL) API. 574 575config RISCV_ISA_SVNAPOT 576 bool "Svnapot extension support for supervisor mode NAPOT pages" 577 depends on 64BIT && MMU 578 depends on RISCV_ALTERNATIVE 579 default y 580 help 581 Enable support for the Svnapot ISA-extension when it is detected 582 at boot. 583 584 The Svnapot extension is used to mark contiguous PTEs as a range 585 of contiguous virtual-to-physical translations for a naturally 586 aligned power-of-2 (NAPOT) granularity larger than the base 4KB page 587 size. When HUGETLBFS is also selected this option unconditionally 588 allocates some memory for each NAPOT page size supported by the kernel. 589 When optimizing for low memory consumption and for platforms without 590 the Svnapot extension, it may be better to say N here. 591 592 If you don't know what to do here, say Y. 593 594config RISCV_ISA_SVPBMT 595 bool "Svpbmt extension support for supervisor mode page-based memory types" 596 depends on 64BIT && MMU 597 depends on RISCV_ALTERNATIVE 598 default y 599 help 600 Add support for the Svpbmt ISA-extension (Supervisor-mode: 601 page-based memory types) in the kernel when it is detected at boot. 602 603 The memory type for a page contains a combination of attributes 604 that indicate the cacheability, idempotency, and ordering 605 properties for access to that page. 606 607 The Svpbmt extension is only available on 64-bit cpus. 608 609 If you don't know what to do here, say Y. 610 611config TOOLCHAIN_HAS_V 612 bool 613 default y 614 depends on !64BIT || $(cc-option,-mabi=lp64 -march=rv64imv) 615 depends on !32BIT || $(cc-option,-mabi=ilp32 -march=rv32imv) 616 depends on LD_IS_LLD || LD_VERSION >= 23800 617 depends on AS_HAS_OPTION_ARCH 618 619config RISCV_ISA_V 620 bool "Vector extension support" 621 depends on TOOLCHAIN_HAS_V 622 depends on FPU 623 select DYNAMIC_SIGFRAME 624 default y 625 help 626 Add support for the Vector extension when it is detected at boot. 627 When this option is disabled, neither the kernel nor userspace may 628 use vector procedures. 629 630 If you don't know what to do here, say Y. 631 632config RISCV_ISA_V_DEFAULT_ENABLE 633 bool "Enable userspace Vector by default" 634 depends on RISCV_ISA_V 635 default y 636 help 637 Say Y here if you want to enable Vector in userspace by default. 638 Otherwise, userspace has to make explicit prctl() call to enable 639 Vector, or enable it via the sysctl interface. 640 641 If you don't know what to do here, say Y. 642 643config RISCV_ISA_V_UCOPY_THRESHOLD 644 int "Threshold size for vectorized user copies" 645 depends on RISCV_ISA_V 646 default 768 647 help 648 Prefer using vectorized copy_to_user()/copy_from_user() when the 649 workload size exceeds this value. 650 651config RISCV_ISA_V_PREEMPTIVE 652 bool "Run kernel-mode Vector with kernel preemption" 653 depends on PREEMPTION 654 depends on RISCV_ISA_V 655 default y 656 help 657 Usually, in-kernel SIMD routines are run with preemption disabled. 658 Functions which invoke long running SIMD thus must yield the core's 659 vector unit to prevent blocking other tasks for too long. 660 661 This config allows the kernel to run SIMD without explicitly disabling 662 preemption. Enabling this config will result in higher memory consumption 663 due to the allocation of per-task's kernel Vector context. 664 665config RISCV_ISA_ZAWRS 666 bool "Zawrs extension support for more efficient busy waiting" 667 depends on RISCV_ALTERNATIVE 668 default y 669 help 670 The Zawrs extension defines instructions to be used in polling loops 671 which allow a hart to enter a low-power state or to trap to the 672 hypervisor while waiting on a store to a memory location. Enable the 673 use of these instructions in the kernel when the Zawrs extension is 674 detected at boot. 675 676config TOOLCHAIN_HAS_ZABHA 677 bool 678 default y 679 depends on !64BIT || $(cc-option,-mabi=lp64 -march=rv64ima_zabha) 680 depends on !32BIT || $(cc-option,-mabi=ilp32 -march=rv32ima_zabha) 681 depends on AS_HAS_OPTION_ARCH 682 683config RISCV_ISA_ZABHA 684 bool "Zabha extension support for atomic byte/halfword operations" 685 depends on TOOLCHAIN_HAS_ZABHA 686 depends on RISCV_ALTERNATIVE 687 default y 688 help 689 Enable the use of the Zabha ISA-extension to implement kernel 690 byte/halfword atomic memory operations when it is detected at boot. 691 692 If you don't know what to do here, say Y. 693 694config TOOLCHAIN_HAS_ZACAS 695 bool 696 default y 697 depends on !64BIT || $(cc-option,-mabi=lp64 -march=rv64ima_zacas) 698 depends on !32BIT || $(cc-option,-mabi=ilp32 -march=rv32ima_zacas) 699 depends on AS_HAS_OPTION_ARCH 700 701config RISCV_ISA_ZACAS 702 bool "Zacas extension support for atomic CAS" 703 depends on RISCV_ALTERNATIVE 704 default y 705 help 706 Enable the use of the Zacas ISA-extension to implement kernel atomic 707 cmpxchg operations when it is detected at boot. 708 709 If you don't know what to do here, say Y. 710 711config TOOLCHAIN_HAS_ZBB 712 bool 713 default y 714 depends on !64BIT || $(cc-option,-mabi=lp64 -march=rv64ima_zbb) 715 depends on !32BIT || $(cc-option,-mabi=ilp32 -march=rv32ima_zbb) 716 depends on LD_IS_LLD || LD_VERSION >= 23900 717 depends on AS_HAS_OPTION_ARCH 718 719# This symbol indicates that the toolchain supports all v1.0 vector crypto 720# extensions, including Zvk*, Zvbb, and Zvbc. LLVM added all of these at once. 721# binutils added all except Zvkb, then added Zvkb. So we just check for Zvkb. 722config TOOLCHAIN_HAS_VECTOR_CRYPTO 723 def_bool $(as-instr, .option arch$(comma) +v$(comma) +zvkb) 724 depends on AS_HAS_OPTION_ARCH 725 726config TOOLCHAIN_HAS_ZBA 727 bool 728 default y 729 depends on !64BIT || $(cc-option,-mabi=lp64 -march=rv64ima_zba) 730 depends on !32BIT || $(cc-option,-mabi=ilp32 -march=rv32ima_zba) 731 depends on LD_IS_LLD || LD_VERSION >= 23900 732 depends on AS_HAS_OPTION_ARCH 733 734config RISCV_ISA_ZBA 735 bool "Zba extension support for bit manipulation instructions" 736 default y 737 help 738 Add support for enabling optimisations in the kernel when the Zba 739 extension is detected at boot. 740 741 The Zba extension provides instructions to accelerate the generation 742 of addresses that index into arrays of basic data types. 743 744 If you don't know what to do here, say Y. 745 746config RISCV_ISA_ZBB 747 bool "Zbb extension support for bit manipulation instructions" 748 depends on RISCV_ALTERNATIVE 749 default y 750 help 751 Add support for enabling optimisations in the kernel when the 752 Zbb extension is detected at boot. Some optimisations may 753 additionally depend on toolchain support for Zbb. 754 755 The Zbb extension provides instructions to accelerate a number 756 of bit-specific operations (count bit population, sign extending, 757 bitrotation, etc). 758 759 If you don't know what to do here, say Y. 760 761config TOOLCHAIN_HAS_ZBC 762 bool 763 default y 764 depends on !64BIT || $(cc-option,-mabi=lp64 -march=rv64ima_zbc) 765 depends on !32BIT || $(cc-option,-mabi=ilp32 -march=rv32ima_zbc) 766 depends on LD_IS_LLD || LD_VERSION >= 23900 767 depends on AS_HAS_OPTION_ARCH 768 769config RISCV_ISA_ZBC 770 bool "Zbc extension support for carry-less multiplication instructions" 771 depends on TOOLCHAIN_HAS_ZBC 772 depends on MMU 773 depends on RISCV_ALTERNATIVE 774 default y 775 help 776 Adds support to dynamically detect the presence of the Zbc 777 extension (carry-less multiplication) and enable its usage. 778 779 The Zbc extension could accelerate CRC (cyclic redundancy check) 780 calculations. 781 782 If you don't know what to do here, say Y. 783 784config TOOLCHAIN_HAS_ZBKB 785 bool 786 default y 787 depends on !64BIT || $(cc-option,-mabi=lp64 -march=rv64ima_zbkb) 788 depends on !32BIT || $(cc-option,-mabi=ilp32 -march=rv32ima_zbkb) 789 depends on LD_IS_LLD || LD_VERSION >= 23900 790 depends on AS_HAS_OPTION_ARCH 791 792config RISCV_ISA_ZBKB 793 bool "Zbkb extension support for bit manipulation instructions" 794 depends on TOOLCHAIN_HAS_ZBKB 795 depends on RISCV_ALTERNATIVE 796 default y 797 help 798 Adds support to dynamically detect the presence of the ZBKB 799 extension (bit manipulation for cryptography) and enable its usage. 800 801 The Zbkb extension provides instructions to accelerate a number 802 of common cryptography operations (pack, zip, etc). 803 804 If you don't know what to do here, say Y. 805 806config RISCV_ISA_ZICBOM 807 bool "Zicbom extension support for non-coherent DMA operation" 808 depends on MMU 809 depends on RISCV_ALTERNATIVE 810 default y 811 select RISCV_DMA_NONCOHERENT 812 select DMA_DIRECT_REMAP 813 help 814 Add support for the Zicbom extension (Cache Block Management 815 Operations) and enable its use in the kernel when it is detected 816 at boot. 817 818 The Zicbom extension can be used to handle for example 819 non-coherent DMA support on devices that need it. 820 821 If you don't know what to do here, say Y. 822 823config RISCV_ISA_ZICBOZ 824 bool "Zicboz extension support for faster zeroing of memory" 825 depends on RISCV_ALTERNATIVE 826 default y 827 help 828 Enable the use of the Zicboz extension (cbo.zero instruction) 829 in the kernel when it is detected at boot. 830 831 The Zicboz extension is used for faster zeroing of memory. 832 833 If you don't know what to do here, say Y. 834 835config RISCV_ISA_ZICBOP 836 bool "Zicbop extension support for cache block prefetch" 837 depends on MMU 838 depends on RISCV_ALTERNATIVE 839 default y 840 help 841 Adds support to dynamically detect the presence of the ZICBOP 842 extension (Cache Block Prefetch Operations) and enable its 843 usage. 844 845 The Zicbop extension can be used to prefetch cache blocks for 846 read/write fetch. 847 848 If you don't know what to do here, say Y. 849 850config RISCV_ISA_SVRSW60T59B 851 bool "Svrsw60t59b extension support for using PTE bits 60 and 59" 852 depends on MMU && 64BIT 853 depends on RISCV_ALTERNATIVE 854 default y 855 help 856 Adds support to dynamically detect the presence of the Svrsw60t59b 857 extension and enable its usage. 858 859 The Svrsw60t59b extension allows to free the PTE reserved bits 60 860 and 59 for software to use. 861 862 If you don't know what to do here, say Y. 863 864config TOOLCHAIN_NEEDS_EXPLICIT_ZICSR_ZIFENCEI 865 def_bool y 866 # https://sourceware.org/git/?p=binutils-gdb.git;a=commit;h=aed44286efa8ae8717a77d94b51ac3614e2ca6dc 867 # https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=98416dbb0a62579d4a7a4a76bab51b5b52fec2cd 868 depends on AS_IS_GNU && AS_VERSION >= 23600 869 help 870 Binutils-2.38 and GCC-12.1.0 bumped the default ISA spec to the newer 871 20191213 version, which moves some instructions from the I extension to 872 the Zicsr and Zifencei extensions. This requires explicitly specifying 873 Zicsr and Zifencei when binutils >= 2.38 or GCC >= 12.1.0. Zicsr 874 and Zifencei are supported in binutils from version 2.36 onwards. 875 To make life easier, and avoid forcing toolchains that default to a 876 newer ISA spec to version 2.2, relax the check to binutils >= 2.36. 877 For clang < 17 or GCC < 11.3.0, for which this is not possible or need 878 special treatment, this is dealt with in TOOLCHAIN_NEEDS_OLD_ISA_SPEC. 879 880config TOOLCHAIN_NEEDS_OLD_ISA_SPEC 881 def_bool y 882 depends on TOOLCHAIN_NEEDS_EXPLICIT_ZICSR_ZIFENCEI 883 # https://github.com/llvm/llvm-project/commit/22e199e6afb1263c943c0c0d4498694e15bf8a16 884 # https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=d29f5d6ab513c52fd872f532c492e35ae9fd6671 885 depends on (CC_IS_CLANG && CLANG_VERSION < 170000) || (CC_IS_GCC && GCC_VERSION < 110300) 886 help 887 Certain versions of clang and GCC do not support zicsr and zifencei via 888 -march. This option causes an older ISA spec compatible with these older 889 versions of clang and GCC to be passed to GAS, which has the same result 890 as passing zicsr and zifencei to -march. 891 892config FPU 893 bool "FPU support" 894 default y 895 help 896 Add support for floating point operations when an FPU is detected at 897 boot. When this option is disabled, neither the kernel nor userspace 898 may use the floating point unit. 899 900 If you don't know what to do here, say Y. 901 902config IRQ_STACKS 903 bool "Independent irq & softirq stacks" if EXPERT 904 default y 905 select HAVE_IRQ_EXIT_ON_IRQ_STACK 906 select HAVE_SOFTIRQ_ON_OWN_STACK 907 help 908 Add independent irq & softirq stacks for percpu to prevent kernel stack 909 overflows. We may save some memory footprint by disabling IRQ_STACKS. 910 911config THREAD_SIZE_ORDER 912 int "Kernel stack size (in power-of-two numbers of page size)" if VMAP_STACK && EXPERT 913 range 0 4 914 default 1 if 32BIT 915 default 2 916 help 917 Specify the Pages of thread stack size (from 4KB to 64KB), which also 918 affects irq stack size, which is equal to thread stack size. 919 920config RISCV_MISALIGNED 921 bool 922 help 923 Embed support for detecting and emulating misaligned 924 scalar or vector loads and stores. 925 926config RISCV_SCALAR_MISALIGNED 927 bool 928 select RISCV_MISALIGNED 929 select SYSCTL_ARCH_UNALIGN_ALLOW 930 help 931 Embed support for emulating misaligned loads and stores. 932 933config RISCV_VECTOR_MISALIGNED 934 bool 935 select RISCV_MISALIGNED 936 depends on RISCV_ISA_V 937 help 938 Enable detecting support for vector misaligned loads and stores. 939 940config RISCV_SBI_FWFT_DELEGATE_MISALIGNED 941 bool "Request firmware delegation of unaligned access exceptions" 942 depends on RISCV_SBI 943 depends on NONPORTABLE 944 help 945 Use SBI FWFT to request delegation of load address misaligned and 946 store address misaligned exceptions, if possible, and prefer Linux 947 kernel emulation of these accesses to firmware emulation. 948 949 Unfortunately, Linux's emulation is still incomplete. Namely, it 950 currently does not handle vector instructions and KVM guest accesses. 951 On platforms where these accesses would have been handled by firmware, 952 enabling this causes unexpected kernel oopses, userspaces crashes and 953 KVM guest crashes. If you are sure that these are not a problem for 954 your platform, you can say Y here, which may improve performance. 955 956 Saying N here will not worsen emulation support for unaligned accesses 957 even in the case where the firmware also has incomplete support. It 958 simply keeps the firmware's emulation enabled. 959 960 If you don't know what to do here, say N. 961 962choice 963 prompt "Unaligned Accesses Support" 964 default RISCV_PROBE_UNALIGNED_ACCESS 965 help 966 This determines the level of support for unaligned accesses. This 967 information is used by the kernel to perform optimizations. It is also 968 exposed to user space via the hwprobe syscall. The hardware will be 969 probed at boot by default. 970 971config RISCV_PROBE_UNALIGNED_ACCESS 972 bool "Probe for hardware unaligned access support" 973 select RISCV_SCALAR_MISALIGNED 974 help 975 During boot, the kernel will run a series of tests to determine the 976 speed of unaligned accesses. This probing will dynamically determine 977 the speed of unaligned accesses on the underlying system. If unaligned 978 memory accesses trap into the kernel as they are not supported by the 979 system, the kernel will emulate the unaligned accesses to preserve the 980 UABI. 981 982config RISCV_EMULATED_UNALIGNED_ACCESS 983 bool "Emulate unaligned access where system support is missing" 984 select RISCV_SCALAR_MISALIGNED 985 help 986 If unaligned memory accesses trap into the kernel as they are not 987 supported by the system, the kernel will emulate the unaligned 988 accesses to preserve the UABI. When the underlying system does support 989 unaligned accesses, the unaligned accesses are assumed to be slow. 990 991config RISCV_SLOW_UNALIGNED_ACCESS 992 bool "Assume the system supports slow unaligned memory accesses" 993 depends on NONPORTABLE 994 help 995 Assume that the system supports slow unaligned memory accesses. The 996 kernel and userspace programs may not be able to run at all on systems 997 that do not support unaligned memory accesses. 998 999config RISCV_EFFICIENT_UNALIGNED_ACCESS 1000 bool "Assume the system supports fast unaligned memory accesses" 1001 depends on NONPORTABLE 1002 select DCACHE_WORD_ACCESS if MMU 1003 select HAVE_EFFICIENT_UNALIGNED_ACCESS 1004 help 1005 Assume that the system supports fast unaligned memory accesses. When 1006 enabled, this option improves the performance of the kernel on such 1007 systems. However, the kernel and userspace programs will run much more 1008 slowly, or will not be able to run at all, on systems that do not 1009 support efficient unaligned memory accesses. 1010 1011endchoice 1012 1013choice 1014 prompt "Vector unaligned Accesses Support" 1015 depends on RISCV_ISA_V 1016 default RISCV_PROBE_VECTOR_UNALIGNED_ACCESS 1017 help 1018 This determines the level of support for vector unaligned accesses. This 1019 information is used by the kernel to perform optimizations. It is also 1020 exposed to user space via the hwprobe syscall. The hardware will be 1021 probed at boot by default. 1022 1023config RISCV_PROBE_VECTOR_UNALIGNED_ACCESS 1024 bool "Probe speed of vector unaligned accesses" 1025 select RISCV_VECTOR_MISALIGNED 1026 depends on RISCV_ISA_V 1027 help 1028 During boot, the kernel will run a series of tests to determine the 1029 speed of vector unaligned accesses if they are supported. This probing 1030 will dynamically determine the speed of vector unaligned accesses on 1031 the underlying system if they are supported. 1032 1033config RISCV_SLOW_VECTOR_UNALIGNED_ACCESS 1034 bool "Assume the system supports slow vector unaligned memory accesses" 1035 depends on NONPORTABLE 1036 help 1037 Assume that the system supports slow vector unaligned memory accesses. The 1038 kernel and userspace programs may not be able to run at all on systems 1039 that do not support unaligned memory accesses. 1040 1041config RISCV_EFFICIENT_VECTOR_UNALIGNED_ACCESS 1042 bool "Assume the system supports fast vector unaligned memory accesses" 1043 depends on NONPORTABLE 1044 help 1045 Assume that the system supports fast vector unaligned memory accesses. When 1046 enabled, this option improves the performance of the kernel on such 1047 systems. However, the kernel and userspace programs will run much more 1048 slowly, or will not be able to run at all, on systems that do not 1049 support efficient unaligned memory accesses. 1050 1051endchoice 1052 1053source "arch/riscv/Kconfig.vendor" 1054 1055endmenu # "Platform type" 1056 1057menu "Kernel features" 1058 1059source "kernel/Kconfig.hz" 1060 1061config RISCV_SBI_V01 1062 bool "SBI v0.1 support" 1063 depends on RISCV_SBI 1064 help 1065 This config allows kernel to use SBI v0.1 APIs. This will be 1066 deprecated in future once legacy M-mode software are no longer in use. 1067 1068config RISCV_BOOT_SPINWAIT 1069 bool "Spinwait booting method" 1070 depends on SMP 1071 default y if RISCV_SBI_V01 || RISCV_M_MODE 1072 help 1073 This enables support for booting Linux via spinwait method. In the 1074 spinwait method, all cores randomly jump to Linux. One of the cores 1075 gets chosen via lottery and all other keep spinning on a percpu 1076 variable. This method cannot support CPU hotplug and sparse hartid 1077 scheme. It should be only enabled for M-mode Linux or platforms relying 1078 on older firmware without SBI HSM extension. All other platforms should 1079 rely on ordered booting via SBI HSM extension which gets chosen 1080 dynamically at runtime if the firmware supports it. 1081 1082 Since spinwait is incompatible with sparse hart IDs, it requires 1083 NR_CPUS be large enough to contain the physical hart ID of the first 1084 hart to enter Linux. 1085 1086 If unsure what to do here, say N. 1087 1088config ARCH_SUPPORTS_KEXEC 1089 def_bool y 1090 1091config ARCH_SELECTS_KEXEC 1092 def_bool y 1093 depends on KEXEC 1094 select HOTPLUG_CPU if SMP 1095 1096config ARCH_SUPPORTS_KEXEC_FILE 1097 def_bool 64BIT 1098 1099config ARCH_SELECTS_KEXEC_FILE 1100 def_bool y 1101 depends on KEXEC_FILE 1102 select HAVE_IMA_KEXEC if IMA 1103 select KEXEC_ELF 1104 1105config ARCH_SUPPORTS_KEXEC_PURGATORY 1106 def_bool ARCH_SUPPORTS_KEXEC_FILE 1107 1108config ARCH_SUPPORTS_CRASH_DUMP 1109 def_bool y 1110 1111config ARCH_DEFAULT_CRASH_DUMP 1112 def_bool y 1113 1114config ARCH_HAS_GENERIC_CRASHKERNEL_RESERVATION 1115 def_bool CRASH_RESERVE 1116 1117config COMPAT 1118 bool "Kernel support for 32-bit U-mode" 1119 default 64BIT 1120 depends on 64BIT && MMU 1121 help 1122 This option enables support for a 32-bit U-mode running under a 64-bit 1123 kernel at S-mode. riscv32-specific components such as system calls, 1124 the user helper functions (vdso), signal rt_frame functions and the 1125 ptrace interface are handled appropriately by the kernel. 1126 1127 If you want to execute 32-bit userspace applications, say Y. 1128 1129config PARAVIRT 1130 bool "Enable paravirtualization code" 1131 depends on RISCV_SBI 1132 select HAVE_PV_STEAL_CLOCK_GEN 1133 help 1134 This changes the kernel so it can modify itself when it is run 1135 under a hypervisor, potentially improving performance significantly 1136 over full virtualization. 1137 1138config PARAVIRT_TIME_ACCOUNTING 1139 bool "Paravirtual steal time accounting" 1140 depends on PARAVIRT 1141 help 1142 Select this option to enable fine granularity task steal time 1143 accounting. Time spent executing other tasks in parallel with 1144 the current vCPU is discounted from the vCPU power. To account for 1145 that, there can be a small performance impact. 1146 1147 If in doubt, say N here. 1148 1149config RELOCATABLE 1150 bool "Build a relocatable kernel" 1151 select MODULE_SECTIONS if MODULES 1152 select ARCH_VMLINUX_NEEDS_RELOCS 1153 help 1154 This builds a kernel as a Position Independent Executable (PIE), 1155 which retains all relocation metadata required to relocate the 1156 kernel binary at runtime to a different virtual address than the 1157 address it was linked at. 1158 Since RISCV uses the RELA relocation format, this requires a 1159 relocation pass at runtime even if the kernel is loaded at the 1160 same address it was linked at. 1161 1162 If unsure, say N. 1163 1164config RANDOMIZE_BASE 1165 bool "Randomize the address of the kernel image" 1166 select RELOCATABLE 1167 depends on MMU && 64BIT 1168 help 1169 Randomizes the virtual address at which the kernel image is 1170 loaded, as a security feature that deters exploit attempts 1171 relying on knowledge of the location of kernel internals. 1172 1173 It is the bootloader's job to provide entropy, by passing a 1174 random u64 value in /chosen/kaslr-seed at kernel entry. 1175 1176 When booting via the UEFI stub, it will invoke the firmware's 1177 EFI_RNG_PROTOCOL implementation (if available) to supply entropy 1178 to the kernel proper. In addition, it will randomise the physical 1179 location of the kernel Image as well. 1180 1181 If unsure, say N. 1182 1183config RISCV_USER_CFI 1184 def_bool y 1185 bool "riscv userspace control flow integrity" 1186 depends on 64BIT && MMU && \ 1187 $(cc-option,-mabi=lp64 -march=rv64ima_zicfiss_zicfilp -fcf-protection=full) 1188 depends on RISCV_ALTERNATIVE 1189 select RISCV_SBI 1190 select ARCH_HAS_USER_SHADOW_STACK 1191 select ARCH_USES_HIGH_VMA_FLAGS 1192 select DYNAMIC_SIGFRAME 1193 help 1194 Provides CPU-assisted control flow integrity to userspace tasks. 1195 Control flow integrity is provided by implementing shadow stack for 1196 backward edge and indirect branch tracking for forward edge. 1197 Shadow stack protection is a hardware feature that detects function 1198 return address corruption. This helps mitigate ROP attacks. 1199 Indirect branch tracking enforces that all indirect branches must land 1200 on a landing pad instruction else CPU will fault. This mitigates against 1201 JOP / COP attacks. Applications must be enabled to use it, and old userspace 1202 does not get protection "for free". 1203 default y. 1204 1205endmenu # "Kernel features" 1206 1207menu "Boot options" 1208 1209config CMDLINE 1210 string "Built-in kernel command line" 1211 help 1212 For most platforms, the arguments for the kernel's command line 1213 are provided at run-time, during boot. However, there are cases 1214 where either no arguments are being provided or the provided 1215 arguments are insufficient or even invalid. 1216 1217 When that occurs, it is possible to define a built-in command 1218 line here and choose how the kernel should use it later on. 1219 1220choice 1221 prompt "Built-in command line usage" 1222 depends on CMDLINE != "" 1223 default CMDLINE_FALLBACK 1224 help 1225 Choose how the kernel will handle the provided built-in command 1226 line. 1227 1228config CMDLINE_FALLBACK 1229 bool "Use bootloader kernel arguments if available" 1230 help 1231 Use the built-in command line as fallback in case we get nothing 1232 during boot. This is the default behaviour. 1233 1234config CMDLINE_EXTEND 1235 bool "Extend bootloader kernel arguments" 1236 help 1237 The built-in command line will be appended to the command- 1238 line arguments provided during boot. This is useful in 1239 cases where the provided arguments are insufficient and 1240 you don't want to or cannot modify them. 1241 1242config CMDLINE_FORCE 1243 bool "Always use the default kernel command string" 1244 help 1245 Always use the built-in command line, even if we get one during 1246 boot. This is useful in case you need to override the provided 1247 command line on systems where you don't have or want control 1248 over it. 1249 1250endchoice 1251 1252config EFI_STUB 1253 bool 1254 1255config EFI 1256 bool "UEFI runtime support" 1257 depends on OF 1258 depends on MMU 1259 default y 1260 select ARCH_SUPPORTS_ACPI if 64BIT 1261 select EFI_GENERIC_STUB 1262 select EFI_PARAMS_FROM_FDT 1263 select EFI_RUNTIME_WRAPPERS 1264 select EFI_STUB 1265 select LIBFDT 1266 select RISCV_ISA_C 1267 select UCS2_STRING 1268 help 1269 This option provides support for runtime services provided 1270 by UEFI firmware (such as non-volatile variables, realtime 1271 clock, and platform reset). A UEFI stub is also provided to 1272 allow the kernel to be booted as an EFI application. This 1273 is only useful on systems that have UEFI firmware. 1274 1275config DMI 1276 bool "Enable support for SMBIOS (DMI) tables" 1277 depends on EFI 1278 default y 1279 help 1280 This enables SMBIOS/DMI feature for systems. 1281 1282 This option is only useful on systems that have UEFI firmware. 1283 However, even with this option, the resultant kernel should 1284 continue to boot on existing non-UEFI platforms. 1285 1286config CC_HAVE_STACKPROTECTOR_TLS 1287 def_bool $(cc-option,-mstack-protector-guard=tls -mstack-protector-guard-reg=tp -mstack-protector-guard-offset=0) 1288 1289config STACKPROTECTOR_PER_TASK 1290 def_bool y 1291 depends on !RANDSTRUCT 1292 depends on STACKPROTECTOR && CC_HAVE_STACKPROTECTOR_TLS 1293 1294config PHYS_RAM_BASE_FIXED 1295 bool "Explicitly specified physical RAM address" 1296 depends on NONPORTABLE 1297 default n 1298 1299config PHYS_RAM_BASE 1300 hex "Platform Physical RAM address" 1301 depends on PHYS_RAM_BASE_FIXED 1302 default "0x80000000" 1303 help 1304 This is the physical address of RAM in the system. It has to be 1305 explicitly specified to run early relocations of read-write data 1306 from flash to RAM. 1307 1308config RISCV_ISA_FALLBACK 1309 bool "Permit falling back to parsing riscv,isa for extension support by default" 1310 default y 1311 help 1312 Parsing the "riscv,isa" devicetree property has been deprecated and 1313 replaced by a list of explicitly defined strings. For compatibility 1314 with existing platforms, the kernel will fall back to parsing the 1315 "riscv,isa" property if the replacements are not found. 1316 1317 Selecting N here will result in a kernel that does not use the 1318 fallback, unless the commandline "riscv_isa_fallback" parameter is 1319 present. 1320 1321 Please see the dt-binding, located at 1322 Documentation/devicetree/bindings/riscv/extensions.yaml for details 1323 on the replacement properties, "riscv,isa-base" and 1324 "riscv,isa-extensions". 1325 1326config BUILTIN_DTB 1327 bool "Built-in device tree" 1328 depends on OF && NONPORTABLE 1329 select GENERIC_BUILTIN_DTB 1330 help 1331 Build a device tree into the Linux image. 1332 This option should be selected if no bootloader is being used. 1333 If unsure, say N. 1334 1335 1336config BUILTIN_DTB_NAME 1337 string "Built-in device tree source" 1338 depends on BUILTIN_DTB 1339 help 1340 DTS file path (without suffix, relative to arch/riscv/boot/dts) 1341 for the DTS file that will be used to produce the DTB linked into the 1342 kernel. 1343 1344endmenu # "Boot options" 1345 1346config PORTABLE 1347 bool 1348 default !NONPORTABLE 1349 select EFI 1350 select MMU 1351 select OF 1352 1353config ARCH_PROC_KCORE_TEXT 1354 def_bool y 1355 1356menu "Power management options" 1357 1358source "kernel/power/Kconfig" 1359 1360config ARCH_HIBERNATION_POSSIBLE 1361 def_bool y 1362 1363config ARCH_HIBERNATION_HEADER 1364 def_bool HIBERNATION 1365 1366config ARCH_SUSPEND_POSSIBLE 1367 def_bool y 1368 1369endmenu # "Power management options" 1370 1371menu "CPU Power Management" 1372 1373source "drivers/cpuidle/Kconfig" 1374 1375source "drivers/cpufreq/Kconfig" 1376 1377endmenu # "CPU Power Management" 1378 1379source "arch/riscv/kvm/Kconfig" 1380 1381source "drivers/acpi/Kconfig" 1382