1# SPDX-License-Identifier: GPL-2.0 2config SUPERH 3 def_bool y 4 select ARCH_32BIT_OFF_T 5 select ARCH_HAS_CPU_CACHE_ALIASING 6 select ARCH_HAVE_NMI_SAFE_CMPXCHG if (GUSA_RB || CPU_SH4A) 7 select ARCH_HAS_BINFMT_FLAT if !MMU 8 select ARCH_HAS_CPU_FINALIZE_INIT 9 select ARCH_HAS_CURRENT_STACK_POINTER 10 select ARCH_HAS_GIGANTIC_PAGE 11 select ARCH_HAS_GCOV_PROFILE_ALL 12 select ARCH_HAS_PTE_SPECIAL 13 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST 14 select ARCH_HIBERNATION_POSSIBLE if MMU 15 select ARCH_MIGHT_HAVE_PC_PARPORT 16 select ARCH_WANT_IPC_PARSE_VERSION 17 select ARCH_NEED_CMPXCHG_1_EMU 18 select CPU_NO_EFFICIENT_FFS 19 select DMA_DECLARE_COHERENT 20 select GENERIC_ATOMIC64 21 select GENERIC_CMOS_UPDATE if SH_SH03 || SH_DREAMCAST 22 select GENERIC_IDLE_POLL_SETUP 23 select GENERIC_IRQ_SHOW 24 select GENERIC_LIB_ASHLDI3 25 select GENERIC_LIB_ASHRDI3 26 select GENERIC_LIB_LSHRDI3 27 select GENERIC_PCI_IOMAP if PCI 28 select GENERIC_SCHED_CLOCK 29 select GENERIC_SMP_IDLE_THREAD 30 select GUP_GET_PXX_LOW_HIGH if X2TLB 31 select HAS_IOPORT if HAS_IOPORT_MAP 32 select GENERIC_IOREMAP if MMU 33 select HAVE_ARCH_AUDITSYSCALL 34 select HAVE_ARCH_KGDB 35 select HAVE_ARCH_SECCOMP_FILTER 36 select HAVE_ARCH_TRACEHOOK 37 select HAVE_DEBUG_BUGVERBOSE 38 select HAVE_DEBUG_KMEMLEAK 39 select HAVE_DYNAMIC_FTRACE 40 select HAVE_GUP_FAST if MMU 41 select HAVE_FUNCTION_GRAPH_TRACER 42 select HAVE_FUNCTION_TRACER 43 select HAVE_FTRACE_MCOUNT_RECORD 44 select HAVE_HW_BREAKPOINT 45 select HAVE_IOREMAP_PROT if MMU && !X2TLB 46 select HAVE_KERNEL_BZIP2 47 select HAVE_KERNEL_GZIP 48 select HAVE_KERNEL_LZMA 49 select HAVE_KERNEL_LZO 50 select HAVE_KERNEL_XZ 51 select HAVE_KPROBES 52 select HAVE_KRETPROBES 53 select HAVE_MIXED_BREAKPOINTS_REGS 54 select HAVE_MOD_ARCH_SPECIFIC if DWARF_UNWINDER 55 select HAVE_NMI 56 select HAVE_PATA_PLATFORM 57 select HAVE_PERF_EVENTS 58 select HAVE_REGS_AND_STACK_ACCESS_API 59 select HAVE_UID16 60 select HAVE_SOFTIRQ_ON_OWN_STACK if IRQSTACKS 61 select HAVE_STACKPROTECTOR 62 select HAVE_SYSCALL_TRACEPOINTS 63 select IRQ_FORCED_THREADING 64 select LOCK_MM_AND_FIND_VMA 65 select MODULES_USE_ELF_RELA 66 select NEED_SG_DMA_LENGTH 67 select NO_DMA if !MMU && !DMA_COHERENT 68 select NO_GENERIC_PCI_IOPORT_MAP if PCI 69 select OLD_SIGACTION 70 select OLD_SIGSUSPEND 71 select PCI_DOMAINS if PCI 72 select PERF_EVENTS 73 select PERF_USE_VMALLOC 74 select RTC_LIB 75 select SPARSE_IRQ 76 select TRACE_IRQFLAGS_SUPPORT 77 help 78 The SuperH is a RISC processor targeted for use in embedded systems 79 and consumer electronics; it was also used in the Sega Dreamcast 80 gaming console. The SuperH port has a home page at 81 <http://www.linux-sh.org/>. 82 83config GENERIC_BUG 84 def_bool y 85 depends on BUG 86 87config GENERIC_HWEIGHT 88 def_bool y 89 90config GENERIC_CALIBRATE_DELAY 91 bool 92 93config GENERIC_LOCKBREAK 94 def_bool y 95 depends on SMP && PREEMPTION 96 97config ARCH_SUSPEND_POSSIBLE 98 def_bool n 99 100config ARCH_HIBERNATION_POSSIBLE 101 def_bool n 102 103config SYS_SUPPORTS_APM_EMULATION 104 bool 105 select ARCH_SUSPEND_POSSIBLE 106 107config SYS_SUPPORTS_SMP 108 bool 109 110config SYS_SUPPORTS_NUMA 111 bool 112 113config STACKTRACE_SUPPORT 114 def_bool y 115 116config LOCKDEP_SUPPORT 117 def_bool y 118 119config ARCH_HAS_ILOG2_U32 120 def_bool n 121 122config ARCH_HAS_ILOG2_U64 123 def_bool n 124 125config NO_IOPORT_MAP 126 def_bool !PCI 127 depends on !SH_SHMIN && !SH_HP6XX && !SH_SOLUTION_ENGINE && \ 128 !SH_DREAMCAST 129 130config IO_TRAPPED 131 bool 132 133config SWAP_IO_SPACE 134 bool 135 136config DMA_COHERENT 137 bool 138 139config DMA_NONCOHERENT 140 def_bool !NO_DMA && !DMA_COHERENT 141 select ARCH_HAS_DMA_PREP_COHERENT 142 select ARCH_HAS_SYNC_DMA_FOR_DEVICE 143 select DMA_DIRECT_REMAP 144 145config PGTABLE_LEVELS 146 default 3 if X2TLB 147 default 2 148 149menu "System type" 150 151# 152# Processor families 153# 154config CPU_SH2 155 bool 156 select SH_INTC 157 158config CPU_SH2A 159 bool 160 select CPU_SH2 161 select UNCACHED_MAPPING 162 163config CPU_J2 164 bool 165 select CPU_SH2 166 select OF 167 select OF_EARLY_FLATTREE 168 169config CPU_SH3 170 bool 171 select CPU_HAS_INTEVT 172 select CPU_HAS_SR_RB 173 select SH_INTC 174 select SYS_SUPPORTS_SH_TMU 175 176config CPU_SH4 177 bool 178 select ARCH_SUPPORTS_HUGETLBFS if MMU 179 select CPU_HAS_INTEVT 180 select CPU_HAS_SR_RB 181 select CPU_HAS_FPU if !CPU_SH4AL_DSP 182 select SH_INTC 183 select SYS_SUPPORTS_SH_TMU 184 185config CPU_SH4A 186 bool 187 select CPU_SH4 188 189config CPU_SH4AL_DSP 190 bool 191 select CPU_SH4A 192 select CPU_HAS_DSP 193 194config CPU_SHX2 195 bool 196 197config CPU_SHX3 198 bool 199 select DMA_COHERENT 200 select SYS_SUPPORTS_SMP 201 select SYS_SUPPORTS_NUMA 202 203config ARCH_SHMOBILE 204 bool 205 select ARCH_SUSPEND_POSSIBLE 206 select PM 207 208config CPU_HAS_PMU 209 depends on CPU_SH4 || CPU_SH4A 210 default y 211 bool 212 213choice 214 prompt "Processor sub-type selection" 215 216# 217# Processor subtypes 218# 219 220# SH-2 Processor Support 221 222config CPU_SUBTYPE_SH7619 223 bool "Support SH7619 processor" 224 select CPU_SH2 225 select SYS_SUPPORTS_SH_CMT 226 227config CPU_SUBTYPE_J2 228 bool "Support J2 processor" 229 select CPU_J2 230 select SYS_SUPPORTS_SMP 231 select GENERIC_CLOCKEVENTS_BROADCAST if SMP 232 233# SH-2A Processor Support 234 235config CPU_SUBTYPE_SH7201 236 bool "Support SH7201 processor" 237 select CPU_SH2A 238 select CPU_HAS_FPU 239 select SYS_SUPPORTS_SH_MTU2 240 241config CPU_SUBTYPE_SH7203 242 bool "Support SH7203 processor" 243 select CPU_SH2A 244 select CPU_HAS_FPU 245 select SYS_SUPPORTS_SH_CMT 246 select SYS_SUPPORTS_SH_MTU2 247 select PINCTRL 248 249config CPU_SUBTYPE_SH7206 250 bool "Support SH7206 processor" 251 select CPU_SH2A 252 select SYS_SUPPORTS_SH_CMT 253 select SYS_SUPPORTS_SH_MTU2 254 255config CPU_SUBTYPE_SH7263 256 bool "Support SH7263 processor" 257 select CPU_SH2A 258 select CPU_HAS_FPU 259 select SYS_SUPPORTS_SH_CMT 260 select SYS_SUPPORTS_SH_MTU2 261 262config CPU_SUBTYPE_SH7264 263 bool "Support SH7264 processor" 264 select CPU_SH2A 265 select CPU_HAS_FPU 266 select SYS_SUPPORTS_SH_CMT 267 select SYS_SUPPORTS_SH_MTU2 268 select PINCTRL 269 270config CPU_SUBTYPE_SH7269 271 bool "Support SH7269 processor" 272 select CPU_SH2A 273 select CPU_HAS_FPU 274 select SYS_SUPPORTS_SH_CMT 275 select SYS_SUPPORTS_SH_MTU2 276 select PINCTRL 277 278config CPU_SUBTYPE_MXG 279 bool "Support MX-G processor" 280 select CPU_SH2A 281 select SYS_SUPPORTS_SH_MTU2 282 help 283 Select MX-G if running on an R8A03022BG part. 284 285# SH-3 Processor Support 286 287config CPU_SUBTYPE_SH7705 288 bool "Support SH7705 processor" 289 select CPU_SH3 290 291config CPU_SUBTYPE_SH7706 292 bool "Support SH7706 processor" 293 select CPU_SH3 294 help 295 Select SH7706 if you have a 133 Mhz SH-3 HD6417706 CPU. 296 297config CPU_SUBTYPE_SH7707 298 bool "Support SH7707 processor" 299 select CPU_SH3 300 help 301 Select SH7707 if you have a 60 Mhz SH-3 HD6417707 CPU. 302 303config CPU_SUBTYPE_SH7708 304 bool "Support SH7708 processor" 305 select CPU_SH3 306 help 307 Select SH7708 if you have a 60 Mhz SH-3 HD6417708S or 308 if you have a 100 Mhz SH-3 HD6417708R CPU. 309 310config CPU_SUBTYPE_SH7709 311 bool "Support SH7709 processor" 312 select CPU_SH3 313 help 314 Select SH7709 if you have a 80 Mhz SH-3 HD6417709 CPU. 315 316config CPU_SUBTYPE_SH7710 317 bool "Support SH7710 processor" 318 select CPU_SH3 319 select CPU_HAS_DSP 320 help 321 Select SH7710 if you have a SH3-DSP SH7710 CPU. 322 323config CPU_SUBTYPE_SH7712 324 bool "Support SH7712 processor" 325 select CPU_SH3 326 select CPU_HAS_DSP 327 help 328 Select SH7712 if you have a SH3-DSP SH7712 CPU. 329 330config CPU_SUBTYPE_SH7720 331 bool "Support SH7720 processor" 332 select CPU_SH3 333 select CPU_HAS_DSP 334 select SYS_SUPPORTS_SH_CMT 335 select USB_OHCI_SH if USB_OHCI_HCD 336 select PINCTRL 337 help 338 Select SH7720 if you have a SH3-DSP SH7720 CPU. 339 340config CPU_SUBTYPE_SH7721 341 bool "Support SH7721 processor" 342 select CPU_SH3 343 select CPU_HAS_DSP 344 select SYS_SUPPORTS_SH_CMT 345 select USB_OHCI_SH if USB_OHCI_HCD 346 help 347 Select SH7721 if you have a SH3-DSP SH7721 CPU. 348 349# SH-4 Processor Support 350 351config CPU_SUBTYPE_SH7750 352 bool "Support SH7750 processor" 353 select CPU_SH4 354 help 355 Select SH7750 if you have a 200 Mhz SH-4 HD6417750 CPU. 356 357config CPU_SUBTYPE_SH7091 358 bool "Support SH7091 processor" 359 select CPU_SH4 360 help 361 Select SH7091 if you have an SH-4 based Sega device (such as 362 the Dreamcast, Naomi, and Naomi 2). 363 364config CPU_SUBTYPE_SH7750R 365 bool "Support SH7750R processor" 366 select CPU_SH4 367 368config CPU_SUBTYPE_SH7750S 369 bool "Support SH7750S processor" 370 select CPU_SH4 371 372config CPU_SUBTYPE_SH7751 373 bool "Support SH7751 processor" 374 select CPU_SH4 375 help 376 Select SH7751 if you have a 166 Mhz SH-4 HD6417751 CPU, 377 or if you have a HD6417751R CPU. 378 379config CPU_SUBTYPE_SH7751R 380 bool "Support SH7751R processor" 381 select CPU_SH4 382 383config CPU_SUBTYPE_SH7760 384 bool "Support SH7760 processor" 385 select CPU_SH4 386 387# SH-4A Processor Support 388 389config CPU_SUBTYPE_SH7723 390 bool "Support SH7723 processor" 391 select CPU_SH4A 392 select CPU_SHX2 393 select ARCH_SHMOBILE 394 select ARCH_SPARSEMEM_ENABLE 395 select SYS_SUPPORTS_SH_CMT 396 select PINCTRL 397 help 398 Select SH7723 if you have an SH-MobileR2 CPU. 399 400config CPU_SUBTYPE_SH7724 401 bool "Support SH7724 processor" 402 select CPU_SH4A 403 select CPU_SHX2 404 select ARCH_SHMOBILE 405 select ARCH_SPARSEMEM_ENABLE 406 select SYS_SUPPORTS_SH_CMT 407 select PINCTRL 408 help 409 Select SH7724 if you have an SH-MobileR2R CPU. 410 411config CPU_SUBTYPE_SH7734 412 bool "Support SH7734 processor" 413 select CPU_SH4A 414 select CPU_SHX2 415 select PINCTRL 416 help 417 Select SH7734 if you have a SH4A SH7734 CPU. 418 419config CPU_SUBTYPE_SH7757 420 bool "Support SH7757 processor" 421 select CPU_SH4A 422 select CPU_SHX2 423 select PINCTRL 424 help 425 Select SH7757 if you have a SH4A SH7757 CPU. 426 427config CPU_SUBTYPE_SH7763 428 bool "Support SH7763 processor" 429 select CPU_SH4A 430 select USB_OHCI_SH if USB_OHCI_HCD 431 help 432 Select SH7763 if you have a SH4A SH7763(R5S77631) CPU. 433 434config CPU_SUBTYPE_SH7770 435 bool "Support SH7770 processor" 436 select CPU_SH4A 437 438config CPU_SUBTYPE_SH7780 439 bool "Support SH7780 processor" 440 select CPU_SH4A 441 442config CPU_SUBTYPE_SH7785 443 bool "Support SH7785 processor" 444 select CPU_SH4A 445 select CPU_SHX2 446 select ARCH_SPARSEMEM_ENABLE 447 select SYS_SUPPORTS_NUMA 448 select PINCTRL 449 450config CPU_SUBTYPE_SH7786 451 bool "Support SH7786 processor" 452 select CPU_SH4A 453 select CPU_SHX3 454 select CPU_HAS_PTEAEX 455 select GENERIC_CLOCKEVENTS_BROADCAST if SMP 456 select USB_OHCI_SH if USB_OHCI_HCD 457 select USB_EHCI_SH if USB_EHCI_HCD 458 select PINCTRL 459 460config CPU_SUBTYPE_SHX3 461 bool "Support SH-X3 processor" 462 select CPU_SH4A 463 select CPU_SHX3 464 select GENERIC_CLOCKEVENTS_BROADCAST if SMP 465 select GPIOLIB 466 select PINCTRL 467 468# SH4AL-DSP Processor Support 469 470config CPU_SUBTYPE_SH7343 471 bool "Support SH7343 processor" 472 select CPU_SH4AL_DSP 473 select ARCH_SHMOBILE 474 select SYS_SUPPORTS_SH_CMT 475 476config CPU_SUBTYPE_SH7722 477 bool "Support SH7722 processor" 478 select CPU_SH4AL_DSP 479 select CPU_SHX2 480 select ARCH_SHMOBILE 481 select ARCH_SPARSEMEM_ENABLE 482 select SYS_SUPPORTS_NUMA 483 select SYS_SUPPORTS_SH_CMT 484 select PINCTRL 485 486config CPU_SUBTYPE_SH7366 487 bool "Support SH7366 processor" 488 select CPU_SH4AL_DSP 489 select CPU_SHX2 490 select ARCH_SHMOBILE 491 select ARCH_SPARSEMEM_ENABLE 492 select SYS_SUPPORTS_NUMA 493 select SYS_SUPPORTS_SH_CMT 494 495endchoice 496 497source "arch/sh/mm/Kconfig" 498 499source "arch/sh/Kconfig.cpu" 500 501source "arch/sh/boards/Kconfig" 502 503menu "Timer and clock configuration" 504 505config SH_PCLK_FREQ 506 int "Peripheral clock frequency (in Hz)" 507 depends on SH_CLK_CPG_LEGACY 508 default "31250000" if CPU_SUBTYPE_SH7619 509 default "33333333" if CPU_SUBTYPE_SH7770 || \ 510 CPU_SUBTYPE_SH7760 || \ 511 CPU_SUBTYPE_SH7705 || \ 512 CPU_SUBTYPE_SH7203 || \ 513 CPU_SUBTYPE_SH7206 || \ 514 CPU_SUBTYPE_SH7263 || \ 515 CPU_SUBTYPE_MXG 516 default "60000000" if CPU_SUBTYPE_SH7751 || CPU_SUBTYPE_SH7751R 517 default "50000000" 518 help 519 This option is used to specify the peripheral clock frequency. 520 This is necessary for determining the reference clock value on 521 platforms lacking an RTC. 522 523config SH_CLK_CPG 524 def_bool y 525 526config SH_CLK_CPG_LEGACY 527 depends on SH_CLK_CPG 528 def_bool y if !CPU_SUBTYPE_SH7785 && !ARCH_SHMOBILE && \ 529 !CPU_SHX3 && !CPU_SUBTYPE_SH7757 && \ 530 !CPU_SUBTYPE_SH7734 && !CPU_SUBTYPE_SH7264 && \ 531 !CPU_SUBTYPE_SH7269 532 533endmenu 534 535menu "CPU Frequency scaling" 536source "drivers/cpufreq/Kconfig" 537endmenu 538 539source "arch/sh/drivers/Kconfig" 540 541endmenu 542 543menu "Kernel features" 544 545source "kernel/Kconfig.hz" 546 547config ARCH_SUPPORTS_KEXEC 548 def_bool MMU 549 550config ARCH_SUPPORTS_CRASH_DUMP 551 def_bool BROKEN_ON_SMP 552 553config ARCH_DEFAULT_CRASH_DUMP 554 def_bool y 555 556config ARCH_SUPPORTS_KEXEC_JUMP 557 def_bool y 558 559config PHYSICAL_START 560 hex "Physical address where the kernel is loaded" if (EXPERT || CRASH_DUMP) 561 default MEMORY_START 562 help 563 This gives the physical address where the kernel is loaded 564 and is ordinarily the same as MEMORY_START. 565 566 Different values are primarily used in the case of kexec on panic 567 where the fail safe kernel needs to run at a different address 568 than the panic-ed kernel. 569 570config SMP 571 bool "Symmetric multi-processing support" 572 depends on SYS_SUPPORTS_SMP 573 help 574 This enables support for systems with more than one CPU. If you have 575 a system with only one CPU, say N. If you have a system with more 576 than one CPU, say Y. 577 578 If you say N here, the kernel will run on uni- and multiprocessor 579 machines, but will use only one CPU of a multiprocessor machine. If 580 you say Y here, the kernel will run on many, but not all, 581 uniprocessor machines. On a uniprocessor machine, the kernel 582 will run faster if you say N here. 583 584 People using multiprocessor machines who say Y here should also say 585 Y to "Enhanced Real Time Clock Support", below. 586 587 See also <file:Documentation/admin-guide/lockup-watchdogs.rst> and the SMP-HOWTO 588 available at <https://www.tldp.org/docs.html#howto>. 589 590 If you don't know what to do here, say N. 591 592config NR_CPUS 593 int "Maximum number of CPUs (2-32)" 594 range 2 32 595 depends on SMP 596 default "4" if CPU_SUBTYPE_SHX3 597 default "2" 598 help 599 This allows you to specify the maximum number of CPUs which this 600 kernel will support. The maximum supported value is 32 and the 601 minimum value which makes sense is 2. 602 603 This is purely to save memory - each supported CPU adds 604 approximately eight kilobytes to the kernel image. 605 606config HOTPLUG_CPU 607 bool "Support for hot-pluggable CPUs (EXPERIMENTAL)" 608 depends on SMP 609 help 610 Say Y here to experiment with turning CPUs off and on. CPUs 611 can be controlled through /sys/devices/system/cpu. 612 613config GUSA 614 def_bool y 615 depends on !SMP 616 help 617 This enables support for gUSA (general UserSpace Atomicity). 618 This is the default implementation for both UP and non-ll/sc 619 CPUs, and is used by the libc, amongst others. 620 621 For additional information, design information can be found 622 in <http://lc.linux.or.jp/lc2002/papers/niibe0919p.pdf>. 623 624 This should only be disabled for special cases where alternate 625 atomicity implementations exist. 626 627config GUSA_RB 628 bool "Implement atomic operations by roll-back (gRB) (EXPERIMENTAL)" 629 depends on GUSA && CPU_SH3 || (CPU_SH4 && !CPU_SH4A) 630 help 631 Enabling this option will allow the kernel to implement some 632 atomic operations using a software implementation of load-locked/ 633 store-conditional (LLSC). On machines which do not have hardware 634 LLSC, this should be more efficient than the other alternative of 635 disabling interrupts around the atomic sequence. 636 637config HW_PERF_EVENTS 638 bool "Enable hardware performance counter support for perf events" 639 depends on PERF_EVENTS && CPU_HAS_PMU 640 default y 641 help 642 Enable hardware performance counter support for perf events. If 643 disabled, perf events will use software events only. 644 645source "drivers/sh/Kconfig" 646 647endmenu 648 649menu "Boot options" 650 651config USE_BUILTIN_DTB 652 bool "Use builtin DTB" 653 default n 654 depends on SH_DEVICE_TREE 655 help 656 Link a device tree blob for particular hardware into the kernel, 657 suppressing use of the DTB pointer provided by the bootloader. 658 This option should only be used with legacy bootloaders that are 659 not capable of providing a DTB to the kernel, or for experimental 660 hardware without stable device tree bindings. 661 662config BUILTIN_DTB_SOURCE 663 string "Source file for builtin DTB" 664 default "" 665 depends on USE_BUILTIN_DTB 666 help 667 Base name (without suffix, relative to arch/sh/boot/dts) for the 668 a DTS file that will be used to produce the DTB linked into the 669 kernel. 670 671config ZERO_PAGE_OFFSET 672 hex 673 default "0x00010000" if PAGE_SIZE_64KB || SH_RTS7751R2D || \ 674 SH_7751_SOLUTION_ENGINE 675 default "0x00004000" if PAGE_SIZE_16KB || SH_SH03 676 default "0x00002000" if PAGE_SIZE_8KB 677 default "0x00001000" 678 help 679 This sets the default offset of zero page. 680 681config BOOT_LINK_OFFSET 682 hex 683 default "0x00210000" if SH_SHMIN 684 default "0x00810000" if SH_7780_SOLUTION_ENGINE 685 default "0x009e0000" if SH_TITAN 686 default "0x01800000" if SH_SDK7780 687 default "0x02000000" if SH_EDOSK7760 688 default "0x00800000" 689 help 690 This option allows you to set the link address offset of the zImage. 691 This can be useful if you are on a board which has a small amount of 692 memory. 693 694config ENTRY_OFFSET 695 hex 696 default "0x00001000" if PAGE_SIZE_4KB 697 default "0x00002000" if PAGE_SIZE_8KB 698 default "0x00004000" if PAGE_SIZE_16KB 699 default "0x00010000" if PAGE_SIZE_64KB 700 default "0x00000000" 701 702config ROMIMAGE_MMCIF 703 bool "Include MMCIF loader in romImage (EXPERIMENTAL)" 704 depends on CPU_SUBTYPE_SH7724 705 help 706 Say Y here to include experimental MMCIF loading code in 707 romImage. With this enabled it is possible to write the romImage 708 kernel image to an MMC card and boot the kernel straight from 709 the reset vector. At reset the processor Mask ROM will load the 710 first part of the romImage which in turn loads the rest the kernel 711 image to RAM using the MMCIF hardware block. 712 713choice 714 prompt "Kernel command line" 715 default CMDLINE_OVERWRITE 716 help 717 Setting this option allows the kernel command line arguments 718 to be set. 719 720config CMDLINE_OVERWRITE 721 bool "Overwrite bootloader kernel arguments" 722 help 723 Given string will overwrite any arguments passed in by 724 a bootloader. 725 726config CMDLINE_EXTEND 727 bool "Extend bootloader kernel arguments" 728 help 729 Given string will be concatenated with arguments passed in 730 by a bootloader. 731 732config CMDLINE_FROM_BOOTLOADER 733 bool "Use bootloader kernel arguments" 734 help 735 Uses the command-line options passed by the boot loader. 736 737endchoice 738 739config CMDLINE 740 string "Kernel command line arguments string" 741 depends on CMDLINE_OVERWRITE || CMDLINE_EXTEND 742 default "console=ttySC1,115200" 743 744endmenu 745 746menu "Bus options" 747 748config MAPLE 749 bool "Maple Bus support" 750 depends on SH_DREAMCAST 751 help 752 The Maple Bus is SEGA's serial communication bus for peripherals 753 on the Dreamcast. Without this bus support you won't be able to 754 get your Dreamcast keyboard etc to work, so most users 755 probably want to say 'Y' here, unless you are only using the 756 Dreamcast with a serial line terminal or a remote network 757 connection. 758 759endmenu 760 761menu "Power management options (EXPERIMENTAL)" 762 763source "kernel/power/Kconfig" 764 765source "drivers/cpuidle/Kconfig" 766 767endmenu 768