Lines Matching full:msr
553 int get_msr(int cpu, off_t offset, unsigned long long *msr);
609 unsigned long long msr = 3;
613 if (get_msr(base_cpu, MSR_FSB_FREQ, &msr))
616 i = msr & 0xf;
1002 .has_msr_module_c6_res_ms = 1, /* DMR has Dual-Core-Module and MC6 MSR */
1334 unsigned long long msr[NUM_RAPL_COUNTERS];
1352 unsigned long long msr;
1355 double *platform_rapl_msr_scale; /* Scale applied to values read by MSR (platform dependent, filled at runtime) */
1367 .msr = MSR_PKG_ENERGY_STATUS,
1380 .msr = MSR_PKG_ENERGY_STATUS,
1393 .msr = MSR_PKG_ENERGY_STAT,
1406 .msr = MSR_PKG_ENERGY_STAT,
1419 .msr = MSR_PP0_ENERGY_STATUS,
1432 .msr = MSR_PP0_ENERGY_STATUS,
1445 .msr = MSR_DRAM_ENERGY_STATUS,
1458 .msr = MSR_DRAM_ENERGY_STATUS,
1471 .msr = MSR_PP1_ENERGY_STATUS,
1484 .msr = MSR_PP1_ENERGY_STATUS,
1497 .msr = MSR_PKG_PERF_STATUS,
1510 .msr = MSR_DRAM_PERF_STATUS,
1523 .msr = MSR_CORE_ENERGY_STAT,
1536 .msr = MSR_CORE_ENERGY_STAT,
1549 .msr = MSR_PLATFORM_ENERGY_STATUS,
1562 .msr = MSR_PLATFORM_ENERGY_STATUS,
1598 unsigned long long msr[NUM_CSTATE_COUNTERS];
1614 unsigned long long msr;
1626 .msr = MSR_CORE_C1_RES,
1636 .msr = MSR_CORE_C3_RESIDENCY,
1646 .msr = MSR_CORE_C6_RESIDENCY,
1656 .msr = MSR_CORE_C7_RESIDENCY,
1666 .msr = MSR_PKG_C2_RESIDENCY,
1676 .msr = MSR_PKG_C3_RESIDENCY,
1686 .msr = MSR_PKG_C6_RESIDENCY,
1696 .msr = MSR_PKG_C7_RESIDENCY,
1706 .msr = MSR_PKG_C8_RESIDENCY,
1716 .msr = MSR_PKG_C9_RESIDENCY,
1726 .msr = MSR_PKG_C10_RESIDENCY,
1745 unsigned long long msr[NUM_MSR_COUNTERS];
1756 unsigned long long msr;
1771 .perf_subsys = "msr",
1773 .msr = MSR_IA32_APERF,
1779 .perf_subsys = "msr",
1781 .msr = MSR_IA32_MPERF,
1787 .perf_subsys = "msr",
1789 .msr = MSR_SMI_COUNT,
2085 * The accumulated sum of MSR is defined as a monotonic
2086 * increasing MSR, it will be accumulated periodically,
2100 int get_msr_sum(int cpu, off_t offset, unsigned long long *msr);
2105 /*The accumulated MSR value is updated by the timer */
2107 /*The MSR footprint recorded in last timer */
2112 /* The percpu MSR sum array.*/
2206 /* MSR added counters */
2251 * Free all added counters accessed via msr.
2404 sprintf(pathname, "/dev/msr%d", cpu);
2406 sprintf(pathname, "/dev/cpu/%d/msr", cpu);
2411 err(-1, "%s open failed, try chown or chmod +r /dev/msr*, "
2412 "or run with --no-msr, or run as root", pathname);
2414 err(-1, "%s open failed, try chown or chmod +r /dev/cpu/*/msr, "
2415 "or run with --no-msr, or run as root", pathname);
2474 int get_msr(int cpu, off_t offset, unsigned long long *msr)
2480 retval = pread(get_msr_fd(cpu), msr, sizeof(*msr), offset);
2482 if (retval != sizeof *msr)
2483 err(-1, "cpu%d: msr offset 0x%llx read failed", cpu, (unsigned long long)offset);
2518 ret = add_msr_counter(cpu, cai->msr);
2601 " -M, --no-msr\n"
2602 " disable all uses of the MSR driver\n"
3882 * Some models have a dedicated C1 residency MSR,
4431 unsigned long long msr;
4453 get_msr(cpu, MSR_IA32_ENERGY_PERF_BIAS, &msr);
4455 return msr & 0xf;
4755 fprintf(stderr, "Reading rapl counter via msr at %u\n", i);
4759 if (get_msr_sum(cpu, rci->msr[i], &rci->data[i]))
4762 if (get_msr(cpu, rci->msr[i], &rci->data[i]))
4893 if (get_msr(cpu, cci->msr[i], &cci->data[i]))
4897 fprintf(stderr, "cstate via %s0x%llx %u: %llu\n", "msr", cci->msr[i], i, cci->data[i]);
4983 fprintf(stderr, "Reading msr counter via perf at %u: %llu\n", i, perf_data[pi]);
4993 if (get_msr(cpu, mci->msr[i], &mci->data[i]))
4999 fprintf(stderr, "Reading msr counter via msr at %u: %llu\n", i, mci->data[i]);
5104 unsigned long long msr;
5171 if (get_msr(cpu, MSR_IA32_THERM_STATUS, &msr))
5173 c->core_temp_c = tj_max - ((msr >> 16) & 0x7F);
5223 if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_STATUS, &msr))
5225 p->pkg_temp_c = tj_max - ((msr >> 16) & 0x7F);
5327 unsigned long long msr;
5365 get_msr(base_cpu, MSR_PKG_CST_CONFIG_CONTROL, &msr);
5366 pkg_cstate_limit = pkg_cstate_limits[msr & 0xF];
5371 unsigned long long msr;
5377 get_msr(base_cpu, MSR_PLATFORM_INFO, &msr);
5379 fprintf(outf, "cpu%d: MSR_PLATFORM_INFO: 0x%08llx\n", base_cpu, msr);
5381 ratio = (msr >> 40) & 0xFF;
5384 ratio = (msr >> 8) & 0xFF;
5390 unsigned long long msr;
5395 get_msr(base_cpu, MSR_IA32_POWER_CTL, &msr);
5397 base_cpu, msr, msr & 0x2 ? "EN" : "DIS");
5401 fprintf(outf, "C-state Pre-wake: %sabled\n", msr & 0x40000000 ? "DIS" : "EN");
5408 unsigned long long msr;
5411 get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT2, &msr);
5413 fprintf(outf, "cpu%d: MSR_TURBO_RATIO_LIMIT2: 0x%08llx\n", base_cpu, msr);
5415 ratio = (msr >> 8) & 0xFF;
5419 ratio = (msr >> 0) & 0xFF;
5427 unsigned long long msr;
5430 get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT1, &msr);
5432 fprintf(outf, "cpu%d: MSR_TURBO_RATIO_LIMIT1: 0x%08llx\n", base_cpu, msr);
5434 ratio = (msr >> 56) & 0xFF;
5438 ratio = (msr >> 48) & 0xFF;
5442 ratio = (msr >> 40) & 0xFF;
5446 ratio = (msr >> 32) & 0xFF;
5450 ratio = (msr >> 24) & 0xFF;
5454 ratio = (msr >> 16) & 0xFF;
5458 ratio = (msr >> 8) & 0xFF;
5462 ratio = (msr >> 0) & 0xFF;
5470 unsigned long long msr, core_counts;
5473 get_msr(base_cpu, trl_msr_offset, &msr);
5475 base_cpu, trl_msr_offset == MSR_SECONDARY_TURBO_RATIO_LIMIT ? "SECONDARY_" : "", msr);
5487 ratio = (msr >> shift) & 0xFF;
5499 unsigned long long msr;
5502 get_msr(base_cpu, MSR_ATOM_CORE_RATIOS, &msr);
5503 fprintf(outf, "cpu%d: MSR_ATOM_CORE_RATIOS: 0x%08llx\n", base_cpu, msr & 0xFFFFFFFF);
5505 ratio = (msr >> 0) & 0x3F;
5509 ratio = (msr >> 8) & 0x3F;
5513 ratio = (msr >> 16) & 0x3F;
5517 get_msr(base_cpu, MSR_ATOM_CORE_TURBO_RATIOS, &msr);
5518 fprintf(outf, "cpu%d: MSR_ATOM_CORE_TURBO_RATIOS: 0x%08llx\n", base_cpu, msr & 0xFFFFFFFF);
5520 ratio = (msr >> 24) & 0x3F;
5524 ratio = (msr >> 16) & 0x3F;
5528 ratio = (msr >> 8) & 0x3F;
5532 ratio = (msr >> 0) & 0x3F;
5541 unsigned long long msr;
5547 get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT, &msr);
5549 fprintf(outf, "cpu%d: MSR_TURBO_RATIO_LIMIT: 0x%08llx\n", base_cpu, msr);
5575 cores[b_nr] = (msr & 0xFF) >> 1;
5576 ratio[b_nr] = (msr >> 8) & 0xFF;
5579 delta_cores = (msr >> i) & 0x1F;
5580 delta_ratio = (msr >> (i + 5)) & 0x7;
5596 unsigned long long msr;
5601 get_msr(base_cpu, MSR_PKG_CST_CONFIG_CONTROL, &msr);
5603 fprintf(outf, "cpu%d: MSR_PKG_CST_CONFIG_CONTROL: 0x%08llx", base_cpu, msr);
5606 (msr & SNB_C3_AUTO_UNDEMOTE) ? "UNdemote-C3, " : "",
5607 (msr & SNB_C1_AUTO_UNDEMOTE) ? "UNdemote-C1, " : "",
5608 (msr & NHM_C3_AUTO_DEMOTE) ? "demote-C3, " : "",
5609 (msr & NHM_C1_AUTO_DEMOTE) ? "demote-C1, " : "",
5610 (msr & (1 << 15)) ? "" : "UN", (unsigned int)msr & 0xF, pkg_cstate_limit_strings[pkg_cstate_limit]);
5614 fprintf(outf, ", automatic c-state conversion=%s", (msr & AUTOMATIC_CSTATE_CONVERSION) ? "on" : "off");
5624 unsigned long long msr;
5626 get_msr(base_cpu, MSR_CONFIG_TDP_NOMINAL, &msr);
5627 fprintf(outf, "cpu%d: MSR_CONFIG_TDP_NOMINAL: 0x%08llx", base_cpu, msr);
5628 fprintf(outf, " (base_ratio=%d)\n", (unsigned int)msr & 0xFF);
5630 get_msr(base_cpu, MSR_CONFIG_TDP_LEVEL_1, &msr);
5631 fprintf(outf, "cpu%d: MSR_CONFIG_TDP_LEVEL_1: 0x%08llx (", base_cpu, msr);
5632 if (msr) {
5633 fprintf(outf, "PKG_MIN_PWR_LVL1=%d ", (unsigned int)(msr >> 48) & 0x7FFF);
5634 fprintf(outf, "PKG_MAX_PWR_LVL1=%d ", (unsigned int)(msr >> 32) & 0x7FFF);
5635 fprintf(outf, "LVL1_RATIO=%d ", (unsigned int)(msr >> 16) & 0xFF);
5636 fprintf(outf, "PKG_TDP_LVL1=%d", (unsigned int)(msr) & 0x7FFF);
5640 get_msr(base_cpu, MSR_CONFIG_TDP_LEVEL_2, &msr);
5641 fprintf(outf, "cpu%d: MSR_CONFIG_TDP_LEVEL_2: 0x%08llx (", base_cpu, msr);
5642 if (msr) {
5643 fprintf(outf, "PKG_MIN_PWR_LVL2=%d ", (unsigned int)(msr >> 48) & 0x7FFF);
5644 fprintf(outf, "PKG_MAX_PWR_LVL2=%d ", (unsigned int)(msr >> 32) & 0x7FFF);
5645 fprintf(outf, "LVL2_RATIO=%d ", (unsigned int)(msr >> 16) & 0xFF);
5646 fprintf(outf, "PKG_TDP_LVL2=%d", (unsigned int)(msr) & 0x7FFF);
5650 get_msr(base_cpu, MSR_CONFIG_TDP_CONTROL, &msr);
5651 fprintf(outf, "cpu%d: MSR_CONFIG_TDP_CONTROL: 0x%08llx (", base_cpu, msr);
5652 if ((msr) & 0x3)
5653 fprintf(outf, "TDP_LEVEL=%d ", (unsigned int)(msr) & 0x3);
5654 fprintf(outf, " lock=%d", (unsigned int)(msr >> 31) & 1);
5657 get_msr(base_cpu, MSR_TURBO_ACTIVATION_RATIO, &msr);
5658 fprintf(outf, "cpu%d: MSR_TURBO_ACTIVATION_RATIO: 0x%08llx (", base_cpu, msr);
5659 fprintf(outf, "MAX_NON_TURBO_RATIO=%d", (unsigned int)(msr) & 0xFF);
5660 fprintf(outf, " lock=%d", (unsigned int)(msr >> 31) & 1);
5668 unsigned long long msr;
5674 get_msr(base_cpu, MSR_PKGC3_IRTL, &msr);
5675 fprintf(outf, "cpu%d: MSR_PKGC3_IRTL: 0x%08llx (", base_cpu, msr);
5676 fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
5677 (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
5681 get_msr(base_cpu, MSR_PKGC6_IRTL, &msr);
5682 fprintf(outf, "cpu%d: MSR_PKGC6_IRTL: 0x%08llx (", base_cpu, msr);
5683 fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
5684 (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
5688 get_msr(base_cpu, MSR_PKGC7_IRTL, &msr);
5689 fprintf(outf, "cpu%d: MSR_PKGC7_IRTL: 0x%08llx (", base_cpu, msr);
5690 fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
5691 (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
5695 get_msr(base_cpu, MSR_PKGC8_IRTL, &msr);
5696 fprintf(outf, "cpu%d: MSR_PKGC8_IRTL: 0x%08llx (", base_cpu, msr);
5697 fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
5698 (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
5702 get_msr(base_cpu, MSR_PKGC9_IRTL, &msr);
5703 fprintf(outf, "cpu%d: MSR_PKGC9_IRTL: 0x%08llx (", base_cpu, msr);
5704 fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
5705 (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
5709 get_msr(base_cpu, MSR_PKGC10_IRTL, &msr);
5710 fprintf(outf, "cpu%d: MSR_PKGC10_IRTL: 0x%08llx (", base_cpu, msr);
5711 fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
5712 (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
6564 int get_msr_sum(int cpu, off_t offset, unsigned long long *msr)
6583 *msr = msr_last + per_cpu_msr_sum[cpu].entries[idx].sum;
6612 fprintf(outf, "Can not update msr(0x%llx)\n", (unsigned long long)offset);
6639 fprintf(outf, "Can not allocate memory for long time MSR.\n");
6808 sprintf(pathname, "/dev/msr%d", base_cpu);
6810 sprintf(pathname, "/dev/cpu/%d/msr", base_cpu);
6813 if (system("/sbin/modprobe msr > /dev/null 2>&1"))
6870 sprintf(pathname, "/dev/msr%d", base_cpu);
6872 sprintf(pathname, "/dev/cpu/%d/msr", base_cpu);
6880 "\tRun as root to enable them or use %s to disable the access explicitly", pathname, "--no-msr");
6887 unsigned long long msr;
6902 get_msr(base_cpu, MSR_PLATFORM_INFO, &msr);
6903 base_ratio = (msr >> 8) & 0xFF;
7336 * Decode the ENERGY_PERF_BIAS MSR
7389 unsigned long long msr;
7412 if (get_msr(cpu, MSR_PM_ENABLE, &msr))
7415 fprintf(outf, "cpu%d: MSR_PM_ENABLE: 0x%08llx (%sHWP)\n", cpu, msr, (msr & (1 << 0)) ? "" : "No-");
7418 if ((msr & (1 << 0)) == 0)
7421 if (get_msr(cpu, MSR_HWP_CAPABILITIES, &msr))
7426 cpu, msr,
7427 (unsigned int)HWP_HIGHEST_PERF(msr),
7428 (unsigned int)HWP_GUARANTEED_PERF(msr),
7429 (unsigned int)HWP_MOSTEFFICIENT_PERF(msr), (unsigned int)HWP_LOWEST_PERF(msr));
7431 if (get_msr(cpu, MSR_HWP_REQUEST, &msr))
7436 cpu, msr,
7437 (unsigned int)(((msr) >> 0) & 0xff),
7438 (unsigned int)(((msr) >> 8) & 0xff),
7439 (unsigned int)(((msr) >> 16) & 0xff),
7440 (unsigned int)(((msr) >> 24) & 0xff),
7441 (unsigned int)(((msr) >> 32) & 0xff3), (unsigned int)(((msr) >> 42) & 0x1));
7444 if (get_msr(cpu, MSR_HWP_REQUEST_PKG, &msr))
7449 cpu, msr,
7450 (unsigned int)(((msr) >> 0) & 0xff),
7451 (unsigned int)(((msr) >> 8) & 0xff),
7452 (unsigned int)(((msr) >> 16) & 0xff),
7453 (unsigned int)(((msr) >> 24) & 0xff), (unsigned int)(((msr) >> 32) & 0xff3));
7456 if (get_msr(cpu, MSR_HWP_INTERRUPT, &msr))
7461 cpu, msr, ((msr) & 0x1) ? "EN" : "Dis", ((msr) & 0x2) ? "EN" : "Dis");
7463 if (get_msr(cpu, MSR_HWP_STATUS, &msr))
7468 cpu, msr, ((msr) & 0x1) ? "" : "No-", ((msr) & 0x4) ? "" : "No-");
7478 unsigned long long msr;
7499 get_msr(cpu, MSR_CORE_PERF_LIMIT_REASONS, &msr);
7500 fprintf(outf, "cpu%d: MSR_CORE_PERF_LIMIT_REASONS, 0x%08llx", cpu, msr);
7502 (msr & 1 << 15) ? "bit15, " : "",
7503 (msr & 1 << 14) ? "bit14, " : "",
7504 (msr & 1 << 13) ? "Transitions, " : "",
7505 (msr & 1 << 12) ? "MultiCoreTurbo, " : "",
7506 (msr & 1 << 11) ? "PkgPwrL2, " : "",
7507 (msr & 1 << 10) ? "PkgPwrL1, " : "",
7508 (msr & 1 << 9) ? "CorePwr, " : "",
7509 (msr & 1 << 8) ? "Amps, " : "",
7510 (msr & 1 << 6) ? "VR-Therm, " : "",
7511 (msr & 1 << 5) ? "Auto-HWP, " : "",
7512 (msr & 1 << 4) ? "Graphics, " : "",
7513 (msr & 1 << 2) ? "bit2, " : "",
7514 (msr & 1 << 1) ? "ThermStatus, " : "", (msr & 1 << 0) ? "PROCHOT, " : "");
7516 (msr & 1 << 31) ? "bit31, " : "",
7517 (msr & 1 << 30) ? "bit30, " : "",
7518 (msr & 1 << 29) ? "Transitions, " : "",
7519 (msr & 1 << 28) ? "MultiCoreTurbo, " : "",
7520 (msr & 1 << 27) ? "PkgPwrL2, " : "",
7521 (msr & 1 << 26) ? "PkgPwrL1, " : "",
7522 (msr & 1 << 25) ? "CorePwr, " : "",
7523 (msr & 1 << 24) ? "Amps, " : "",
7524 (msr & 1 << 22) ? "VR-Therm, " : "",
7525 (msr & 1 << 21) ? "Auto-HWP, " : "",
7526 (msr & 1 << 20) ? "Graphics, " : "",
7527 (msr & 1 << 18) ? "bit18, " : "",
7528 (msr & 1 << 17) ? "ThermStatus, " : "", (msr & 1 << 16) ? "PROCHOT, " : "");
7532 get_msr(cpu, MSR_GFX_PERF_LIMIT_REASONS, &msr);
7533 fprintf(outf, "cpu%d: MSR_GFX_PERF_LIMIT_REASONS, 0x%08llx", cpu, msr);
7535 (msr & 1 << 0) ? "PROCHOT, " : "",
7536 (msr & 1 << 1) ? "ThermStatus, " : "",
7537 (msr & 1 << 4) ? "Graphics, " : "",
7538 (msr & 1 << 6) ? "VR-Therm, " : "",
7539 (msr & 1 << 8) ? "Amps, " : "",
7540 (msr & 1 << 9) ? "GFXPwr, " : "",
7541 (msr & 1 << 10) ? "PkgPwrL1, " : "", (msr & 1 << 11) ? "PkgPwrL2, " : "");
7543 (msr & 1 << 16) ? "PROCHOT, " : "",
7544 (msr & 1 << 17) ? "ThermStatus, " : "",
7545 (msr & 1 << 20) ? "Graphics, " : "",
7546 (msr & 1 << 22) ? "VR-Therm, " : "",
7547 (msr & 1 << 24) ? "Amps, " : "",
7548 (msr & 1 << 25) ? "GFXPwr, " : "",
7549 (msr & 1 << 26) ? "PkgPwrL1, " : "", (msr & 1 << 27) ? "PkgPwrL2, " : "");
7552 get_msr(cpu, MSR_RING_PERF_LIMIT_REASONS, &msr);
7553 fprintf(outf, "cpu%d: MSR_RING_PERF_LIMIT_REASONS, 0x%08llx", cpu, msr);
7555 (msr & 1 << 0) ? "PROCHOT, " : "",
7556 (msr & 1 << 1) ? "ThermStatus, " : "",
7557 (msr & 1 << 6) ? "VR-Therm, " : "",
7558 (msr & 1 << 8) ? "Amps, " : "",
7559 (msr & 1 << 10) ? "PkgPwrL1, " : "", (msr & 1 << 11) ? "PkgPwrL2, " : "");
7561 (msr & 1 << 16) ? "PROCHOT, " : "",
7562 (msr & 1 << 17) ? "ThermStatus, " : "",
7563 (msr & 1 << 22) ? "VR-Therm, " : "",
7564 (msr & 1 << 24) ? "Amps, " : "",
7565 (msr & 1 << 26) ? "PkgPwrL1, " : "", (msr & 1 << 27) ? "PkgPwrL2, " : "");
7583 unsigned long long msr;
7586 if (!get_msr(base_cpu, MSR_PKG_POWER_INFO, &msr))
7587 return ((msr >> 0) & RAPL_POWER_GRANULARITY) * rapl_power_units;
7598 unsigned long long msr;
7625 if (get_msr(base_cpu, MSR_RAPL_POWER_UNIT, &msr))
7628 rapl_power_units = 1.0 / (1 << (msr & 0xF));
7630 rapl_energy_units = 1.0 * (1 << (msr >> 8 & 0x1F)) / 1000000;
7632 rapl_energy_units = 1.0 / (1 << (msr >> 8 & 0x1F));
7644 time_unit = msr >> 16 & 0xF;
7659 unsigned long long msr;
7673 if (get_msr(base_cpu, MSR_RAPL_PWR_UNIT, &msr))
7676 rapl_time_units = ldexp(1.0, -(msr >> 16 & 0xf));
7677 rapl_energy_units = ldexp(1.0, -(msr >> 8 & 0x1f));
7678 rapl_power_units = ldexp(1.0, -(msr & 0xf));
7687 void print_power_limit_msr(int cpu, unsigned long long msr, char *label)
7691 ((msr >> 15) & 1) ? "EN" : "DIS",
7692 ((msr >> 0) & 0x7FFF) * rapl_power_units,
7693 (1.0 + (((msr >> 22) & 0x3) / 4.0)) * (1 << ((msr >> 17) & 0x1F)) * rapl_time_units,
7694 (((msr >> 16) & 1) ? "EN" : "DIS"));
7853 unsigned long long msr;
7875 if (get_msr(cpu, MSR_RAPL_PWR_UNIT, &msr))
7879 if (get_msr(cpu, MSR_RAPL_POWER_UNIT, &msr))
7883 fprintf(outf, "cpu%d: %s: 0x%08llx (%f Watts, %f Joules, %f sec.)\n", cpu, msr_name, msr,
7888 if (get_msr(cpu, MSR_PKG_POWER_INFO, &msr))
7892 cpu, msr,
7893 ((msr >> 0) & RAPL_POWER_GRANULARITY) * rapl_power_units,
7894 ((msr >> 16) & RAPL_POWER_GRANULARITY) * rapl_power_units,
7895 ((msr >> 32) & RAPL_POWER_GRANULARITY) * rapl_power_units,
7896 ((msr >> 48) & RAPL_TIME_GRANULARITY) * rapl_time_units);
7901 if (get_msr(cpu, MSR_PKG_POWER_LIMIT, &msr))
7905 cpu, msr, (msr >> 63) & 1 ? "" : "UN");
7907 print_power_limit_msr(cpu, msr, "PKG Limit #1");
7910 ((msr >> 47) & 1) ? "EN" : "DIS",
7911 ((msr >> 32) & 0x7FFF) * rapl_power_units,
7912 (1.0 + (((msr >> 54) & 0x3) / 4.0)) * (1 << ((msr >> 49) & 0x1F)) * rapl_time_units,
7913 ((msr >> 48) & 1) ? "EN" : "DIS");
7915 if (get_msr(cpu, MSR_VR_CURRENT_CONFIG, &msr))
7918 fprintf(outf, "cpu%d: MSR_VR_CURRENT_CONFIG: 0x%08llx\n", cpu, msr);
7920 cpu, ((msr >> 0) & 0x1FFF) * rapl_power_units, (msr >> 31) & 1 ? "" : "UN");
7924 if (get_msr(cpu, MSR_DRAM_POWER_INFO, &msr))
7928 cpu, msr,
7929 ((msr >> 0) & RAPL_POWER_GRANULARITY) * rapl_power_units,
7930 ((msr >> 16) & RAPL_POWER_GRANULARITY) * rapl_power_units,
7931 ((msr >> 32) & RAPL_POWER_GRANULARITY) * rapl_power_units,
7932 ((msr >> 48) & RAPL_TIME_GRANULARITY) * rapl_time_units);
7935 if (get_msr(cpu, MSR_DRAM_POWER_LIMIT, &msr))
7938 cpu, msr, (msr >> 31) & 1 ? "" : "UN");
7940 print_power_limit_msr(cpu, msr, "DRAM Limit");
7943 if (get_msr(cpu, MSR_PP0_POLICY, &msr))
7946 fprintf(outf, "cpu%d: MSR_PP0_POLICY: %lld\n", cpu, msr & 0xF);
7949 if (get_msr(cpu, MSR_PP0_POWER_LIMIT, &msr))
7952 cpu, msr, (msr >> 31) & 1 ? "" : "UN");
7953 print_power_limit_msr(cpu, msr, "Cores Limit");
7956 if (get_msr(cpu, MSR_PP1_POLICY, &msr))
7959 fprintf(outf, "cpu%d: MSR_PP1_POLICY: %lld\n", cpu, msr & 0xF);
7961 if (get_msr(cpu, MSR_PP1_POWER_LIMIT, &msr))
7964 cpu, msr, (msr >> 31) & 1 ? "" : "UN");
7965 print_power_limit_msr(cpu, msr, "GFX Limit");
7998 * Older processors do not have this MSR, so there we guess,
8001 * Several MSR temperature values are in units of degrees-C
8007 unsigned long long msr;
8034 /* Temperature Target MSR is Nehalem and newer only */
8038 if (get_msr(base_cpu, MSR_IA32_TEMPERATURE_TARGET, &msr))
8041 tcc_default = (msr >> 16) & 0xFF;
8051 tcc_offset = (msr >> 24) & GENMASK(bits - 1, 0);
8053 cpu, msr, tcc_default - tcc_offset, tcc_default, tcc_offset);
8055 fprintf(outf, "cpu%d: MSR_IA32_TEMPERATURE_TARGET: 0x%08llx (%d C)\n", cpu, msr, tcc_default);
8075 unsigned long long msr;
8100 if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_STATUS, &msr))
8103 dts = (msr >> 16) & 0x7F;
8104 fprintf(outf, "cpu%d: MSR_IA32_PACKAGE_THERM_STATUS: 0x%08llx (%d C)\n", cpu, msr, tj_max - dts);
8106 if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_INTERRUPT, &msr))
8109 dts = (msr >> 16) & 0x7F;
8110 dts2 = (msr >> 8) & 0x7F;
8112 cpu, msr, tj_max - dts, tj_max - dts2);
8118 if (get_msr(cpu, MSR_IA32_THERM_STATUS, &msr))
8121 dts = (msr >> 16) & 0x7F;
8122 resolution = (msr >> 27) & 0xF;
8124 cpu, msr, tj_max - dts, resolution);
8126 if (get_msr(cpu, MSR_IA32_THERM_INTERRUPT, &msr))
8129 dts = (msr >> 16) & 0x7F;
8130 dts2 = (msr >> 8) & 0x7F;
8132 cpu, msr, tj_max - dts, tj_max - dts2);
8180 unsigned long long msr;
8185 if (!get_msr(base_cpu, MSR_IA32_FEAT_CTL, &msr))
8187 base_cpu, msr, msr & FEAT_CTL_LOCKED ? "" : "UN-", msr & (1 << 18) ? "SGX" : "");
8192 unsigned long long msr;
8200 if (!get_msr(base_cpu, MSR_IA32_MISC_ENABLE, &msr))
8202 base_cpu, msr,
8203 msr & MSR_IA32_MISC_ENABLE_TM1 ? "" : "No-",
8204 msr & MSR_IA32_MISC_ENABLE_ENHANCED_SPEEDSTEP ? "" : "No-",
8205 msr & MSR_IA32_MISC_ENABLE_MWAIT ? "" : "No-",
8206 msr & MSR_IA32_MISC_ENABLE_PREFETCH_DISABLE ? "No-" : "",
8207 msr & MSR_IA32_MISC_ENABLE_TURBO_DISABLE ? "No-" : "");
8212 unsigned long long msr;
8220 if (!get_msr(base_cpu, MSR_MISC_FEATURE_CONTROL, &msr))
8223 base_cpu, msr, msr & (0 << 0) ? "No-" : "", msr & (1 << 0) ? "No-" : "",
8224 msr & (2 << 0) ? "No-" : "", msr & (3 << 0) ? "No-" : "");
8236 unsigned long long msr;
8244 if (!get_msr(base_cpu, MSR_MISC_PWR_MGMT, &msr))
8246 base_cpu, msr,
8247 msr & (1 << 0) ? "DIS" : "EN", msr & (1 << 1) ? "EN" : "DIS", msr & (1 << 8) ? "EN" : "DIS");
8258 unsigned long long msr;
8266 if (!get_msr(base_cpu, MSR_CC6_DEMOTION_POLICY_CONFIG, &msr))
8268 base_cpu, msr, msr & (1 << 0) ? "EN" : "DIS");
8270 if (!get_msr(base_cpu, MSR_MC6_DEMOTION_POLICY_CONFIG, &msr))
8272 base_cpu, msr, msr & (1 << 0) ? "EN" : "DIS");
8405 * If can't get it via perf, fallback to MSR
8444 * same perf_subsys and perf_name, but with different MSR address.
8448 * entries are probed just because their perf/msr is duplicate and valid.
8462 /* Use MSR for this counter */
8465 rci->msr[cai->rci_index] = cai->msr;
8597 /* User MSR for this counter */
8598 } else if (add_msr_counter(cpu, cai->msr) >= 0) {
8600 cci->msr[cai->rci_index] = cai->msr;
8609 /* Initialize data for reading perf counters from the MSR group. */
8710 /* User MSR for this counter */
8712 && add_msr_counter(cpu, cai->msr) >= 0) {
8714 cci->msr[cai->rci_index] = cai->msr;
8737 * If we don't have a C1 residency MSR, we calculate it "in software",
8874 edx_flags & (1 << 5) ? "MSR" : "-",
8882 errx(1, "CPUID: no MSR");
9009 if (platform->has_msr_knl_core_c6_residency && cai->msr == MSR_CORE_C6_RESIDENCY)
9010 cai->msr = MSR_KNL_CORE_C6_RESIDENCY;
9012 if (!platform->has_msr_core_c1_res && cai->msr == MSR_CORE_C1_RES)
9013 cai->msr = 0;
9015 if (platform->has_msr_atom_pkg_c6_residency && cai->msr == MSR_PKG_C6_RESIDENCY)
9016 cai->msr = MSR_ATOM_PKG_C6_RESIDENCY;
10175 errx(1, "Requested MSR counter 0x%x, but in --no-msr mode", msr_num);
10178 fprintf(stderr, "%s(msr%d, %s, %s, width%d, scope%d, type%d, format%d, flags%x, id%d)\n",
10380 if (sscanf(add_command, "msr%d", &msr_num) == 1)
11018 { "no-msr", no_argument, 0, 'M' },
11031 * like adding the MSR counter with --add and at the same time using --no-msr.