Lines Matching +full:touch +full:- +full:det +full:- +full:delay
1 // SPDX-License-Identifier: GPL-2.0-only
3 * wm8903.c -- WM8903 ALSA SoC Audio driver
5 * Copyright 2008-12 Wolfson Microelectronics
6 * Copyright 2011-2012 NVIDIA, Inc.
11 * - TDM mode configuration.
18 #include <linux/delay.h>
41 { 4, 0x0018 }, /* R4 - Bias Control 0 */
42 { 5, 0x0000 }, /* R5 - VMID Control 0 */
43 { 6, 0x0000 }, /* R6 - Mic Bias Control 0 */
44 { 8, 0x0001 }, /* R8 - Analogue DAC 0 */
45 { 10, 0x0001 }, /* R10 - Analogue ADC 0 */
46 { 12, 0x0000 }, /* R12 - Power Management 0 */
47 { 13, 0x0000 }, /* R13 - Power Management 1 */
48 { 14, 0x0000 }, /* R14 - Power Management 2 */
49 { 15, 0x0000 }, /* R15 - Power Management 3 */
50 { 16, 0x0000 }, /* R16 - Power Management 4 */
51 { 17, 0x0000 }, /* R17 - Power Management 5 */
52 { 18, 0x0000 }, /* R18 - Power Management 6 */
53 { 20, 0x0400 }, /* R20 - Clock Rates 0 */
54 { 21, 0x0D07 }, /* R21 - Clock Rates 1 */
55 { 22, 0x0000 }, /* R22 - Clock Rates 2 */
56 { 24, 0x0050 }, /* R24 - Audio Interface 0 */
57 { 25, 0x0242 }, /* R25 - Audio Interface 1 */
58 { 26, 0x0008 }, /* R26 - Audio Interface 2 */
59 { 27, 0x0022 }, /* R27 - Audio Interface 3 */
60 { 30, 0x00C0 }, /* R30 - DAC Digital Volume Left */
61 { 31, 0x00C0 }, /* R31 - DAC Digital Volume Right */
62 { 32, 0x0000 }, /* R32 - DAC Digital 0 */
63 { 33, 0x0000 }, /* R33 - DAC Digital 1 */
64 { 36, 0x00C0 }, /* R36 - ADC Digital Volume Left */
65 { 37, 0x00C0 }, /* R37 - ADC Digital Volume Right */
66 { 38, 0x0000 }, /* R38 - ADC Digital 0 */
67 { 39, 0x0073 }, /* R39 - Digital Microphone 0 */
68 { 40, 0x09BF }, /* R40 - DRC 0 */
69 { 41, 0x3241 }, /* R41 - DRC 1 */
70 { 42, 0x0020 }, /* R42 - DRC 2 */
71 { 43, 0x0000 }, /* R43 - DRC 3 */
72 { 44, 0x0085 }, /* R44 - Analogue Left Input 0 */
73 { 45, 0x0085 }, /* R45 - Analogue Right Input 0 */
74 { 46, 0x0044 }, /* R46 - Analogue Left Input 1 */
75 { 47, 0x0044 }, /* R47 - Analogue Right Input 1 */
76 { 50, 0x0008 }, /* R50 - Analogue Left Mix 0 */
77 { 51, 0x0004 }, /* R51 - Analogue Right Mix 0 */
78 { 52, 0x0000 }, /* R52 - Analogue Spk Mix Left 0 */
79 { 53, 0x0000 }, /* R53 - Analogue Spk Mix Left 1 */
80 { 54, 0x0000 }, /* R54 - Analogue Spk Mix Right 0 */
81 { 55, 0x0000 }, /* R55 - Analogue Spk Mix Right 1 */
82 { 57, 0x002D }, /* R57 - Analogue OUT1 Left */
83 { 58, 0x002D }, /* R58 - Analogue OUT1 Right */
84 { 59, 0x0039 }, /* R59 - Analogue OUT2 Left */
85 { 60, 0x0039 }, /* R60 - Analogue OUT2 Right */
86 { 62, 0x0139 }, /* R62 - Analogue OUT3 Left */
87 { 63, 0x0139 }, /* R63 - Analogue OUT3 Right */
88 { 64, 0x0000 }, /* R65 - Analogue SPK Output Control 0 */
89 { 67, 0x0010 }, /* R67 - DC Servo 0 */
90 { 69, 0x00A4 }, /* R69 - DC Servo 2 */
91 { 90, 0x0000 }, /* R90 - Analogue HP 0 */
92 { 94, 0x0000 }, /* R94 - Analogue Lineout 0 */
93 { 98, 0x0000 }, /* R98 - Charge Pump 0 */
94 { 104, 0x0000 }, /* R104 - Class W 0 */
95 { 108, 0x0000 }, /* R108 - Write Sequencer 0 */
96 { 109, 0x0000 }, /* R109 - Write Sequencer 1 */
97 { 110, 0x0000 }, /* R110 - Write Sequencer 2 */
98 { 111, 0x0000 }, /* R111 - Write Sequencer 3 */
99 { 112, 0x0000 }, /* R112 - Write Sequencer 4 */
100 { 114, 0x0000 }, /* R114 - Control Interface */
101 { 116, 0x00A8 }, /* R116 - GPIO Control 1 */
102 { 117, 0x00A8 }, /* R117 - GPIO Control 2 */
103 { 118, 0x00A8 }, /* R118 - GPIO Control 3 */
104 { 119, 0x0220 }, /* R119 - GPIO Control 4 */
105 { 120, 0x01A0 }, /* R120 - GPIO Control 5 */
106 { 122, 0xFFFF }, /* R122 - Interrupt Status 1 Mask */
107 { 123, 0x0000 }, /* R123 - Interrupt Polarity 1 */
108 { 126, 0x0000 }, /* R126 - Interrupt Control */
109 { 129, 0x0000 }, /* R129 - Control Interface Test 1 */
110 { 149, 0x6810 }, /* R149 - Charge Pump Test 1 */
111 { 164, 0x0028 }, /* R164 - Clock Rate Test 4 */
112 { 172, 0x0000 }, /* R172 - Analogue Output Bias 0 */
269 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
274 wm8903->dcs_pending |= 1 << w->shift;
278 1 << w->shift, 0);
296 if (wm8903->dcs_pending) {
297 dev_dbg(component->dev, "Starting DC servo for %x\n",
298 wm8903->dcs_pending);
301 for (i = 0; i < ARRAY_SIZE(wm8903->dcs_cache); i++) {
302 if (!(wm8903->dcs_pending & (1 << i)))
305 if (wm8903->dcs_cache[i]) {
306 dev_dbg(component->dev,
308 3 - i, wm8903->dcs_cache[i]);
311 wm8903->dcs_cache[i] & 0xff);
313 dev_dbg(component->dev,
314 "Calibrate DC servo %d\n", 3 - i);
320 if (wm8903->class_w_users)
327 WM8903_DCS_ENA_MASK, wm8903->dcs_pending);
337 if (wm8903->class_w_users)
340 for (i = 0; i < ARRAY_SIZE(wm8903->dcs_cache); i++) {
341 if (!(wm8903->dcs_pending & (1 << i)))
346 dev_dbg(component->dev, "DC servo %d: %x\n",
347 3 - i, val);
348 wm8903->dcs_cache[i] = val;
353 pr_warn("DCS mode %d delay not set\n", dcs_mode);
357 wm8903->dcs_pending = 0;
380 if (ucontrol->value.integer.value[0]) {
381 if (wm8903->class_w_users == 0) {
382 dev_dbg(component->dev, "Disabling Class W\n");
386 wm8903->class_w_users++;
393 if (!ucontrol->value.integer.value[0]) {
394 if (wm8903->class_w_users == 1) {
395 dev_dbg(component->dev, "Enabling Class W\n");
399 wm8903->class_w_users--;
402 dev_dbg(component->dev, "Bypass use count now %d\n",
403 wm8903->class_w_users);
423 if (wm8903->deemph) {
426 if (abs(wm8903_deemph[i] - wm8903->fs) <
427 abs(wm8903_deemph[best] - wm8903->fs))
437 dev_dbg(component->dev, "Set deemphasis %d (%dHz)\n",
450 ucontrol->value.integer.value[0] = wm8903->deemph;
460 unsigned int deemph = ucontrol->value.integer.value[0];
464 return -EINVAL;
466 mutex_lock(&wm8903->lock);
467 if (wm8903->deemph != deemph) {
468 wm8903->deemph = deemph;
474 mutex_unlock(&wm8903->lock);
480 static const DECLARE_TLV_DB_SCALE(digital_tlv, -7200, 75, 1);
484 static const DECLARE_TLV_DB_SCALE(digital_sidetone_tlv, -3600, 300, 0);
485 static const DECLARE_TLV_DB_SCALE(out_tlv, -5700, 100, 0);
488 static const DECLARE_TLV_DB_SCALE(drc_tlv_amp, -2250, 75, 0);
491 static const DECLARE_TLV_DB_SCALE(drc_tlv_startup, -300, 50, 0);
494 "Hi-fi", "Voice 1", "Voice 2", "Voice 3"
583 "Single-Ended", "Differential Line", "Differential Mic"
648 /* Input PGAs - No TLV since the scale depends on PGA mode */
677 SOC_ENUM("DRC FF Delay", drc_ff_delay),
960 { "Left Input Mode Mux", "Single-Ended", "Left Input Inverting Mux" },
970 { "Right Input Mode Mux", "Single-Ended",
1173 dev_dbg(component->dev, "Enabling Class W\n");
1216 struct snd_soc_component *component = codec_dai->component;
1219 wm8903->sysclk = freq;
1227 struct snd_soc_component *component = codec_dai->component;
1246 return -EINVAL;
1265 return -EINVAL;
1280 return -EINVAL;
1299 return -EINVAL;
1303 return -EINVAL;
1313 struct snd_soc_component *component = codec_dai->component;
1396 /* CLK_SYS/BCLK ratios - multiplied by 10 due to .5s */
1443 struct snd_soc_component *component = dai->component;
1468 /* Configure sample rate logic for DSP - choose nearest rate */
1470 best_val = abs(sample_rates[dsp_config].rate - fs);
1472 cur_val = abs(sample_rates[i].rate - fs);
1479 dev_dbg(component->dev, "DSP fs = %dHz\n", sample_rates[dsp_config].rate);
1502 return -EINVAL;
1505 dev_dbg(component->dev, "MCLK = %dHz, target sample rate = %dHz\n",
1506 wm8903->sysclk, fs);
1513 best_val = abs((wm8903->sysclk /
1515 clk_sys_ratios[0].div)) - fs);
1517 cur_val = abs((wm8903->sysclk /
1519 clk_sys_ratios[i].div)) - fs);
1529 clk_sys = wm8903->sysclk / 2;
1532 clk_sys = wm8903->sysclk;
1540 dev_dbg(component->dev, "CLK_SYS_RATE=%x, CLK_SYS_MODE=%x div=%d\n",
1545 dev_dbg(component->dev, "Actual CLK_SYS = %dHz\n", clk_sys);
1555 cur_val = ((clk_sys * 10) / bclk_divs[i].ratio) - bclk;
1565 dev_dbg(component->dev, "BCLK ratio %d for %dHz - actual BCLK = %dHz\n",
1572 wm8903->fs = params_rate(params);
1586 * wm8903_mic_detect - Enable microphone detection via the WM8903 IRQ
1590 * @det: value to report for presence detection
1603 int det, int shrt)
1608 dev_dbg(component->dev, "Enabling microphone detection: %x %x\n",
1609 det, shrt);
1612 wm8903->mic_jack = jack;
1613 wm8903->mic_det = det;
1614 wm8903->mic_short = shrt;
1617 if (det)
1626 if (det || shrt) {
1648 ret = regmap_read(wm8903->regmap, WM8903_INTERRUPT_STATUS_1_MASK,
1651 dev_err(wm8903->dev, "Failed to read IRQ mask: %d\n", ret);
1655 ret = regmap_read(wm8903->regmap, WM8903_INTERRUPT_STATUS_1, &int_val);
1657 dev_err(wm8903->dev, "Failed to read IRQ status: %d\n", ret);
1664 dev_warn(wm8903->dev, "Write sequencer done\n");
1669 * invert the polarity of the interrupt after each event - to
1674 mic_report = wm8903->mic_last_report;
1675 ret = regmap_read(wm8903->regmap, WM8903_INTERRUPT_POLARITY_1,
1678 dev_err(wm8903->dev, "Failed to read interrupt polarity: %d\n",
1685 trace_snd_soc_jack_irq(dev_name(wm8903->dev));
1689 dev_dbg(wm8903->dev, "Microphone short (pol=%x)\n", int_pol);
1691 mic_report ^= wm8903->mic_short;
1696 dev_dbg(wm8903->dev, "Microphone detect (pol=%x)\n", int_pol);
1698 mic_report ^= wm8903->mic_det;
1701 msleep(wm8903->mic_delay);
1704 regmap_update_bits(wm8903->regmap, WM8903_INTERRUPT_POLARITY_1,
1707 snd_soc_jack_report(wm8903->mic_jack, mic_report,
1708 wm8903->mic_short | wm8903->mic_det);
1710 wm8903->mic_last_report = mic_report;
1746 .name = "wm8903-hifi",
1769 regcache_sync(wm8903->regmap);
1778 return -EINVAL;
1793 ret = regmap_update_bits(wm8903->regmap,
1806 regmap_read(wm8903->regmap, WM8903_GPIO_CONTROL_1 + offset, ®);
1822 ret = regmap_update_bits(wm8903->regmap,
1835 return regmap_update_bits(wm8903->regmap,
1854 struct wm8903_platform_data *pdata = wm8903->pdata;
1857 wm8903->gpio_chip = wm8903_template_chip;
1858 wm8903->gpio_chip.ngpio = WM8903_NUM_GPIO;
1859 wm8903->gpio_chip.parent = wm8903->dev;
1861 if (pdata->gpio_base)
1862 wm8903->gpio_chip.base = pdata->gpio_base;
1864 wm8903->gpio_chip.base = -1;
1866 ret = gpiochip_add_data(&wm8903->gpio_chip, wm8903);
1868 dev_err(wm8903->dev, "Failed to add GPIOs: %d\n", ret);
1873 gpiochip_remove(&wm8903->gpio_chip);
1917 struct irq_data *irq_data = irq_get_irq_data(i2c->irq);
1919 dev_err(&i2c->dev, "Invalid IRQ: %d\n",
1920 i2c->irq);
1921 return -EINVAL;
1929 * so we are able to select active-high
1933 pdata->irq_active_low = false;
1936 pdata->irq_active_low = true;
1946 const struct device_node *np = i2c->dev.of_node;
1950 if (of_property_read_u32(np, "micdet-cfg", &val32) >= 0)
1951 pdata->micdet_cfg = val32;
1953 if (of_property_read_u32(np, "micdet-delay", &val32) >= 0)
1954 pdata->micdet_delay = val32;
1956 if (of_property_read_u32_array(np, "gpio-cfg", pdata->gpio_cfg,
1957 ARRAY_SIZE(pdata->gpio_cfg)) >= 0) {
1960 * 0xffffffff means "don't touch".
1962 * In platform data: 0 means "don't touch",
1970 for (i = 0; i < ARRAY_SIZE(pdata->gpio_cfg); i++) {
1971 if (pdata->gpio_cfg[i] == 0) {
1972 pdata->gpio_cfg[i] = WM8903_GPIO_CONFIG_ZERO;
1973 } else if (pdata->gpio_cfg[i] == 0xffffffff) {
1974 pdata->gpio_cfg[i] = 0;
1975 } else if (pdata->gpio_cfg[i] > 0x7fff) {
1976 dev_err(&i2c->dev, "Invalid gpio-cfg[%d] %x\n",
1977 i, pdata->gpio_cfg[i]);
1978 return -EINVAL;
1988 struct wm8903_platform_data *pdata = dev_get_platdata(&i2c->dev);
1995 wm8903 = devm_kzalloc(&i2c->dev, sizeof(*wm8903), GFP_KERNEL);
1997 return -ENOMEM;
1999 mutex_init(&wm8903->lock);
2000 wm8903->dev = &i2c->dev;
2002 wm8903->regmap = devm_regmap_init_i2c(i2c, &wm8903_regmap);
2003 if (IS_ERR(wm8903->regmap)) {
2004 ret = PTR_ERR(wm8903->regmap);
2005 dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
2014 wm8903->pdata = pdata;
2016 wm8903->pdata = devm_kzalloc(&i2c->dev, sizeof(*wm8903->pdata),
2018 if (!wm8903->pdata)
2019 return -ENOMEM;
2021 if (i2c->irq) {
2022 ret = wm8903_set_pdata_irq_trigger(i2c, wm8903->pdata);
2027 if (i2c->dev.of_node) {
2028 ret = wm8903_set_pdata_from_of(i2c, wm8903->pdata);
2034 pdata = wm8903->pdata;
2036 for (i = 0; i < ARRAY_SIZE(wm8903->supplies); i++)
2037 wm8903->supplies[i].supply = wm8903_supply_names[i];
2039 ret = devm_regulator_bulk_get(&i2c->dev, ARRAY_SIZE(wm8903->supplies),
2040 wm8903->supplies);
2042 dev_err(&i2c->dev, "Failed to request supplies: %d\n", ret);
2046 ret = regulator_bulk_enable(ARRAY_SIZE(wm8903->supplies),
2047 wm8903->supplies);
2049 dev_err(&i2c->dev, "Failed to enable supplies: %d\n", ret);
2053 ret = regmap_read(wm8903->regmap, WM8903_SW_RESET_AND_ID, &val);
2055 dev_err(&i2c->dev, "Failed to read chip ID: %d\n", ret);
2059 dev_err(&i2c->dev, "Device with ID %x is not a WM8903\n", val);
2060 ret = -ENODEV;
2064 ret = regmap_read(wm8903->regmap, WM8903_REVISION_NUMBER, &val);
2066 dev_err(&i2c->dev, "Failed to read chip revision: %d\n", ret);
2069 dev_info(&i2c->dev, "WM8903 revision %c\n",
2073 regmap_write(wm8903->regmap, WM8903_SW_RESET_AND_ID, 0x8903);
2078 for (i = 0; i < ARRAY_SIZE(pdata->gpio_cfg); i++) {
2079 if ((!pdata->gpio_cfg[i]) ||
2080 (pdata->gpio_cfg[i] > WM8903_GPIO_CONFIG_ZERO))
2083 regmap_write(wm8903->regmap, WM8903_GPIO_CONTROL_1 + i,
2084 pdata->gpio_cfg[i] & 0x7fff);
2086 val = (pdata->gpio_cfg[i] & WM8903_GP1_FN_MASK)
2100 regmap_write(wm8903->regmap, WM8903_MIC_BIAS_CONTROL_0,
2101 pdata->micdet_cfg);
2104 if (pdata->micdet_cfg)
2105 regmap_update_bits(wm8903->regmap, WM8903_WRITE_SEQUENCER_0,
2114 WARN_ON(!mic_gpio && (pdata->micdet_cfg & WM8903_MICDET_ENA));
2116 wm8903->mic_delay = pdata->micdet_delay;
2118 if (i2c->irq) {
2119 if (pdata->irq_active_low) {
2127 regmap_update_bits(wm8903->regmap, WM8903_INTERRUPT_CONTROL,
2130 ret = request_threaded_irq(i2c->irq, NULL, wm8903_irq,
2134 dev_err(wm8903->dev, "Failed to request IRQ: %d\n",
2140 regmap_update_bits(wm8903->regmap,
2146 regmap_update_bits(wm8903->regmap, WM8903_ADC_DIGITAL_VOLUME_LEFT,
2148 regmap_update_bits(wm8903->regmap, WM8903_ADC_DIGITAL_VOLUME_RIGHT,
2151 regmap_update_bits(wm8903->regmap, WM8903_DAC_DIGITAL_VOLUME_LEFT,
2153 regmap_update_bits(wm8903->regmap, WM8903_DAC_DIGITAL_VOLUME_RIGHT,
2156 regmap_update_bits(wm8903->regmap, WM8903_ANALOGUE_OUT1_LEFT,
2158 regmap_update_bits(wm8903->regmap, WM8903_ANALOGUE_OUT1_RIGHT,
2161 regmap_update_bits(wm8903->regmap, WM8903_ANALOGUE_OUT2_LEFT,
2163 regmap_update_bits(wm8903->regmap, WM8903_ANALOGUE_OUT2_RIGHT,
2166 regmap_update_bits(wm8903->regmap, WM8903_ANALOGUE_OUT3_LEFT,
2168 regmap_update_bits(wm8903->regmap, WM8903_ANALOGUE_OUT3_RIGHT,
2172 regmap_update_bits(wm8903->regmap, WM8903_DAC_DIGITAL_1,
2176 ret = devm_snd_soc_register_component(&i2c->dev,
2183 regulator_bulk_disable(ARRAY_SIZE(wm8903->supplies),
2184 wm8903->supplies);
2192 regulator_bulk_disable(ARRAY_SIZE(wm8903->supplies),
2193 wm8903->supplies);
2194 if (client->irq)
2195 free_irq(client->irq, wm8903);