Lines Matching full:mult
38 if (WARN_ON(!evt->mult)) in cev_delta2ns()
39 evt->mult = 1; in cev_delta2ns()
40 rnd = (u64) evt->mult - 1; in cev_delta2ns()
52 * For mult <= (1 << shift) we can safely add mult - 1 to in cev_delta2ns()
56 * For mult > (1 << shift), i.e. device frequency is > 1GHz we in cev_delta2ns()
57 * need to be careful. Adding mult - 1 will result in a value in cev_delta2ns()
59 * than latch by up to (mult - 1) >> shift. For the min_delta in cev_delta2ns()
69 (!ismax || evt->mult <= (1ULL << evt->shift))) in cev_delta2ns()
72 do_div(clc, evt->mult); in cev_delta2ns()
161 if (WARN_ON(!dev->mult)) in clockevents_switch_state()
162 dev->mult = 1; in clockevents_switch_state()
247 clc = ((unsigned long long) delta * dev->mult) >> dev->shift; in clockevents_program_min_delta()
286 clc = ((unsigned long long) delta * dev->mult) >> dev->shift; in clockevents_program_min_delta()
333 clc = ((unsigned long long) delta * dev->mult) >> dev->shift; in clockevents_program_event()