1 // SPDX-License-Identifier: GPL-2.0-or-later
4  * Copyright (C) 2006-2007, Advanced Micro Devices,Inc.
23 /* This is the complete list of PLL frequencies that we can set -
165 	freq = (unsigned int) (1000000000 / info->var.pixclock);  in lx_set_clock()
167 	min = abs(pll_table[0].freq - freq);  in lx_set_clock()
170 		diff = abs(pll_table[i].freq - freq);  in lx_set_clock()
182 	struct lxfb_par *par = info->par;  in lx_graphics_disable()
247 	struct lxfb_par *par = info->par;  in lx_graphics_enable()
263 	if (info->var.sync & FB_SYNC_HOR_HIGH_ACT)  in lx_graphics_enable()
266 	if (info->var.sync & FB_SYNC_VERT_HIGH_ACT)  in lx_graphics_enable()
269 	if (par->output & OUTPUT_PANEL) {  in lx_graphics_enable()
275 		if (!(info->var.sync & FB_SYNC_HOR_HIGH_ACT))  in lx_graphics_enable()
278 		if (!(info->var.sync & FB_SYNC_VERT_HIGH_ACT))  in lx_graphics_enable()
290 	if (par->output & OUTPUT_CRT) {  in lx_graphics_enable()
299 	if (par->output & OUTPUT_CRT) {  in lx_graphics_enable()
306 	if (par->output & OUTPUT_PANEL)  in lx_graphics_enable()
317 		/* The number of pages is (PMAX - PMIN)+1 */  in lx_framebuffer_size()
323 		val -= (lo & 0x000fffff);  in lx_framebuffer_size()
343 	struct lxfb_par *par = info->par;  in lx_set_mode()
364 	if (par->output & OUTPUT_PANEL) {  in lx_set_mode()
367 		if (par->output & OUTPUT_CRT)  in lx_set_mode()
398 	if (info->fix.line_length > 4096)  in lx_set_mode()
400 	else if (info->fix.line_length > 2048)  in lx_set_mode()
402 	else if (info->fix.line_length > 1024)  in lx_set_mode()
407 	max = info->fix.line_length * info->var.yres;  in lx_set_mode()
415 	size = info->var.xres * (info->var.bits_per_pixel >> 3);  in lx_set_mode()
417 	write_dc(par, DC_GFX_PITCH, info->fix.line_length >> 3);  in lx_set_mode()
447 	switch (info->var.bits_per_pixel) {  in lx_set_mode()
462 	/* Now - set up the timings */  in lx_set_mode()
464 	hactive = info->var.xres;  in lx_set_mode()
466 	hsyncstart = hblankstart + info->var.right_margin;  in lx_set_mode()
467 	hsyncend =  hsyncstart + info->var.hsync_len;  in lx_set_mode()
468 	hblankend = hsyncend + info->var.left_margin;  in lx_set_mode()
471 	vactive = info->var.yres;  in lx_set_mode()
473 	vsyncstart = vblankstart + info->var.lower_margin;  in lx_set_mode()
474 	vsyncend =  vsyncstart + info->var.vsync_len;  in lx_set_mode()
475 	vblankend = vsyncend + info->var.upper_margin;  in lx_set_mode()
478 	write_dc(par, DC_H_ACTIVE_TIMING, (hactive - 1) | ((htotal - 1) << 16));  in lx_set_mode()
480 			(hblankstart - 1) | ((hblankend - 1) << 16));  in lx_set_mode()
482 			(hsyncstart - 1) | ((hsyncend - 1) << 16));  in lx_set_mode()
484 	write_dc(par, DC_V_ACTIVE_TIMING, (vactive - 1) | ((vtotal - 1) << 16));  in lx_set_mode()
486 			(vblankstart - 1) | ((vblankend - 1) << 16));  in lx_set_mode()
488 			(vsyncstart - 1) | ((vsyncend - 1) << 16));  in lx_set_mode()
491 			(info->var.xres - 1) << 16 | (info->var.yres - 1));  in lx_set_mode()
493 	/* And re-enable the graphics output */  in lx_set_mode()
508 	struct lxfb_par *par = info->par;  in lx_set_palette_reg()
511 	/* Hardware palette is in RGB 8-8-8 format. */  in lx_set_palette_reg()
523 	struct lxfb_par *par = info->par;  in lx_blank_display()
545 		return -EINVAL;  in lx_blank_display()
569 	/* Power on/off flat panel */  in lx_blank_display()
571 	if (par->output & OUTPUT_PANEL) {  in lx_blank_display()
594 	rdmsrl(MSR_LX_MSR_PADSEL, par->msr.padsel);  in lx_save_regs()
595 	rdmsrl(MSR_GLCP_DOTPLL, par->msr.dotpll);  in lx_save_regs()
596 	rdmsrl(MSR_LX_GLD_MSR_CONFIG, par->msr.dfglcfg);  in lx_save_regs()
597 	rdmsrl(MSR_LX_SPARE_MSR, par->msr.dcspare);  in lx_save_regs()
602 	memcpy(par->gp, par->gp_regs, sizeof(par->gp));  in lx_save_regs()
603 	memcpy(par->dc, par->dc_regs, sizeof(par->dc));  in lx_save_regs()
604 	memcpy(par->vp, par->vp_regs, sizeof(par->vp));  in lx_save_regs()
605 	memcpy(par->fp, par->vp_regs + VP_FP_START, sizeof(par->fp));  in lx_save_regs()
609 	for (i = 0; i < ARRAY_SIZE(par->dc_pal); i++)  in lx_save_regs()
610 		par->dc_pal[i] = read_dc(par, DC_PAL_DATA);  in lx_save_regs()
614 	for (i = 0; i < ARRAY_SIZE(par->vp_pal); i++)  in lx_save_regs()
615 		par->vp_pal[i] = read_vp(par, VP_PDR);  in lx_save_regs()
618 	filt = par->dc[DC_IRQ_FILT_CTL] | DC_IRQ_FILT_CTL_H_FILT_SEL;  in lx_save_regs()
619 	for (i = 0; i < ARRAY_SIZE(par->hcoeff); i += 2) {  in lx_save_regs()
621 		par->hcoeff[i] = read_dc(par, DC_FILT_COEFF1);  in lx_save_regs()
622 		par->hcoeff[i + 1] = read_dc(par, DC_FILT_COEFF2);  in lx_save_regs()
627 	for (i = 0; i < ARRAY_SIZE(par->vcoeff); i++) {  in lx_save_regs()
629 		par->vcoeff[i] = read_dc(par, DC_FILT_COEFF1);  in lx_save_regs()
633 	memcpy(par->vp_coeff, par->vp_regs + VP_VCR, sizeof(par->vp_coeff));  in lx_save_regs()
641 	write_gp(par, GP_RASTER_MODE, par->gp[GP_RASTER_MODE]);  in lx_restore_gfx_proc()
643 	for (i = 0; i < ARRAY_SIZE(par->gp); i++) {  in lx_restore_gfx_proc()
657 			write_gp(par, i, par->gp[i]);  in lx_restore_gfx_proc()
667 	wrmsrl(MSR_LX_SPARE_MSR, par->msr.dcspare);  in lx_restore_display_ctlr()
669 	for (i = 0; i < ARRAY_SIZE(par->dc); i++) {  in lx_restore_display_ctlr()
684 			write_dc(par, i, par->dc[i] | DC_DV_CTL_CLEAR_DV_RAM);  in lx_restore_display_ctlr()
703 			write_dc(par, i, par->dc[i]);  in lx_restore_display_ctlr()
709 	for (i = 0; i < ARRAY_SIZE(par->dc_pal); i++)  in lx_restore_display_ctlr()
710 		write_dc(par, DC_PAL_DATA, par->dc_pal[i]);  in lx_restore_display_ctlr()
713 	filt = par->dc[DC_IRQ_FILT_CTL] | DC_IRQ_FILT_CTL_H_FILT_SEL;  in lx_restore_display_ctlr()
714 	for (i = 0; i < ARRAY_SIZE(par->hcoeff); i += 2) {  in lx_restore_display_ctlr()
716 		write_dc(par, DC_FILT_COEFF1, par->hcoeff[i]);  in lx_restore_display_ctlr()
717 		write_dc(par, DC_FILT_COEFF2, par->hcoeff[i + 1]);  in lx_restore_display_ctlr()
722 	for (i = 0; i < ARRAY_SIZE(par->vcoeff); i++) {  in lx_restore_display_ctlr()
724 		write_dc(par, DC_FILT_COEFF1, par->vcoeff[i]);  in lx_restore_display_ctlr()
732 	wrmsrl(MSR_LX_GLD_MSR_CONFIG, par->msr.dfglcfg);  in lx_restore_video_proc()
733 	wrmsrl(MSR_LX_MSR_PADSEL, par->msr.padsel);  in lx_restore_video_proc()
735 	for (i = 0; i < ARRAY_SIZE(par->vp); i++) {  in lx_restore_video_proc()
750 			write_vp(par, i, par->vp[i]);  in lx_restore_video_proc()
756 	for (i = 0; i < ARRAY_SIZE(par->vp_pal); i++)  in lx_restore_video_proc()
757 		write_vp(par, VP_PDR, par->vp_pal[i]);  in lx_restore_video_proc()
760 	memcpy(par->vp_regs + VP_VCR, par->vp_coeff, sizeof(par->vp_coeff));  in lx_restore_video_proc()
767 	lx_set_dotpll((u32) (par->msr.dotpll >> 32));  in lx_restore_regs()
772 	/* Flat Panel */  in lx_restore_regs()
773 	for (i = 0; i < ARRAY_SIZE(par->fp); i++) {  in lx_restore_regs()
785 			write_fp(par, i, par->fp[i]);  in lx_restore_regs()
790 	if (par->fp[FP_PM] & FP_PM_P) {  in lx_restore_regs()
794 			write_fp(par, FP_PM, par->fp[FP_PM]);  in lx_restore_regs()
799 			write_fp(par, FP_PM, par->fp[FP_PM]);  in lx_restore_regs()
803 	write_vp(par, VP_VCFG, par->vp[VP_VCFG]);  in lx_restore_regs()
804 	write_vp(par, VP_DCFG, par->vp[VP_DCFG]);  in lx_restore_regs()
805 	write_dc(par, DC_DISPLAY_CFG, par->dc[DC_DISPLAY_CFG]);  in lx_restore_regs()
807 	write_dc(par, DC_GENERAL_CFG, par->dc[DC_GENERAL_CFG]);  in lx_restore_regs()
815 	struct lxfb_par *par = info->par;  in lx_powerdown()
817 	if (par->powered_down)  in lx_powerdown()
823 	par->powered_down = 1;  in lx_powerdown()
829 	struct lxfb_par *par = info->par;  in lx_powerup()
831 	if (!par->powered_down)  in lx_powerup()
836 	par->powered_down = 0;  in lx_powerup()