Lines Matching +full:0 +full:xd1
19 #define REG01_PMS_P_MASK GENMASK(3, 0)
23 #define REG13_TG_CODE_LOW_MASK GENMASK(7, 0)
27 #define REG14_TG_CODE_HIGH_MASK GENMASK(0, 0)
30 #define REG21_PMS_S_MASK GENMASK(3, 0)
60 .pixclk = 0,
61 .pll_div_regs = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00 },
68 .pll_div_regs = { 0xd1, 0x4b, 0xf1, 0x89, 0x88, 0x80, 0x40 },
71 .pll_div_regs = { 0xd1, 0x50, 0xf1, 0x86, 0x85, 0x80, 0x40 },
74 .pll_div_regs = { 0xd1, 0x50, 0xf1, 0x99, 0x02, 0x80, 0x40 },
77 .pll_div_regs = { 0xd1, 0x54, 0xfc, 0xcc, 0x91, 0x80, 0x40 },
80 .pll_div_regs = { 0xd1, 0x5a, 0xf2, 0x89, 0x88, 0x80, 0x40 },
83 .pll_div_regs = { 0xd1, 0x5a, 0xf2, 0xfd, 0x0c, 0x80, 0x40 },
86 .pll_div_regs = { 0xd1, 0x62, 0xf4, 0x95, 0x08, 0x80, 0x40 },
89 .pll_div_regs = { 0xd1, 0x66, 0xf4, 0x82, 0x01, 0x88, 0x45 },
92 .pll_div_regs = { 0xd1, 0x66, 0xf4, 0x99, 0x18, 0x88, 0x45 },
95 .pll_div_regs = { 0xd1, 0x70, 0xf4, 0x82, 0x01, 0x80, 0x40 },
98 .pll_div_regs = { 0xd1, 0x58, 0xb8, 0x8b, 0x88, 0x80, 0x40 },
101 .pll_div_regs = { 0xd1, 0x5a, 0xb2, 0xfd, 0x0c, 0x80, 0x40 },
104 .pll_div_regs = { 0xd1, 0x5a, 0x92, 0xfd, 0x0c, 0x80, 0x40 },
107 .pll_div_regs = { 0xd1, 0x5c, 0x92, 0x98, 0x11, 0x84, 0x41 },
110 .pll_div_regs = { 0xd1, 0x62, 0x94, 0x95, 0x82, 0x80, 0x40 },
113 .pll_div_regs = { 0xd1, 0x63, 0x96, 0xa1, 0x82, 0x80, 0x40 },
116 .pll_div_regs = { 0xd1, 0x54, 0x7c, 0xc3, 0x8f, 0x80, 0x40 },
119 .pll_div_regs = { 0xd1, 0x58, 0x72, 0x84, 0x03, 0x82, 0x41 },
122 .pll_div_regs = { 0xd1, 0x5a, 0x72, 0x89, 0x88, 0x80, 0x40 },
125 .pll_div_regs = { 0xd1, 0x5a, 0x72, 0xfd, 0x0c, 0x80, 0x40 },
128 .pll_div_regs = { 0xd1, 0x62, 0x74, 0x95, 0x08, 0x80, 0x40 },
131 .pll_div_regs = { 0xd1, 0x62, 0x74, 0xdb, 0x52, 0x88, 0x47 },
134 .pll_div_regs = { 0xd1, 0x66, 0x74, 0x82, 0x01, 0x88, 0x45 },
137 .pll_div_regs = { 0xd1, 0x69, 0x74, 0x89, 0x08, 0x80, 0x40 },
140 .pll_div_regs = { 0xd1, 0x54, 0x52, 0x87, 0x03, 0x80, 0x40 },
143 .pll_div_regs = { 0xd1, 0x58, 0x58, 0x8b, 0x88, 0x80, 0x40 },
146 .pll_div_regs = { 0xd1, 0x5a, 0x52, 0xfd, 0x0c, 0x80, 0x40 },
149 .pll_div_regs = { 0xd1, 0x5d, 0x58, 0xdb, 0xA2, 0x88, 0x41 },
152 .pll_div_regs = { 0xd1, 0x5c, 0x52, 0x90, 0x0d, 0x84, 0x41 },
155 .pll_div_regs = { 0xd1, 0x62, 0x54, 0x87, 0x01, 0x80, 0x40 },
158 .pll_div_regs = { 0xd1, 0x66, 0x54, 0x82, 0x01, 0x88, 0x45 },
161 .pll_div_regs = { 0xd1, 0x67, 0x54, 0x88, 0x01, 0x90, 0x49 },
164 .pll_div_regs = { 0xd1, 0x70, 0x54, 0x84, 0x83, 0x80, 0x40 },
167 .pll_div_regs = { 0xd1, 0x70, 0x54, 0x82, 0x01, 0x80, 0x40 },
170 .pll_div_regs = { 0xd1, 0x4e, 0x32, 0xa7, 0x10, 0x80, 0x40 },
173 .pll_div_regs = { 0xd1, 0x50, 0x31, 0x86, 0x85, 0x80, 0x40 },
176 .pll_div_regs = { 0xd1, 0x52, 0x3a, 0xdb, 0x4c, 0x88, 0x47 },
179 .pll_div_regs = { 0xd1, 0x52, 0x32, 0x82, 0x01, 0x88, 0x47 },
182 .pll_div_regs = { 0xd1, 0x54, 0x3c, 0xc3, 0x8f, 0x80, 0x40 },
185 .pll_div_regs = { 0xd1, 0x55, 0x32, 0x8c, 0x05, 0x90, 0x4b },
188 .pll_div_regs = { 0xd1, 0x57, 0x32, 0x98, 0x07, 0x90, 0x49 },
191 .pll_div_regs = { 0xd1, 0x58, 0x32, 0x84, 0x03, 0x82, 0x41 },
194 .pll_div_regs = { 0xd1, 0x5a, 0x32, 0x89, 0x88, 0x80, 0x40 },
197 .pll_div_regs = { 0xd1, 0x5a, 0x32, 0xfd, 0x0c, 0x80, 0x40 },
200 .pll_div_regs = { 0xd1, 0x62, 0x34, 0x95, 0x08, 0x80, 0x40 },
203 .pll_div_regs = { 0xd1, 0x66, 0x34, 0x82, 0x01, 0x88, 0x45 },
206 .pll_div_regs = { 0xd1, 0x69, 0x34, 0x89, 0x08, 0x80, 0x40 },
209 .pll_div_regs = { 0xd1, 0x70, 0x34, 0x82, 0x01, 0x80, 0x40 },
212 .pll_div_regs = { 0xd1, 0x71, 0x39, 0xe9, 0x82, 0x9c, 0x5b },
215 .pll_div_regs = { 0xd1, 0x72, 0x38, 0x99, 0x10, 0x85, 0x41 },
218 .pll_div_regs = { 0xd1, 0x73, 0x35, 0x88, 0x05, 0x90, 0x4d },
221 .pll_div_regs = { 0xd1, 0x75, 0x36, 0xa7, 0x90, 0x80, 0x40 },
224 .pll_div_regs = { 0xd1, 0x7b, 0x35, 0xdb, 0x39, 0x90, 0x45 },
227 .pll_div_regs = { 0xd1, 0x7b, 0x35, 0x84, 0x03, 0x90, 0x45 },
230 .pll_div_regs = { 0xd1, 0x40, 0x18, 0x83, 0x01, 0x00, 0x40 },
233 .pll_div_regs = { 0xd1, 0x41, 0x11, 0xa7, 0x14, 0x80, 0x40 },
236 .pll_div_regs = { 0xd1, 0x42, 0x12, 0xa1, 0x20, 0x80, 0x40 },
239 .pll_div_regs = { 0xd1, 0x43, 0x18, 0x8b, 0x08, 0x96, 0x55 },
242 .pll_div_regs = { 0xd1, 0x45, 0x11, 0x83, 0x82, 0x90, 0x4b },
245 .pll_div_regs = { 0xd1, 0x45, 0x11, 0x84, 0x81, 0x90, 0x4b },
248 .pll_div_regs = { 0xd1, 0x4e, 0x12, 0x9a, 0x95, 0x80, 0x40 },
251 .pll_div_regs = { 0xd1, 0x4e, 0x12, 0xa7, 0x10, 0x80, 0x40 },
254 .pll_div_regs = { 0xd1, 0x52, 0x12, 0x82, 0x01, 0x88, 0x47 },
257 .pll_div_regs = { 0xd1, 0x55, 0x12, 0x8c, 0x05, 0x90, 0x4b },
260 .pll_div_regs = { 0xd1, 0x57, 0x12, 0x98, 0x07, 0x90, 0x49 },
263 .pll_div_regs = { 0xd1, 0x58, 0x12, 0x84, 0x03, 0x82, 0x41 },
266 .pll_div_regs = { 0xd1, 0x5a, 0x12, 0xfd, 0x0c, 0x80, 0x40 },
269 .pll_div_regs = { 0xd1, 0x69, 0x14, 0x89, 0x08, 0x80, 0x40 },
272 .pll_div_regs = { 0xd1, 0x73, 0x15, 0x88, 0x05, 0x90, 0x4d },
275 .pll_div_regs = { 0xd1, 0x7b, 0x15, 0x84, 0x03, 0x90, 0x45 },
285 { PHY_REG(0), 0x00 },
287 { PHY_REG(8), 0x4f }, { PHY_REG(9), 0x30 },
288 { PHY_REG(10), 0x33 }, { PHY_REG(11), 0x65 },
292 { PHY_REG(15), 0x80 }, { PHY_REG(16), 0x6c },
293 { PHY_REG(17), 0xf2 }, { PHY_REG(18), 0x67 },
294 { PHY_REG(19), 0x00 }, { PHY_REG(20), 0x10 },
296 { PHY_REG(22), 0x30 }, { PHY_REG(23), 0x32 },
297 { PHY_REG(24), 0x60 }, { PHY_REG(25), 0x8f },
298 { PHY_REG(26), 0x00 }, { PHY_REG(27), 0x00 },
299 { PHY_REG(28), 0x08 }, { PHY_REG(29), 0x00 },
300 { PHY_REG(30), 0x00 }, { PHY_REG(31), 0x00 },
301 { PHY_REG(32), 0x00 }, { PHY_REG(33), 0x80 },
302 { PHY_REG(34), 0x00 }, { PHY_REG(35), 0x00 },
303 { PHY_REG(36), 0x00 }, { PHY_REG(37), 0x00 },
304 { PHY_REG(38), 0x00 }, { PHY_REG(39), 0x00 },
305 { PHY_REG(40), 0x00 }, { PHY_REG(41), 0xe0 },
306 { PHY_REG(42), 0x83 }, { PHY_REG(43), 0x0f },
307 { PHY_REG(44), 0x3E }, { PHY_REG(45), 0xf8 },
308 { PHY_REG(46), 0x00 }, { PHY_REG(47), 0x00 }
381 unsigned long best_freq = 0; in fsl_samsung_hdmi_phy_find_pms()
382 u32 min_delta = 0xffffffff; in fsl_samsung_hdmi_phy_find_pms()
401 if (_s > 1 && (_s & 0x01) == 1) in fsl_samsung_hdmi_phy_find_pms()
417 if (_m < 0x30 || _m > 0x7b) in fsl_samsung_hdmi_phy_find_pms()
465 for (i = 0; i < ARRAY_SIZE(common_phy_cfg); i++) in fsl_samsung_hdmi_phy_configure()
469 for (i = 0; i < PHY_PLL_DIV_REGS_NUM; i++) in fsl_samsung_hdmi_phy_configure()
505 for (i = ARRAY_SIZE(phy_pll_cfg) - 1; i >= 0; i--) in fsl_samsung_hdmi_phy_lookup_rate()
516 cal_phy->pll_div_regs[0] = FIELD_PREP(REG01_PMS_P_MASK, p); in fsl_samsung_hdmi_calculate_phy()
634 init.flags = 0; in phy_clk_register()
650 return 0; in phy_clk_register()
665 phy->regs = devm_platform_ioremap_resource(pdev, 0); in fsl_samsung_hdmi_phy_probe()
697 return 0; in fsl_samsung_hdmi_phy_probe()
716 return 0; in fsl_samsung_hdmi_phy_suspend()
722 int ret = 0; in fsl_samsung_hdmi_phy_resume()