Lines Matching full:trans
6 #include "iwl-trans.h"
33 iwl_pcie_ctxt_info_dbg_enable(struct iwl_trans *trans, in iwl_pcie_ctxt_info_dbg_enable() argument
41 if (!iwl_trans_dbg_ini_valid(trans)) { in iwl_pcie_ctxt_info_dbg_enable()
42 struct iwl_dram_data *fw_mon = &trans->dbg.fw_mon; in iwl_pcie_ctxt_info_dbg_enable()
44 iwl_pcie_alloc_fw_monitor(trans, 0); in iwl_pcie_ctxt_info_dbg_enable()
49 IWL_DEBUG_FW(trans, in iwl_pcie_ctxt_info_dbg_enable()
59 fw_mon_cfg = &trans->dbg.fw_mon_cfg[alloc_id]; in iwl_pcie_ctxt_info_dbg_enable()
64 IWL_DEBUG_FW(trans, in iwl_pcie_ctxt_info_dbg_enable()
70 IWL_DEBUG_FW(trans, in iwl_pcie_ctxt_info_dbg_enable()
75 if (trans->dbg.fw_mon_ini[alloc_id].num_frags) { in iwl_pcie_ctxt_info_dbg_enable()
77 &trans->dbg.fw_mon_ini[alloc_id].frags[0]; in iwl_pcie_ctxt_info_dbg_enable()
81 dbg_cfg->debug_token_config = cpu_to_le32(trans->dbg.ucode_preset); in iwl_pcie_ctxt_info_dbg_enable()
82 IWL_DEBUG_FW(trans, in iwl_pcie_ctxt_info_dbg_enable()
85 IWL_DEBUG_FW(trans, in iwl_pcie_ctxt_info_dbg_enable()
88 trans->dbg.fw_mon_ini[alloc_id].num_frags); in iwl_pcie_ctxt_info_dbg_enable()
92 IWL_DEBUG_FW(trans, "WRT: Invalid buffer destination (%d)\n", in iwl_pcie_ctxt_info_dbg_enable()
100 int iwl_pcie_ctxt_info_v2_alloc(struct iwl_trans *trans, in iwl_pcie_ctxt_info_v2_alloc() argument
104 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); in iwl_pcie_ctxt_info_v2_alloc()
113 trans->mac_cfg->base->min_txq_size); in iwl_pcie_ctxt_info_v2_alloc()
115 switch (trans->conf.rx_buf_size) { in iwl_pcie_ctxt_info_v2_alloc()
135 if (trans->conf.dsbr_urm_fw_dependent) in iwl_pcie_ctxt_info_v2_alloc()
138 if (trans->conf.dsbr_urm_permanent) in iwl_pcie_ctxt_info_v2_alloc()
141 if (trans->conf.ext_32khz_clock_valid) in iwl_pcie_ctxt_info_v2_alloc()
145 prph_scratch = dma_alloc_coherent(trans->dev, sizeof(*prph_scratch), in iwl_pcie_ctxt_info_v2_alloc()
155 cpu_to_le16((u16)trans->info.hw_rev); in iwl_pcie_ctxt_info_v2_alloc()
161 if (trans->mac_cfg->imr_enabled) in iwl_pcie_ctxt_info_v2_alloc()
164 if (CSR_HW_REV_TYPE(trans->info.hw_rev) == IWL_CFG_MAC_TYPE_GL && in iwl_pcie_ctxt_info_v2_alloc()
167 IWL_DEBUG_FW(trans, in iwl_pcie_ctxt_info_v2_alloc()
172 if (trans->do_top_reset) { in iwl_pcie_ctxt_info_v2_alloc()
173 WARN_ON(trans->mac_cfg->device_family < IWL_DEVICE_FAMILY_SC); in iwl_pcie_ctxt_info_v2_alloc()
181 iwl_pcie_ctxt_info_dbg_enable(trans, &prph_sc_ctrl->hwm_cfg, in iwl_pcie_ctxt_info_v2_alloc()
188 cpu_to_le32(trans->conf.mbx_addr_0_step); in iwl_pcie_ctxt_info_v2_alloc()
190 cpu_to_le32(trans->conf.mbx_addr_1_step); in iwl_pcie_ctxt_info_v2_alloc()
193 ret = iwl_pcie_init_fw_sec(trans, img, &prph_scratch->dram.common); in iwl_pcie_ctxt_info_v2_alloc()
207 prph_info = dma_alloc_coherent(trans->dev, PAGE_SIZE, in iwl_pcie_ctxt_info_v2_alloc()
216 ctxt_info_v2 = dma_alloc_coherent(trans->dev, in iwl_pcie_ctxt_info_v2_alloc()
253 cpu_to_le64(trans_pcie->txqs.txq[trans->conf.cmd_queue]->dma_addr); in iwl_pcie_ctxt_info_v2_alloc()
259 cpu_to_le16(RX_QUEUE_CB_SIZE(iwl_trans_get_num_rbds(trans))); in iwl_pcie_ctxt_info_v2_alloc()
267 trans_pcie->iml = dma_alloc_coherent(trans->dev, fw->iml_len, in iwl_pcie_ctxt_info_v2_alloc()
280 dma_free_coherent(trans->dev, sizeof(*trans_pcie->ctxt_info_v2), in iwl_pcie_ctxt_info_v2_alloc()
285 dma_free_coherent(trans->dev, PAGE_SIZE, prph_info, in iwl_pcie_ctxt_info_v2_alloc()
289 dma_free_coherent(trans->dev, in iwl_pcie_ctxt_info_v2_alloc()
297 void iwl_pcie_ctxt_info_v2_kick(struct iwl_trans *trans) in iwl_pcie_ctxt_info_v2_kick() argument
299 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); in iwl_pcie_ctxt_info_v2_kick()
301 iwl_enable_fw_load_int_ctx_info(trans, trans->do_top_reset); in iwl_pcie_ctxt_info_v2_kick()
304 iwl_write64(trans, CSR_CTXT_INFO_ADDR, trans_pcie->ctxt_info_dma_addr); in iwl_pcie_ctxt_info_v2_kick()
305 iwl_write64(trans, CSR_IML_DATA_ADDR, trans_pcie->iml_dma_addr); in iwl_pcie_ctxt_info_v2_kick()
306 iwl_write32(trans, CSR_IML_SIZE_ADDR, trans_pcie->iml_len); in iwl_pcie_ctxt_info_v2_kick()
308 iwl_set_bit(trans, CSR_CTXT_INFO_BOOT_CTRL, in iwl_pcie_ctxt_info_v2_kick()
312 void iwl_pcie_ctxt_info_v2_free(struct iwl_trans *trans, bool alive) in iwl_pcie_ctxt_info_v2_free() argument
314 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); in iwl_pcie_ctxt_info_v2_free()
317 dma_free_coherent(trans->dev, trans_pcie->iml_len, in iwl_pcie_ctxt_info_v2_free()
325 iwl_pcie_ctxt_info_free_fw_img(trans); in iwl_pcie_ctxt_info_v2_free()
334 dma_free_coherent(trans->dev, sizeof(*trans_pcie->ctxt_info_v2), in iwl_pcie_ctxt_info_v2_free()
340 dma_free_coherent(trans->dev, sizeof(*trans_pcie->prph_scratch), in iwl_pcie_ctxt_info_v2_free()
347 dma_free_coherent(trans->dev, PAGE_SIZE, trans_pcie->prph_info, in iwl_pcie_ctxt_info_v2_free()
353 static int iwl_pcie_load_payloads_contig(struct iwl_trans *trans, in iwl_pcie_load_payloads_contig() argument
360 IWL_DEBUG_FW(trans, "expected 2 payloads, got %d.\n", in iwl_pcie_load_payloads_contig()
368 IWL_DEBUG_FW(trans, "sizes of payloads overflow.\n"); in iwl_pcie_load_payloads_contig()
373 dram->block = iwl_pcie_ctxt_info_dma_alloc_coherent(trans, len, in iwl_pcie_load_payloads_contig()
376 IWL_DEBUG_FW(trans, "Failed to allocate PNVM DMA.\n"); in iwl_pcie_load_payloads_contig()
388 (struct iwl_trans *trans, in iwl_pcie_load_payloads_segments() argument
402 (trans, in iwl_pcie_load_payloads_segments()
406 IWL_DEBUG_FW(trans, "Failed to allocate PNVM DMA.\n"); in iwl_pcie_load_payloads_segments()
418 if (iwl_pcie_ctxt_info_alloc_dma(trans, in iwl_pcie_load_payloads_segments()
423 trans->dev); in iwl_pcie_load_payloads_segments()
442 int iwl_trans_pcie_ctx_info_v2_load_pnvm(struct iwl_trans *trans, in iwl_trans_pcie_ctx_info_v2_load_pnvm() argument
446 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); in iwl_trans_pcie_ctx_info_v2_load_pnvm()
453 if (trans->pnvm_loaded) in iwl_trans_pcie_ctx_info_v2_load_pnvm()
459 if (trans->mac_cfg->device_family < IWL_DEVICE_FAMILY_AX210) in iwl_trans_pcie_ctx_info_v2_load_pnvm()
463 IWL_DEBUG_FW(trans, "no payloads\n"); in iwl_trans_pcie_ctx_info_v2_load_pnvm()
469 ret = iwl_pcie_load_payloads_segments(trans, in iwl_trans_pcie_ctx_info_v2_load_pnvm()
473 trans->pnvm_loaded = true; in iwl_trans_pcie_ctx_info_v2_load_pnvm()
476 ret = iwl_pcie_load_payloads_contig(trans, pnvm_payloads, in iwl_trans_pcie_ctx_info_v2_load_pnvm()
480 trans->pnvm_loaded = true; in iwl_trans_pcie_ctx_info_v2_load_pnvm()
499 static void iwl_pcie_set_pnvm_segments(struct iwl_trans *trans) in iwl_pcie_set_pnvm_segments() argument
501 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); in iwl_pcie_set_pnvm_segments()
512 static void iwl_pcie_set_contig_pnvm(struct iwl_trans *trans) in iwl_pcie_set_contig_pnvm() argument
514 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); in iwl_pcie_set_contig_pnvm()
524 void iwl_trans_pcie_ctx_info_v2_set_pnvm(struct iwl_trans *trans, in iwl_trans_pcie_ctx_info_v2_set_pnvm() argument
527 if (trans->mac_cfg->device_family < IWL_DEVICE_FAMILY_AX210) in iwl_trans_pcie_ctx_info_v2_set_pnvm()
531 iwl_pcie_set_pnvm_segments(trans); in iwl_trans_pcie_ctx_info_v2_set_pnvm()
533 iwl_pcie_set_contig_pnvm(trans); in iwl_trans_pcie_ctx_info_v2_set_pnvm()
536 int iwl_trans_pcie_ctx_info_v2_load_reduce_power(struct iwl_trans *trans, in iwl_trans_pcie_ctx_info_v2_load_reduce_power() argument
540 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); in iwl_trans_pcie_ctx_info_v2_load_reduce_power()
547 if (trans->reduce_power_loaded) in iwl_trans_pcie_ctx_info_v2_load_reduce_power()
550 if (trans->mac_cfg->device_family < IWL_DEVICE_FAMILY_AX210) in iwl_trans_pcie_ctx_info_v2_load_reduce_power()
557 IWL_DEBUG_FW(trans, "no payloads\n"); in iwl_trans_pcie_ctx_info_v2_load_reduce_power()
563 ret = iwl_pcie_load_payloads_segments(trans, in iwl_trans_pcie_ctx_info_v2_load_reduce_power()
567 trans->reduce_power_loaded = true; in iwl_trans_pcie_ctx_info_v2_load_reduce_power()
570 ret = iwl_pcie_load_payloads_contig(trans, payloads, in iwl_trans_pcie_ctx_info_v2_load_reduce_power()
574 trans->reduce_power_loaded = true; in iwl_trans_pcie_ctx_info_v2_load_reduce_power()
581 static void iwl_pcie_set_reduce_power_segments(struct iwl_trans *trans) in iwl_pcie_set_reduce_power_segments() argument
583 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); in iwl_pcie_set_reduce_power_segments()
594 static void iwl_pcie_set_contig_reduce_power(struct iwl_trans *trans) in iwl_pcie_set_contig_reduce_power() argument
596 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); in iwl_pcie_set_contig_reduce_power()
607 iwl_trans_pcie_ctx_info_v2_set_reduce_power(struct iwl_trans *trans, in iwl_trans_pcie_ctx_info_v2_set_reduce_power() argument
610 if (trans->mac_cfg->device_family < IWL_DEVICE_FAMILY_AX210) in iwl_trans_pcie_ctx_info_v2_set_reduce_power()
614 iwl_pcie_set_reduce_power_segments(trans); in iwl_trans_pcie_ctx_info_v2_set_reduce_power()
616 iwl_pcie_set_contig_reduce_power(trans); in iwl_trans_pcie_ctx_info_v2_set_reduce_power()