3227 		    arvif->rate_ctrl[i] || arvif->rtscts[i]) {  in ath10k_new_peer_tid_config()
3233 			arg.rate_ctrl = arvif->rate_ctrl[i];  in ath10k_new_peer_tid_config()
3247 			arg.rate_ctrl = WMI_TID_CONFIG_RATE_CONTROL_DEFAULT_LOWEST_RATE;  in ath10k_new_peer_tid_config()
7037 			      u32 *rate_ctrl_flag, u8 *rate_ctrl,  in ath10k_mac_tid_bitrate_config()  argument
7050 		*rate_ctrl = WMI_TID_CONFIG_RATE_CONTROL_AUTO;  in ath10k_mac_tid_bitrate_config()
7076 		*rate_ctrl = WMI_TID_CONFIG_RATE_CONTROL_FIXED_RATE;  in ath10k_mac_tid_bitrate_config()
7080 		*rate_ctrl = WMI_PEER_TID_CONFIG_RATE_UPPER_CAP;  in ath10k_mac_tid_bitrate_config()
7110 				arg->rate_ctrl = 0;  in ath10k_mac_set_tid_config()
7127 				arg->rate_ctrl = 0;  in ath10k_mac_set_tid_config()
7143 			arg->rate_ctrl = 0;  in ath10k_mac_set_tid_config()
7159 			arsta->rate_ctrl[arg->tid] = arg->rate_ctrl;  in ath10k_mac_set_tid_config()
7160 			arg->rate_ctrl = 0;  in ath10k_mac_set_tid_config()
7179 				arvif->rate_ctrl[arg->tid] = arg->rate_ctrl;  in ath10k_mac_set_tid_config()
7203 				arvif->rate_ctrl[arg->tid] = arg->rate_ctrl;  in ath10k_mac_set_tid_config()
7244 				arg->rate_ctrl =  in ath10k_mac_parse_tid_config()
7251 				arg->rate_ctrl =  in ath10k_mac_parse_tid_config()
7272 							    &arg->rate_ctrl,  in ath10k_mac_parse_tid_config()
7279 				arg->rate_ctrl = 0;  in ath10k_mac_parse_tid_config()
7318 		arg.rate_ctrl = WMI_TID_CONFIG_RATE_CONTROL_AUTO;  in ath10k_mac_reset_tid_config()
7334 			arsta->rate_ctrl[i] = 0;  in ath10k_mac_reset_tid_config()
7341 			arvif->rate_ctrl[i] = 0;  in ath10k_mac_reset_tid_config()
7389 				arg.rate_ctrl = arvif->rate_ctrl[i];  in ath10k_sta_tid_cfg_wk()
7422 			    arvif->rate_ctrl[i] > WMI_TID_CONFIG_RATE_CONTROL_AUTO) {  in ath10k_sta_tid_cfg_wk()
7423 				arg.rate_ctrl = 0;  in ath10k_sta_tid_cfg_wk()
7427 			if (arsta->rate_ctrl[i] >  in ath10k_sta_tid_cfg_wk()
7431 				arg.rate_ctrl = 0;  in ath10k_sta_tid_cfg_wk()
7434 				arg.rate_ctrl = arvif->rate_ctrl[i];  in ath10k_sta_tid_cfg_wk()
7464 		arg.rate_ctrl = 0;  in ath10k_sta_tid_cfg_wk()