Lines Matching +full:tcb +full:- +full:timer
2 * 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs
10 *------------------------------------------------------------------------------
66 #include <linux/timer.h>
87 MODULE_DESCRIPTION("10/100/1000 Base-T Ethernet Driver for the ET1310 by Agere Systems");
106 * In both cases, when flow control is enabled for either Tx or bi-direction,
156 #define ET131X_PCI_DEVICE_ID_GIG 0xED00 /* ET1310 1000 Base-T 8 */
157 #define ET131X_PCI_DEVICE_ID_FAST 0xED01 /* ET1310 100 Base-T */
173 /* number of RFDs - default and min */
189 u32 word2; /* Bits 10-31 reserved, 0-9 descriptor */
197 * PE-MCXMAC Data Sheet IPD DS54 0210-1 (also IPD-DS80 0205-2)
210 * 11-15: unused
229 * 0-15: length length in bytes
230 * 16-25: bi Buffer Index
231 * 26-27: ri Ring Index
232 * 28-31: reserved
242 * that get copied out to memory by the ET-1310. Word 0 is a 32 bit word
245 * bit 0-9 FBR1 offset
247 * bit 16-25 FBR0 offset
252 * that get copied out to memory by the ET-1310. Word 3 is a 32 bit word
255 * bit 0-15 reserved
256 * bit 16-27 PSRoffset
258 * bit 29-31 unused
269 /* Structure for look-up table holding free buffer ring pointers, addresses
307 /* word 2 of the control bits in the Tx Descriptor ring for the ET-1310
309 * 0-15: length of packet
310 * 16-27: VLAN tag
312 * 29-31: VLAN priority
314 * word 3 of the control bits in the Tx Descriptor ring for the ET-1310
319 * 3: Control word - no packet data
320 * 4: Issue half-duplex backpressure : XON/XOFF
348 /* TCB (Transmit Control Block: Host Side) */
349 struct tcb { struct
350 struct tcb *next; /* Next entry in ring */ argument
360 /* TCB (Transmit Control Block) memory and lists */
361 struct tcb *tcb_ring; argument
364 struct tcb *tcb_qhead;
365 struct tcb *tcb_qtail;
368 struct tcb *send_head;
369 struct tcb *send_tail;
379 /* The location of the write-back status block */
395 * should be re-populated to these #defines:
459 spinlock_t tcb_send_qlock; /* protects the tx_ring send tcb list */
460 spinlock_t tcb_ready_qlock; /* protects the tx_ring ready tcb list */
478 u8 flow; /* flow control validated by the far-end */
480 /* Minimize init-time */
509 return -EIO; in eeprom_wait_ready()
518 return -ETIMEDOUT; in eeprom_wait_ready()
523 struct pci_dev *pdev = adapter->pdev; in eeprom_write()
550 return -EIO; in eeprom_write()
577 adapter->pdev->revision == 0) in eeprom_write()
626 return writeok ? 0 : -EIO; in eeprom_write()
631 struct pci_dev *pdev = adapter->pdev; in eeprom_read()
648 return -EIO; in eeprom_read()
653 return -EIO; in eeprom_read()
666 return (status & LBCIF_STATUS_ACK_ERROR) ? -EIO : 0; in eeprom_read()
671 struct pci_dev *pdev = adapter->pdev; in et131x_init_eeprom()
683 dev_err(&pdev->dev, in et131x_init_eeprom()
685 return -EIO; in et131x_init_eeprom()
694 if (pdev->revision == 0x01) { in et131x_init_eeprom()
698 /* Re-write the first 4 bytes if we have an eeprom in et131x_init_eeprom()
706 if (pdev->revision != 0x01 || write_failed) { in et131x_init_eeprom()
707 dev_err(&pdev->dev, in et131x_init_eeprom()
708 "Fatal EEPROM Status Error - 0x%04x\n", in et131x_init_eeprom()
717 adapter->has_eeprom = false; in et131x_init_eeprom()
718 return -EIO; in et131x_init_eeprom()
721 adapter->has_eeprom = true; in et131x_init_eeprom()
726 eeprom_read(adapter, 0x70, &adapter->eeprom_data[0]); in et131x_init_eeprom()
727 eeprom_read(adapter, 0x71, &adapter->eeprom_data[1]); in et131x_init_eeprom()
729 if (adapter->eeprom_data[0] != 0xcd) in et131x_init_eeprom()
731 adapter->eeprom_data[1] = 0x00; in et131x_init_eeprom()
740 struct rx_ring *rx_ring = &adapter->rx_ring; in et131x_rx_dma_enable()
742 if (rx_ring->fbr[1]->buffsize == 4096) in et131x_rx_dma_enable()
744 else if (rx_ring->fbr[1]->buffsize == 8192) in et131x_rx_dma_enable()
746 else if (rx_ring->fbr[1]->buffsize == 16384) in et131x_rx_dma_enable()
750 if (rx_ring->fbr[0]->buffsize == 256) in et131x_rx_dma_enable()
752 else if (rx_ring->fbr[0]->buffsize == 512) in et131x_rx_dma_enable()
754 else if (rx_ring->fbr[0]->buffsize == 1024) in et131x_rx_dma_enable()
756 writel(csr, &adapter->regs->rxdma.csr); in et131x_rx_dma_enable()
758 csr = readl(&adapter->regs->rxdma.csr); in et131x_rx_dma_enable()
761 csr = readl(&adapter->regs->rxdma.csr); in et131x_rx_dma_enable()
763 dev_err(&adapter->pdev->dev, in et131x_rx_dma_enable()
775 &adapter->regs->rxdma.csr); in et131x_rx_dma_disable()
776 csr = readl(&adapter->regs->rxdma.csr); in et131x_rx_dma_disable()
779 csr = readl(&adapter->regs->rxdma.csr); in et131x_rx_dma_disable()
781 dev_err(&adapter->pdev->dev, in et131x_rx_dma_disable()
793 &adapter->regs->txdma.csr); in et131x_tx_dma_enable()
808 struct mac_regs __iomem *macregs = &adapter->regs->mac; in et1310_config_mac_regs1()
819 ¯egs->cfg1); in et1310_config_mac_regs1()
821 /* Next lets configure the MAC Inter-packet gap register */ in et1310_config_mac_regs1()
824 writel(ipg, ¯egs->ipg); in et1310_config_mac_regs1()
828 writel(0x00A1F037, ¯egs->hfdp); in et1310_config_mac_regs1()
831 writel(0, ¯egs->if_ctrl); in et1310_config_mac_regs1()
833 writel(ET_MAC_MIIMGMT_CLK_RST, ¯egs->mii_mgmt_cfg); in et1310_config_mac_regs1()
842 station2 = (adapter->addr[1] << ET_MAC_STATION_ADDR2_OC2_SHIFT) | in et1310_config_mac_regs1()
843 (adapter->addr[0] << ET_MAC_STATION_ADDR2_OC1_SHIFT); in et1310_config_mac_regs1()
844 station1 = (adapter->addr[5] << ET_MAC_STATION_ADDR1_OC6_SHIFT) | in et1310_config_mac_regs1()
845 (adapter->addr[4] << ET_MAC_STATION_ADDR1_OC5_SHIFT) | in et1310_config_mac_regs1()
846 (adapter->addr[3] << ET_MAC_STATION_ADDR1_OC4_SHIFT) | in et1310_config_mac_regs1()
847 adapter->addr[2]; in et1310_config_mac_regs1()
848 writel(station1, ¯egs->station_addr_1); in et1310_config_mac_regs1()
849 writel(station2, ¯egs->station_addr_2); in et1310_config_mac_regs1()
858 writel(adapter->registry_jumbo_packet + 4, ¯egs->max_fm_len); in et1310_config_mac_regs1()
861 writel(0, ¯egs->cfg1); in et1310_config_mac_regs1()
867 struct mac_regs __iomem *mac = &adapter->regs->mac; in et1310_config_mac_regs2()
868 struct phy_device *phydev = adapter->netdev->phydev; in et1310_config_mac_regs2()
874 ctl = readl(&adapter->regs->txmac.ctl); in et1310_config_mac_regs2()
875 cfg1 = readl(&mac->cfg1); in et1310_config_mac_regs2()
876 cfg2 = readl(&mac->cfg2); in et1310_config_mac_regs2()
877 ifctrl = readl(&mac->if_ctrl); in et1310_config_mac_regs2()
881 if (phydev->speed == SPEED_1000) { in et1310_config_mac_regs2()
893 if (adapter->flow == FLOW_RXONLY || adapter->flow == FLOW_BOTH) in et1310_config_mac_regs2()
895 writel(cfg1, &mac->cfg1); in et1310_config_mac_regs2()
908 if (phydev->duplex == DUPLEX_FULL) in et1310_config_mac_regs2()
912 if (phydev->duplex == DUPLEX_HALF) in et1310_config_mac_regs2()
915 writel(ifctrl, &mac->if_ctrl); in et1310_config_mac_regs2()
916 writel(cfg2, &mac->cfg2); in et1310_config_mac_regs2()
921 cfg1 = readl(&mac->cfg1); in et1310_config_mac_regs2()
925 dev_warn(&adapter->pdev->dev, in et1310_config_mac_regs2()
931 writel(ctl, &adapter->regs->txmac.ctl); in et1310_config_mac_regs2()
933 if (adapter->flags & FMP_ADAPTER_LOWER_POWER) { in et1310_config_mac_regs2()
941 u32 pmcsr = readl(&adapter->regs->global.pm_csr); in et1310_in_phy_coma()
948 struct rxmac_regs __iomem *rxmac = &adapter->regs->rxmac; in et1310_setup_device_for_multicast()
955 * the multi-cast LIST. If it is NOT specified, (and "ALL" is not in et1310_setup_device_for_multicast()
956 * specified) then we should pass NO multi-cast addresses to the in et1310_setup_device_for_multicast()
959 if (adapter->packet_filter & ET131X_PACKET_TYPE_MULTICAST) { in et1310_setup_device_for_multicast()
963 for (i = 0; i < adapter->multicast_addr_count; i++) { in et1310_setup_device_for_multicast()
966 result = ether_crc(6, adapter->multicast_list[i]); in et1310_setup_device_for_multicast()
973 result -= 32; in et1310_setup_device_for_multicast()
976 result -= 64; in et1310_setup_device_for_multicast()
979 result -= 96; in et1310_setup_device_for_multicast()
987 writel(hash1, &rxmac->multi_hash1); in et1310_setup_device_for_multicast()
988 writel(hash2, &rxmac->multi_hash2); in et1310_setup_device_for_multicast()
989 writel(hash3, &rxmac->multi_hash3); in et1310_setup_device_for_multicast()
990 writel(hash4, &rxmac->multi_hash4); in et1310_setup_device_for_multicast()
996 struct rxmac_regs __iomem *rxmac = &adapter->regs->rxmac; in et1310_setup_device_for_unicast()
1004 * Set up unicast packet filter reg 2 to be the octets 2 - 5 of the in et1310_setup_device_for_unicast()
1007 * Set up unicast packet filter reg 3 to be the octets 2 - 5 of the in et1310_setup_device_for_unicast()
1010 uni_pf3 = (adapter->addr[0] << ET_RX_UNI_PF_ADDR2_1_SHIFT) | in et1310_setup_device_for_unicast()
1011 (adapter->addr[1] << ET_RX_UNI_PF_ADDR2_2_SHIFT) | in et1310_setup_device_for_unicast()
1012 (adapter->addr[0] << ET_RX_UNI_PF_ADDR1_1_SHIFT) | in et1310_setup_device_for_unicast()
1013 adapter->addr[1]; in et1310_setup_device_for_unicast()
1015 uni_pf2 = (adapter->addr[2] << ET_RX_UNI_PF_ADDR2_3_SHIFT) | in et1310_setup_device_for_unicast()
1016 (adapter->addr[3] << ET_RX_UNI_PF_ADDR2_4_SHIFT) | in et1310_setup_device_for_unicast()
1017 (adapter->addr[4] << ET_RX_UNI_PF_ADDR2_5_SHIFT) | in et1310_setup_device_for_unicast()
1018 adapter->addr[5]; in et1310_setup_device_for_unicast()
1020 uni_pf1 = (adapter->addr[2] << ET_RX_UNI_PF_ADDR1_3_SHIFT) | in et1310_setup_device_for_unicast()
1021 (adapter->addr[3] << ET_RX_UNI_PF_ADDR1_4_SHIFT) | in et1310_setup_device_for_unicast()
1022 (adapter->addr[4] << ET_RX_UNI_PF_ADDR1_5_SHIFT) | in et1310_setup_device_for_unicast()
1023 adapter->addr[5]; in et1310_setup_device_for_unicast()
1026 writel(uni_pf1, &rxmac->uni_pf_addr1); in et1310_setup_device_for_unicast()
1027 writel(uni_pf2, &rxmac->uni_pf_addr2); in et1310_setup_device_for_unicast()
1028 writel(uni_pf3, &rxmac->uni_pf_addr3); in et1310_setup_device_for_unicast()
1034 struct rxmac_regs __iomem *rxmac = &adapter->regs->rxmac; in et1310_config_rxmac_regs()
1035 struct phy_device *phydev = adapter->netdev->phydev; in et1310_config_rxmac_regs()
1042 writel(0x8, &rxmac->ctrl); in et1310_config_rxmac_regs()
1045 writel(0, &rxmac->crc0); in et1310_config_rxmac_regs()
1046 writel(0, &rxmac->crc12); in et1310_config_rxmac_regs()
1047 writel(0, &rxmac->crc34); in et1310_config_rxmac_regs()
1049 /* We need to set the WOL mask0 - mask4 next. We initialize it to in et1310_config_rxmac_regs()
1053 for (wolw = &rxmac->mask0_word0; wolw <= &rxmac->mask4_word3; wolw++) in et1310_config_rxmac_regs()
1057 sa_lo = (adapter->addr[2] << ET_RX_WOL_LO_SA3_SHIFT) | in et1310_config_rxmac_regs()
1058 (adapter->addr[3] << ET_RX_WOL_LO_SA4_SHIFT) | in et1310_config_rxmac_regs()
1059 (adapter->addr[4] << ET_RX_WOL_LO_SA5_SHIFT) | in et1310_config_rxmac_regs()
1060 adapter->addr[5]; in et1310_config_rxmac_regs()
1061 writel(sa_lo, &rxmac->sa_lo); in et1310_config_rxmac_regs()
1063 sa_hi = (u32)(adapter->addr[0] << ET_RX_WOL_HI_SA1_SHIFT) | in et1310_config_rxmac_regs()
1064 adapter->addr[1]; in et1310_config_rxmac_regs()
1065 writel(sa_hi, &rxmac->sa_hi); in et1310_config_rxmac_regs()
1068 writel(0, &rxmac->pf_ctrl); in et1310_config_rxmac_regs()
1071 if (adapter->packet_filter & ET131X_PACKET_TYPE_DIRECTED) { in et1310_config_rxmac_regs()
1075 writel(0, &rxmac->uni_pf_addr1); in et1310_config_rxmac_regs()
1076 writel(0, &rxmac->uni_pf_addr2); in et1310_config_rxmac_regs()
1077 writel(0, &rxmac->uni_pf_addr3); in et1310_config_rxmac_regs()
1081 if (!(adapter->packet_filter & ET131X_PACKET_TYPE_ALL_MULTICAST)) { in et1310_config_rxmac_regs()
1090 if (adapter->registry_jumbo_packet > 8192) in et1310_config_rxmac_regs()
1093 * to (16k - Jumbo packet size). In order to implement this, in et1310_config_rxmac_regs()
1097 * the PCI-Express TLP's that the 1310 uses. in et1310_config_rxmac_regs()
1101 writel(0x41, &rxmac->mcif_ctrl_max_seg); in et1310_config_rxmac_regs()
1103 writel(0, &rxmac->mcif_ctrl_max_seg); in et1310_config_rxmac_regs()
1105 writel(0, &rxmac->mcif_water_mark); in et1310_config_rxmac_regs()
1106 writel(0, &rxmac->mif_ctrl); in et1310_config_rxmac_regs()
1107 writel(0, &rxmac->space_avail); in et1310_config_rxmac_regs()
1122 if (phydev && phydev->speed == SPEED_100) in et1310_config_rxmac_regs()
1123 writel(0x30038, &rxmac->mif_ctrl); in et1310_config_rxmac_regs()
1125 writel(0x30030, &rxmac->mif_ctrl); in et1310_config_rxmac_regs()
1133 writel(pf_ctrl, &rxmac->pf_ctrl); in et1310_config_rxmac_regs()
1134 writel(ET_RX_CTRL_RXMAC_ENABLE | ET_RX_CTRL_WOL_DISABLE, &rxmac->ctrl); in et1310_config_rxmac_regs()
1139 struct txmac_regs __iomem *txmac = &adapter->regs->txmac; in et1310_config_txmac_regs()
1142 * cfpt - control frame pause timer set to 64 (0x40) in et1310_config_txmac_regs()
1143 * cfep - control frame extended pause timer set to 0x0 in et1310_config_txmac_regs()
1145 if (adapter->flow == FLOW_NONE) in et1310_config_txmac_regs()
1146 writel(0, &txmac->cf_param); in et1310_config_txmac_regs()
1148 writel(0x40, &txmac->cf_param); in et1310_config_txmac_regs()
1153 struct macstat_regs __iomem *macstat = &adapter->regs->macstat; in et1310_config_macstat_regs()
1157 for (reg = &macstat->txrx_0_64_byte_frames; in et1310_config_macstat_regs()
1158 reg <= &macstat->carry_reg2; reg++) in et1310_config_macstat_regs()
1165 writel(0xFFFFBE32, &macstat->carry_reg1_mask); in et1310_config_macstat_regs()
1166 writel(0xFFFE7E8B, &macstat->carry_reg2_mask); in et1310_config_macstat_regs()
1172 struct mac_regs __iomem *mac = &adapter->regs->mac; in et131x_phy_mii_read()
1182 mii_addr = readl(&mac->mii_mgmt_addr); in et131x_phy_mii_read()
1183 mii_cmd = readl(&mac->mii_mgmt_cmd); in et131x_phy_mii_read()
1186 writel(0, &mac->mii_mgmt_cmd); in et131x_phy_mii_read()
1189 writel(ET_MAC_MII_ADDR(addr, reg), &mac->mii_mgmt_addr); in et131x_phy_mii_read()
1191 writel(0x1, &mac->mii_mgmt_cmd); in et131x_phy_mii_read()
1196 mii_indicator = readl(&mac->mii_mgmt_indicator); in et131x_phy_mii_read()
1201 dev_warn(&adapter->pdev->dev, in et131x_phy_mii_read()
1203 dev_warn(&adapter->pdev->dev, "status is 0x%08x\n", in et131x_phy_mii_read()
1206 status = -EIO; in et131x_phy_mii_read()
1213 *value = readl(&mac->mii_mgmt_stat) & ET_MAC_MIIMGMT_STAT_PHYCRTL_MASK; in et131x_phy_mii_read()
1217 writel(0, &mac->mii_mgmt_cmd); in et131x_phy_mii_read()
1222 writel(mii_addr, &mac->mii_mgmt_addr); in et131x_phy_mii_read()
1223 writel(mii_cmd, &mac->mii_mgmt_cmd); in et131x_phy_mii_read()
1230 struct phy_device *phydev = adapter->netdev->phydev; in et131x_mii_read()
1233 return -EIO; in et131x_mii_read()
1235 return et131x_phy_mii_read(adapter, phydev->mdio.addr, reg, value); in et131x_mii_read()
1241 struct mac_regs __iomem *mac = &adapter->regs->mac; in et131x_mii_write()
1251 mii_addr = readl(&mac->mii_mgmt_addr); in et131x_mii_write()
1252 mii_cmd = readl(&mac->mii_mgmt_cmd); in et131x_mii_write()
1255 writel(0, &mac->mii_mgmt_cmd); in et131x_mii_write()
1258 writel(ET_MAC_MII_ADDR(addr, reg), &mac->mii_mgmt_addr); in et131x_mii_write()
1261 writel(value, &mac->mii_mgmt_ctrl); in et131x_mii_write()
1266 mii_indicator = readl(&mac->mii_mgmt_indicator); in et131x_mii_write()
1273 dev_warn(&adapter->pdev->dev, in et131x_mii_write()
1275 dev_warn(&adapter->pdev->dev, "status is 0x%08x\n", in et131x_mii_write()
1277 dev_warn(&adapter->pdev->dev, "command is 0x%08x\n", in et131x_mii_write()
1278 readl(&mac->mii_mgmt_cmd)); in et131x_mii_write()
1282 status = -EIO; in et131x_mii_write()
1285 writel(0, &mac->mii_mgmt_cmd); in et131x_mii_write()
1290 writel(mii_addr, &mac->mii_mgmt_addr); in et131x_mii_write()
1291 writel(mii_cmd, &mac->mii_mgmt_cmd); in et131x_mii_write()
1311 struct phy_device *phydev = adapter->netdev->phydev; in et1310_config_flow_control()
1313 if (phydev->duplex == DUPLEX_HALF) { in et1310_config_flow_control()
1314 adapter->flow = FLOW_NONE; in et1310_config_flow_control()
1322 adapter->flow = adapter->wanted_flow; in et1310_config_flow_control()
1324 if (adapter->wanted_flow == FLOW_BOTH) in et1310_config_flow_control()
1325 adapter->flow = FLOW_BOTH; in et1310_config_flow_control()
1327 adapter->flow = FLOW_NONE; in et1310_config_flow_control()
1329 adapter->flow = FLOW_NONE; in et1310_config_flow_control()
1331 if (adapter->wanted_flow == FLOW_BOTH) in et1310_config_flow_control()
1332 adapter->flow = FLOW_RXONLY; in et1310_config_flow_control()
1334 adapter->flow = FLOW_NONE; in et1310_config_flow_control()
1339 /* et1310_update_macstat_host_counters - Update local copy of the statistics */
1342 struct ce_stats *stats = &adapter->stats; in et1310_update_macstat_host_counters()
1344 &adapter->regs->macstat; in et1310_update_macstat_host_counters()
1346 stats->tx_collisions += readl(&macstat->tx_total_collisions); in et1310_update_macstat_host_counters()
1347 stats->tx_first_collisions += readl(&macstat->tx_single_collisions); in et1310_update_macstat_host_counters()
1348 stats->tx_deferred += readl(&macstat->tx_deferred); in et1310_update_macstat_host_counters()
1349 stats->tx_excessive_collisions += in et1310_update_macstat_host_counters()
1350 readl(&macstat->tx_multiple_collisions); in et1310_update_macstat_host_counters()
1351 stats->tx_late_collisions += readl(&macstat->tx_late_collisions); in et1310_update_macstat_host_counters()
1352 stats->tx_underflows += readl(&macstat->tx_undersize_frames); in et1310_update_macstat_host_counters()
1353 stats->tx_max_pkt_errs += readl(&macstat->tx_oversize_frames); in et1310_update_macstat_host_counters()
1355 stats->rx_align_errs += readl(&macstat->rx_align_errs); in et1310_update_macstat_host_counters()
1356 stats->rx_crc_errs += readl(&macstat->rx_code_errs); in et1310_update_macstat_host_counters()
1357 stats->rcvd_pkts_dropped += readl(&macstat->rx_drops); in et1310_update_macstat_host_counters()
1358 stats->rx_overflows += readl(&macstat->rx_oversize_packets); in et1310_update_macstat_host_counters()
1359 stats->rx_code_violations += readl(&macstat->rx_fcs_errs); in et1310_update_macstat_host_counters()
1360 stats->rx_length_errs += readl(&macstat->rx_frame_len_errs); in et1310_update_macstat_host_counters()
1361 stats->rx_other_errs += readl(&macstat->rx_fragment_packets); in et1310_update_macstat_host_counters()
1378 carry_reg1 = readl(&adapter->regs->macstat.carry_reg1); in et1310_handle_macstat_interrupt()
1379 carry_reg2 = readl(&adapter->regs->macstat.carry_reg2); in et1310_handle_macstat_interrupt()
1381 writel(carry_reg1, &adapter->regs->macstat.carry_reg1); in et1310_handle_macstat_interrupt()
1382 writel(carry_reg2, &adapter->regs->macstat.carry_reg2); in et1310_handle_macstat_interrupt()
1391 adapter->stats.rx_code_violations += COUNTER_WRAP_16_BIT; in et1310_handle_macstat_interrupt()
1393 adapter->stats.rx_align_errs += COUNTER_WRAP_12_BIT; in et1310_handle_macstat_interrupt()
1395 adapter->stats.rx_length_errs += COUNTER_WRAP_16_BIT; in et1310_handle_macstat_interrupt()
1397 adapter->stats.rx_other_errs += COUNTER_WRAP_16_BIT; in et1310_handle_macstat_interrupt()
1399 adapter->stats.rx_crc_errs += COUNTER_WRAP_16_BIT; in et1310_handle_macstat_interrupt()
1401 adapter->stats.rx_overflows += COUNTER_WRAP_16_BIT; in et1310_handle_macstat_interrupt()
1403 adapter->stats.rcvd_pkts_dropped += COUNTER_WRAP_16_BIT; in et1310_handle_macstat_interrupt()
1405 adapter->stats.tx_max_pkt_errs += COUNTER_WRAP_12_BIT; in et1310_handle_macstat_interrupt()
1407 adapter->stats.tx_underflows += COUNTER_WRAP_12_BIT; in et1310_handle_macstat_interrupt()
1409 adapter->stats.tx_first_collisions += COUNTER_WRAP_12_BIT; in et1310_handle_macstat_interrupt()
1411 adapter->stats.tx_deferred += COUNTER_WRAP_12_BIT; in et1310_handle_macstat_interrupt()
1413 adapter->stats.tx_excessive_collisions += COUNTER_WRAP_12_BIT; in et1310_handle_macstat_interrupt()
1415 adapter->stats.tx_late_collisions += COUNTER_WRAP_12_BIT; in et1310_handle_macstat_interrupt()
1417 adapter->stats.tx_collisions += COUNTER_WRAP_12_BIT; in et1310_handle_macstat_interrupt()
1422 struct net_device *netdev = bus->priv; in et131x_mdio_read()
1438 struct net_device *netdev = bus->priv; in et131x_mdio_write()
1444 /* et1310_phy_power_switch - PHY power control
1456 struct phy_device *phydev = adapter->netdev->phydev; in et1310_phy_power_switch()
1462 et131x_mii_write(adapter, phydev->mdio.addr, MII_BMCR, data); in et1310_phy_power_switch()
1465 /* et131x_xcvr_init - Init the phy if we are setting it into force mode */
1469 struct phy_device *phydev = adapter->netdev->phydev; in et131x_xcvr_init()
1479 if ((adapter->eeprom_data[1] & 0x4) == 0) { in et131x_xcvr_init()
1485 if ((adapter->eeprom_data[1] & 0x8) == 0) in et131x_xcvr_init()
1490 et131x_mii_write(adapter, phydev->mdio.addr, PHY_LED_2, lcr2); in et131x_xcvr_init()
1494 /* et131x_configure_global_regs - configure JAGCore global regs */
1497 struct global_regs __iomem *regs = &adapter->regs->global; in et131x_configure_global_regs()
1499 writel(0, ®s->rxq_start_addr); in et131x_configure_global_regs()
1500 writel(INTERNAL_MEM_SIZE - 1, ®s->txq_end_addr); in et131x_configure_global_regs()
1502 if (adapter->registry_jumbo_packet < 2048) { in et131x_configure_global_regs()
1508 writel(PARM_RX_MEM_END_DEF, ®s->rxq_end_addr); in et131x_configure_global_regs()
1509 writel(PARM_RX_MEM_END_DEF + 1, ®s->txq_start_addr); in et131x_configure_global_regs()
1510 } else if (adapter->registry_jumbo_packet < 8192) { in et131x_configure_global_regs()
1511 /* For jumbo packets > 2k but < 8k, split 50-50. */ in et131x_configure_global_regs()
1512 writel(INTERNAL_MEM_RX_OFFSET, ®s->rxq_end_addr); in et131x_configure_global_regs()
1513 writel(INTERNAL_MEM_RX_OFFSET + 1, ®s->txq_start_addr); in et131x_configure_global_regs()
1520 writel(0x01b3, ®s->rxq_end_addr); in et131x_configure_global_regs()
1521 writel(0x01b4, ®s->txq_start_addr); in et131x_configure_global_regs()
1525 writel(0, ®s->loopback); in et131x_configure_global_regs()
1527 writel(0, ®s->msi_config); in et131x_configure_global_regs()
1529 /* By default, disable the watchdog timer. It will be enabled when in et131x_configure_global_regs()
1532 writel(0, ®s->watchdog_timer); in et131x_configure_global_regs()
1535 /* et131x_config_rx_dma_regs - Start of Rx_DMA init sequence */
1538 struct rxdma_regs __iomem *rx_dma = &adapter->regs->rxdma; in et131x_config_rx_dma_regs()
1539 struct rx_ring *rx_local = &adapter->rx_ring; in et131x_config_rx_dma_regs()
1549 writel(upper_32_bits(rx_local->rx_status_bus), &rx_dma->dma_wb_base_hi); in et131x_config_rx_dma_regs()
1550 writel(lower_32_bits(rx_local->rx_status_bus), &rx_dma->dma_wb_base_lo); in et131x_config_rx_dma_regs()
1552 memset(rx_local->rx_status_block, 0, sizeof(struct rx_status_block)); in et131x_config_rx_dma_regs()
1555 writel(upper_32_bits(rx_local->ps_ring_physaddr), &rx_dma->psr_base_hi); in et131x_config_rx_dma_regs()
1556 writel(lower_32_bits(rx_local->ps_ring_physaddr), &rx_dma->psr_base_lo); in et131x_config_rx_dma_regs()
1557 writel(rx_local->psr_entries - 1, &rx_dma->psr_num_des); in et131x_config_rx_dma_regs()
1558 writel(0, &rx_dma->psr_full_offset); in et131x_config_rx_dma_regs()
1560 psr_num_des = readl(&rx_dma->psr_num_des) & ET_RXDMA_PSR_NUM_DES_MASK; in et131x_config_rx_dma_regs()
1562 &rx_dma->psr_min_des); in et131x_config_rx_dma_regs()
1564 spin_lock_irqsave(&adapter->rcv_lock, flags); in et131x_config_rx_dma_regs()
1567 rx_local->local_psr_full = 0; in et131x_config_rx_dma_regs()
1575 struct fbr_lookup *fbr = rx_local->fbr[id]; in et131x_config_rx_dma_regs()
1578 num_des = &rx_dma->fbr0_num_des; in et131x_config_rx_dma_regs()
1579 full_offset = &rx_dma->fbr0_full_offset; in et131x_config_rx_dma_regs()
1580 min_des = &rx_dma->fbr0_min_des; in et131x_config_rx_dma_regs()
1581 base_hi = &rx_dma->fbr0_base_hi; in et131x_config_rx_dma_regs()
1582 base_lo = &rx_dma->fbr0_base_lo; in et131x_config_rx_dma_regs()
1584 num_des = &rx_dma->fbr1_num_des; in et131x_config_rx_dma_regs()
1585 full_offset = &rx_dma->fbr1_full_offset; in et131x_config_rx_dma_regs()
1586 min_des = &rx_dma->fbr1_min_des; in et131x_config_rx_dma_regs()
1587 base_hi = &rx_dma->fbr1_base_hi; in et131x_config_rx_dma_regs()
1588 base_lo = &rx_dma->fbr1_base_lo; in et131x_config_rx_dma_regs()
1592 fbr_entry = fbr->ring_virtaddr; in et131x_config_rx_dma_regs()
1593 for (entry = 0; entry < fbr->num_entries; entry++) { in et131x_config_rx_dma_regs()
1594 fbr_entry->addr_hi = fbr->bus_high[entry]; in et131x_config_rx_dma_regs()
1595 fbr_entry->addr_lo = fbr->bus_low[entry]; in et131x_config_rx_dma_regs()
1596 fbr_entry->word2 = entry; in et131x_config_rx_dma_regs()
1601 writel(upper_32_bits(fbr->ring_physaddr), base_hi); in et131x_config_rx_dma_regs()
1602 writel(lower_32_bits(fbr->ring_physaddr), base_lo); in et131x_config_rx_dma_regs()
1603 writel(fbr->num_entries - 1, num_des); in et131x_config_rx_dma_regs()
1609 fbr->local_full = ET_DMA10_WRAP; in et131x_config_rx_dma_regs()
1610 writel(((fbr->num_entries * LO_MARK_PERCENT_FOR_RX) / 100) - 1, in et131x_config_rx_dma_regs()
1619 writel(PARM_RX_NUM_BUFS_DEF, &rx_dma->num_pkt_done); in et131x_config_rx_dma_regs()
1626 writel(PARM_RX_TIME_INT_DEF, &rx_dma->max_pkt_time); in et131x_config_rx_dma_regs()
1628 spin_unlock_irqrestore(&adapter->rcv_lock, flags); in et131x_config_rx_dma_regs()
1631 /* et131x_config_tx_dma_regs - Set up the tx dma section of the JAGCore.
1638 struct txdma_regs __iomem *txdma = &adapter->regs->txdma; in et131x_config_tx_dma_regs()
1639 struct tx_ring *tx_ring = &adapter->tx_ring; in et131x_config_tx_dma_regs()
1642 writel(upper_32_bits(tx_ring->tx_desc_ring_pa), &txdma->pr_base_hi); in et131x_config_tx_dma_regs()
1643 writel(lower_32_bits(tx_ring->tx_desc_ring_pa), &txdma->pr_base_lo); in et131x_config_tx_dma_regs()
1646 writel(NUM_DESC_PER_RING_TX - 1, &txdma->pr_num_des); in et131x_config_tx_dma_regs()
1649 writel(upper_32_bits(tx_ring->tx_status_pa), &txdma->dma_wb_base_hi); in et131x_config_tx_dma_regs()
1650 writel(lower_32_bits(tx_ring->tx_status_pa), &txdma->dma_wb_base_lo); in et131x_config_tx_dma_regs()
1652 *tx_ring->tx_status = 0; in et131x_config_tx_dma_regs()
1654 writel(0, &txdma->service_request); in et131x_config_tx_dma_regs()
1655 tx_ring->send_idx = 0; in et131x_config_tx_dma_regs()
1658 /* et131x_adapter_setup - Set the adapter up as per cassini+ documentation */
1666 writel(ET_MMC_ENABLE, &adapter->regs->mmc.mmc_ctrl); in et131x_adapter_setup()
1680 /* et131x_soft_reset - Issue soft reset to the hardware, complete for ET1310 */
1689 writel(reg, &adapter->regs->mac.cfg1); in et131x_soft_reset()
1692 writel(reg, &adapter->regs->global.sw_reset); in et131x_soft_reset()
1696 writel(reg, &adapter->regs->mac.cfg1); in et131x_soft_reset()
1697 writel(0, &adapter->regs->mac.cfg1); in et131x_soft_reset()
1704 if (adapter->flow == FLOW_TXONLY || adapter->flow == FLOW_BOTH) in et131x_enable_interrupts()
1709 writel(mask, &adapter->regs->global.int_mask); in et131x_enable_interrupts()
1714 writel(INT_MASK_DISABLE, &adapter->regs->global.int_mask); in et131x_disable_interrupts()
1721 &adapter->regs->txdma.csr); in et131x_tx_dma_disable()
1731 if (adapter->flags & FMP_ADAPTER_INTERRUPT_IN_USE) in et131x_enable_txrx()
1752 struct tx_ring *tx_ring = &adapter->tx_ring; in et131x_init_send()
1753 struct tcb *tcb = tx_ring->tcb_ring; in et131x_init_send() local
1755 tx_ring->tcb_qhead = tcb; in et131x_init_send()
1757 memset(tcb, 0, sizeof(struct tcb) * NUM_TCB); in et131x_init_send()
1760 tcb->next = tcb + 1; in et131x_init_send()
1761 tcb++; in et131x_init_send()
1764 tcb--; in et131x_init_send()
1765 tx_ring->tcb_qtail = tcb; in et131x_init_send()
1766 tcb->next = NULL; in et131x_init_send()
1768 tx_ring->send_head = NULL; in et131x_init_send()
1769 tx_ring->send_tail = NULL; in et131x_init_send()
1777 * -- gate off JAGCore;
1778 * -- set gigE PHY in Coma mode
1779 * -- wake on phy_interrupt; Perform software reset JAGCore,
1780 * re-initialize jagcore and gigE PHY
1784 u32 pmcsr = readl(&adapter->regs->global.pm_csr); in et1310_enable_phy_coma()
1787 adapter->flags |= FMP_ADAPTER_LOWER_POWER; in et1310_enable_phy_coma()
1790 et131x_disable_txrx(adapter->netdev); in et1310_enable_phy_coma()
1794 writel(pmcsr, &adapter->regs->global.pm_csr); in et1310_enable_phy_coma()
1798 writel(pmcsr, &adapter->regs->global.pm_csr); in et1310_enable_phy_coma()
1805 pmcsr = readl(&adapter->regs->global.pm_csr); in et1310_disable_phy_coma()
1807 /* Disable phy_sw_coma register and re-enable JAGCore clocks */ in et1310_disable_phy_coma()
1810 writel(pmcsr, &adapter->regs->global.pm_csr); in et1310_disable_phy_coma()
1813 * Reset JAGCore; re-configure and initialize JAGCore and gigE PHY in et1310_disable_phy_coma()
1816 /* Re-initialize the send structures */ in et1310_disable_phy_coma()
1820 * autonegotiation being complete. This way, when we get the auto-neg in et1310_disable_phy_coma()
1828 adapter->flags &= ~FMP_ADAPTER_LOWER_POWER; in et1310_disable_phy_coma()
1830 et131x_enable_txrx(adapter->netdev); in et1310_disable_phy_coma()
1865 struct rx_ring *rx_ring = &adapter->rx_ring; in et131x_rx_dma_memory_alloc()
1869 rx_ring->fbr[0] = kzalloc(sizeof(*fbr), GFP_KERNEL); in et131x_rx_dma_memory_alloc()
1870 if (rx_ring->fbr[0] == NULL) in et131x_rx_dma_memory_alloc()
1871 return -ENOMEM; in et131x_rx_dma_memory_alloc()
1872 rx_ring->fbr[1] = kzalloc(sizeof(*fbr), GFP_KERNEL); in et131x_rx_dma_memory_alloc()
1873 if (rx_ring->fbr[1] == NULL) in et131x_rx_dma_memory_alloc()
1874 return -ENOMEM; in et131x_rx_dma_memory_alloc()
1890 * rings. Also, FBR1 remains a constant size - when it's size doubles in et131x_rx_dma_memory_alloc()
1893 if (adapter->registry_jumbo_packet < 2048) { in et131x_rx_dma_memory_alloc()
1894 rx_ring->fbr[0]->buffsize = 256; in et131x_rx_dma_memory_alloc()
1895 rx_ring->fbr[0]->num_entries = 512; in et131x_rx_dma_memory_alloc()
1896 rx_ring->fbr[1]->buffsize = 2048; in et131x_rx_dma_memory_alloc()
1897 rx_ring->fbr[1]->num_entries = 512; in et131x_rx_dma_memory_alloc()
1898 } else if (adapter->registry_jumbo_packet < 4096) { in et131x_rx_dma_memory_alloc()
1899 rx_ring->fbr[0]->buffsize = 512; in et131x_rx_dma_memory_alloc()
1900 rx_ring->fbr[0]->num_entries = 1024; in et131x_rx_dma_memory_alloc()
1901 rx_ring->fbr[1]->buffsize = 4096; in et131x_rx_dma_memory_alloc()
1902 rx_ring->fbr[1]->num_entries = 512; in et131x_rx_dma_memory_alloc()
1904 rx_ring->fbr[0]->buffsize = 1024; in et131x_rx_dma_memory_alloc()
1905 rx_ring->fbr[0]->num_entries = 768; in et131x_rx_dma_memory_alloc()
1906 rx_ring->fbr[1]->buffsize = 16384; in et131x_rx_dma_memory_alloc()
1907 rx_ring->fbr[1]->num_entries = 128; in et131x_rx_dma_memory_alloc()
1910 rx_ring->psr_entries = rx_ring->fbr[0]->num_entries + in et131x_rx_dma_memory_alloc()
1911 rx_ring->fbr[1]->num_entries; in et131x_rx_dma_memory_alloc()
1914 fbr = rx_ring->fbr[id]; in et131x_rx_dma_memory_alloc()
1916 bufsize = sizeof(struct fbr_desc) * fbr->num_entries; in et131x_rx_dma_memory_alloc()
1917 fbr->ring_virtaddr = dma_alloc_coherent(&adapter->pdev->dev, in et131x_rx_dma_memory_alloc()
1919 &fbr->ring_physaddr, in et131x_rx_dma_memory_alloc()
1921 if (!fbr->ring_virtaddr) { in et131x_rx_dma_memory_alloc()
1922 dev_err(&adapter->pdev->dev, in et131x_rx_dma_memory_alloc()
1925 return -ENOMEM; in et131x_rx_dma_memory_alloc()
1930 fbr = rx_ring->fbr[id]; in et131x_rx_dma_memory_alloc()
1931 fbr_chunksize = (FBR_CHUNKS * fbr->buffsize); in et131x_rx_dma_memory_alloc()
1933 for (i = 0; i < fbr->num_entries / FBR_CHUNKS; i++) { in et131x_rx_dma_memory_alloc()
1936 fbr->mem_virtaddrs[i] = dma_alloc_coherent( in et131x_rx_dma_memory_alloc()
1937 &adapter->pdev->dev, fbr_chunksize, in et131x_rx_dma_memory_alloc()
1938 &fbr->mem_physaddrs[i], in et131x_rx_dma_memory_alloc()
1941 if (!fbr->mem_virtaddrs[i]) { in et131x_rx_dma_memory_alloc()
1942 dev_err(&adapter->pdev->dev, in et131x_rx_dma_memory_alloc()
1944 return -ENOMEM; in et131x_rx_dma_memory_alloc()
1948 fbr_physaddr = fbr->mem_physaddrs[i]; in et131x_rx_dma_memory_alloc()
1956 fbr->virt[k] = (u8 *)fbr->mem_virtaddrs[i] + in et131x_rx_dma_memory_alloc()
1957 (j * fbr->buffsize); in et131x_rx_dma_memory_alloc()
1962 fbr->bus_high[k] = upper_32_bits(fbr_physaddr); in et131x_rx_dma_memory_alloc()
1963 fbr->bus_low[k] = lower_32_bits(fbr_physaddr); in et131x_rx_dma_memory_alloc()
1964 fbr_physaddr += fbr->buffsize; in et131x_rx_dma_memory_alloc()
1970 psr_size = sizeof(struct pkt_stat_desc) * rx_ring->psr_entries; in et131x_rx_dma_memory_alloc()
1972 rx_ring->ps_ring_virtaddr = dma_alloc_coherent(&adapter->pdev->dev, in et131x_rx_dma_memory_alloc()
1974 &rx_ring->ps_ring_physaddr, in et131x_rx_dma_memory_alloc()
1977 if (!rx_ring->ps_ring_virtaddr) { in et131x_rx_dma_memory_alloc()
1978 dev_err(&adapter->pdev->dev, in et131x_rx_dma_memory_alloc()
1980 return -ENOMEM; in et131x_rx_dma_memory_alloc()
1984 rx_ring->rx_status_block = dma_alloc_coherent(&adapter->pdev->dev, in et131x_rx_dma_memory_alloc()
1986 &rx_ring->rx_status_bus, in et131x_rx_dma_memory_alloc()
1988 if (!rx_ring->rx_status_block) { in et131x_rx_dma_memory_alloc()
1989 dev_err(&adapter->pdev->dev, in et131x_rx_dma_memory_alloc()
1991 return -ENOMEM; in et131x_rx_dma_memory_alloc()
1993 rx_ring->num_rfd = NIC_DEFAULT_NUM_RFD; in et131x_rx_dma_memory_alloc()
1998 INIT_LIST_HEAD(&rx_ring->recv_list); in et131x_rx_dma_memory_alloc()
2009 struct rx_ring *rx_ring = &adapter->rx_ring; in et131x_rx_dma_memory_free()
2013 WARN_ON(rx_ring->num_ready_recv != rx_ring->num_rfd); in et131x_rx_dma_memory_free()
2015 while (!list_empty(&rx_ring->recv_list)) { in et131x_rx_dma_memory_free()
2016 rfd = list_entry(rx_ring->recv_list.next, in et131x_rx_dma_memory_free()
2019 list_del(&rfd->list_node); in et131x_rx_dma_memory_free()
2020 rfd->skb = NULL; in et131x_rx_dma_memory_free()
2026 fbr = rx_ring->fbr[id]; in et131x_rx_dma_memory_free()
2028 if (!fbr || !fbr->ring_virtaddr) in et131x_rx_dma_memory_free()
2032 for (ii = 0; ii < fbr->num_entries / FBR_CHUNKS; ii++) { in et131x_rx_dma_memory_free()
2033 if (fbr->mem_virtaddrs[ii]) { in et131x_rx_dma_memory_free()
2034 bufsize = fbr->buffsize * FBR_CHUNKS; in et131x_rx_dma_memory_free()
2036 dma_free_coherent(&adapter->pdev->dev, in et131x_rx_dma_memory_free()
2038 fbr->mem_virtaddrs[ii], in et131x_rx_dma_memory_free()
2039 fbr->mem_physaddrs[ii]); in et131x_rx_dma_memory_free()
2041 fbr->mem_virtaddrs[ii] = NULL; in et131x_rx_dma_memory_free()
2045 bufsize = sizeof(struct fbr_desc) * fbr->num_entries; in et131x_rx_dma_memory_free()
2047 dma_free_coherent(&adapter->pdev->dev, in et131x_rx_dma_memory_free()
2049 fbr->ring_virtaddr, in et131x_rx_dma_memory_free()
2050 fbr->ring_physaddr); in et131x_rx_dma_memory_free()
2052 fbr->ring_virtaddr = NULL; in et131x_rx_dma_memory_free()
2056 if (rx_ring->ps_ring_virtaddr) { in et131x_rx_dma_memory_free()
2057 psr_size = sizeof(struct pkt_stat_desc) * rx_ring->psr_entries; in et131x_rx_dma_memory_free()
2059 dma_free_coherent(&adapter->pdev->dev, psr_size, in et131x_rx_dma_memory_free()
2060 rx_ring->ps_ring_virtaddr, in et131x_rx_dma_memory_free()
2061 rx_ring->ps_ring_physaddr); in et131x_rx_dma_memory_free()
2063 rx_ring->ps_ring_virtaddr = NULL; in et131x_rx_dma_memory_free()
2067 if (rx_ring->rx_status_block) { in et131x_rx_dma_memory_free()
2068 dma_free_coherent(&adapter->pdev->dev, in et131x_rx_dma_memory_free()
2070 rx_ring->rx_status_block, in et131x_rx_dma_memory_free()
2071 rx_ring->rx_status_bus); in et131x_rx_dma_memory_free()
2072 rx_ring->rx_status_block = NULL; in et131x_rx_dma_memory_free()
2076 kfree(rx_ring->fbr[0]); in et131x_rx_dma_memory_free()
2077 kfree(rx_ring->fbr[1]); in et131x_rx_dma_memory_free()
2080 rx_ring->num_ready_recv = 0; in et131x_rx_dma_memory_free()
2083 /* et131x_init_recv - Initialize receive data structures */
2088 struct rx_ring *rx_ring = &adapter->rx_ring; in et131x_init_recv()
2091 for (rfdct = 0; rfdct < rx_ring->num_rfd; rfdct++) { in et131x_init_recv()
2094 return -ENOMEM; in et131x_init_recv()
2096 rfd->skb = NULL; in et131x_init_recv()
2099 list_add_tail(&rfd->list_node, &rx_ring->recv_list); in et131x_init_recv()
2102 rx_ring->num_ready_recv++; in et131x_init_recv()
2108 /* et131x_set_rx_dma_timer - Set the heartbeat timer according to line rate */
2111 struct phy_device *phydev = adapter->netdev->phydev; in et131x_set_rx_dma_timer()
2113 /* For version B silicon, we do not use the RxDMA timer for 10 and 100 in et131x_set_rx_dma_timer()
2116 if ((phydev->speed == SPEED_100) || (phydev->speed == SPEED_10)) { in et131x_set_rx_dma_timer()
2117 writel(0, &adapter->regs->rxdma.max_pkt_time); in et131x_set_rx_dma_timer()
2118 writel(1, &adapter->regs->rxdma.num_pkt_done); in et131x_set_rx_dma_timer()
2122 /* nic_return_rfd - Recycle a RFD and put it back onto the receive list */
2125 struct rx_ring *rx_local = &adapter->rx_ring; in nic_return_rfd()
2126 struct rxdma_regs __iomem *rx_dma = &adapter->regs->rxdma; in nic_return_rfd()
2127 u16 buff_index = rfd->bufferindex; in nic_return_rfd()
2128 u8 ring_index = rfd->ringindex; in nic_return_rfd()
2130 struct fbr_lookup *fbr = rx_local->fbr[ring_index]; in nic_return_rfd()
2135 if (buff_index < fbr->num_entries) { in nic_return_rfd()
2141 offset = &rx_dma->fbr0_full_offset; in nic_return_rfd()
2143 offset = &rx_dma->fbr1_full_offset; in nic_return_rfd()
2145 next = (struct fbr_desc *)(fbr->ring_virtaddr) + in nic_return_rfd()
2146 INDEX10(fbr->local_full); in nic_return_rfd()
2152 next->addr_hi = fbr->bus_high[buff_index]; in nic_return_rfd()
2153 next->addr_lo = fbr->bus_low[buff_index]; in nic_return_rfd()
2154 next->word2 = buff_index; in nic_return_rfd()
2156 free_buff_ring = bump_free_buff_ring(&fbr->local_full, in nic_return_rfd()
2157 fbr->num_entries - 1); in nic_return_rfd()
2160 dev_err(&adapter->pdev->dev, in nic_return_rfd()
2167 spin_lock_irqsave(&adapter->rcv_lock, flags); in nic_return_rfd()
2168 list_add_tail(&rfd->list_node, &rx_local->recv_list); in nic_return_rfd()
2169 rx_local->num_ready_recv++; in nic_return_rfd()
2170 spin_unlock_irqrestore(&adapter->rcv_lock, flags); in nic_return_rfd()
2172 WARN_ON(rx_local->num_ready_recv > rx_local->num_rfd); in nic_return_rfd()
2175 /* nic_rx_pkts - Checks the hardware for available packets
2184 struct rx_ring *rx_local = &adapter->rx_ring; in nic_rx_pkts()
2202 status = rx_local->rx_status_block; in nic_rx_pkts()
2203 word1 = status->word1 >> 16; in nic_rx_pkts()
2206 if ((word1 & 0x1FFF) == (rx_local->local_psr_full & 0x1FFF)) in nic_rx_pkts()
2210 psr = (struct pkt_stat_desc *)(rx_local->ps_ring_virtaddr) + in nic_rx_pkts()
2211 (rx_local->local_psr_full & 0xFFF); in nic_rx_pkts()
2216 len = psr->word1 & 0xFFFF; in nic_rx_pkts()
2217 ring_index = (psr->word1 >> 26) & 0x03; in nic_rx_pkts()
2218 fbr = rx_local->fbr[ring_index]; in nic_rx_pkts()
2219 buff_index = (psr->word1 >> 16) & 0x3FF; in nic_rx_pkts()
2220 word0 = psr->word0; in nic_rx_pkts()
2224 add_12bit(&rx_local->local_psr_full, 1); in nic_rx_pkts()
2225 if ((rx_local->local_psr_full & 0xFFF) > rx_local->psr_entries - 1) { in nic_rx_pkts()
2227 rx_local->local_psr_full &= ~0xFFF; in nic_rx_pkts()
2228 rx_local->local_psr_full ^= 0x1000; in nic_rx_pkts()
2231 writel(rx_local->local_psr_full, &adapter->regs->rxdma.psr_full_offset); in nic_rx_pkts()
2233 if (ring_index > 1 || buff_index > fbr->num_entries - 1) { in nic_rx_pkts()
2235 dev_err(&adapter->pdev->dev, in nic_rx_pkts()
2237 rx_local->local_psr_full & 0xFFF, len, buff_index); in nic_rx_pkts()
2242 spin_lock_irqsave(&adapter->rcv_lock, flags); in nic_rx_pkts()
2244 element = rx_local->recv_list.next; in nic_rx_pkts()
2248 spin_unlock_irqrestore(&adapter->rcv_lock, flags); in nic_rx_pkts()
2252 list_del(&rfd->list_node); in nic_rx_pkts()
2253 rx_local->num_ready_recv--; in nic_rx_pkts()
2255 spin_unlock_irqrestore(&adapter->rcv_lock, flags); in nic_rx_pkts()
2257 rfd->bufferindex = buff_index; in nic_rx_pkts()
2258 rfd->ringindex = ring_index; in nic_rx_pkts()
2265 adapter->stats.rx_other_errs++; in nic_rx_pkts()
2266 rfd->len = 0; in nic_rx_pkts()
2271 adapter->stats.multicast_pkts_rcvd++; in nic_rx_pkts()
2273 rfd->len = len; in nic_rx_pkts()
2275 skb = dev_alloc_skb(rfd->len + 2); in nic_rx_pkts()
2279 adapter->netdev->stats.rx_bytes += rfd->len; in nic_rx_pkts()
2281 skb_put_data(skb, fbr->virt[buff_index], rfd->len); in nic_rx_pkts()
2283 skb->protocol = eth_type_trans(skb, adapter->netdev); in nic_rx_pkts()
2284 skb->ip_summed = CHECKSUM_NONE; in nic_rx_pkts()
2298 struct rx_ring *rx_ring = &adapter->rx_ring; in et131x_handle_recv_pkts()
2305 if (list_empty(&rx_ring->recv_list)) { in et131x_handle_recv_pkts()
2306 WARN_ON(rx_ring->num_ready_recv != 0); in et131x_handle_recv_pkts()
2321 if (!adapter->packet_filter || in et131x_handle_recv_pkts()
2322 !netif_carrier_ok(adapter->netdev) || in et131x_handle_recv_pkts()
2323 rfd->len == 0) in et131x_handle_recv_pkts()
2326 adapter->netdev->stats.rx_packets++; in et131x_handle_recv_pkts()
2328 if (rx_ring->num_ready_recv < RFD_LOW_WATER_MARK) in et131x_handle_recv_pkts()
2329 dev_warn(&adapter->pdev->dev, "RFD's are running out\n"); in et131x_handle_recv_pkts()
2335 rx_ring->unfinished_receives = true; in et131x_handle_recv_pkts()
2337 &adapter->regs->global.watchdog_timer); in et131x_handle_recv_pkts()
2339 /* Watchdog timer will disable itself if appropriate. */ in et131x_handle_recv_pkts()
2340 rx_ring->unfinished_receives = false; in et131x_handle_recv_pkts()
2357 struct tx_ring *tx_ring = &adapter->tx_ring; in et131x_tx_dma_memory_alloc()
2359 /* Allocate memory for the TCB's (Transmit Control Block) */ in et131x_tx_dma_memory_alloc()
2360 tx_ring->tcb_ring = kcalloc(NUM_TCB, sizeof(struct tcb), in et131x_tx_dma_memory_alloc()
2362 if (!tx_ring->tcb_ring) in et131x_tx_dma_memory_alloc()
2363 return -ENOMEM; in et131x_tx_dma_memory_alloc()
2366 tx_ring->tx_desc_ring = dma_alloc_coherent(&adapter->pdev->dev, in et131x_tx_dma_memory_alloc()
2368 &tx_ring->tx_desc_ring_pa, in et131x_tx_dma_memory_alloc()
2370 if (!tx_ring->tx_desc_ring) { in et131x_tx_dma_memory_alloc()
2371 dev_err(&adapter->pdev->dev, in et131x_tx_dma_memory_alloc()
2373 return -ENOMEM; in et131x_tx_dma_memory_alloc()
2376 tx_ring->tx_status = dma_alloc_coherent(&adapter->pdev->dev, in et131x_tx_dma_memory_alloc()
2378 &tx_ring->tx_status_pa, in et131x_tx_dma_memory_alloc()
2380 if (!tx_ring->tx_status) { in et131x_tx_dma_memory_alloc()
2381 dev_err(&adapter->pdev->dev, in et131x_tx_dma_memory_alloc()
2383 return -ENOMEM; in et131x_tx_dma_memory_alloc()
2391 struct tx_ring *tx_ring = &adapter->tx_ring; in et131x_tx_dma_memory_free()
2393 if (tx_ring->tx_desc_ring) { in et131x_tx_dma_memory_free()
2396 dma_free_coherent(&adapter->pdev->dev, in et131x_tx_dma_memory_free()
2398 tx_ring->tx_desc_ring, in et131x_tx_dma_memory_free()
2399 tx_ring->tx_desc_ring_pa); in et131x_tx_dma_memory_free()
2400 tx_ring->tx_desc_ring = NULL; in et131x_tx_dma_memory_free()
2404 if (tx_ring->tx_status) { in et131x_tx_dma_memory_free()
2405 dma_free_coherent(&adapter->pdev->dev, in et131x_tx_dma_memory_free()
2407 tx_ring->tx_status, in et131x_tx_dma_memory_free()
2408 tx_ring->tx_status_pa); in et131x_tx_dma_memory_free()
2410 tx_ring->tx_status = NULL; in et131x_tx_dma_memory_free()
2412 /* Free the memory for the tcb structures */ in et131x_tx_dma_memory_free()
2413 kfree(tx_ring->tcb_ring); in et131x_tx_dma_memory_free()
2418 /* nic_send_packet - NIC specific send handler for version B silicon. */
2419 static int nic_send_packet(struct et131x_adapter *adapter, struct tcb *tcb) in nic_send_packet() argument
2425 struct sk_buff *skb = tcb->skb; in nic_send_packet()
2426 u32 nr_frags = skb_shinfo(skb)->nr_frags + 1; in nic_send_packet()
2427 skb_frag_t *frags = &skb_shinfo(skb)->frags[0]; in nic_send_packet()
2428 struct phy_device *phydev = adapter->netdev->phydev; in nic_send_packet()
2430 struct tx_ring *tx_ring = &adapter->tx_ring; in nic_send_packet()
2458 dma_addr = dma_map_single(&adapter->pdev->dev, in nic_send_packet()
2459 skb->data, in nic_send_packet()
2462 if (dma_mapping_error(&adapter->pdev->dev, in nic_send_packet()
2464 return -ENOMEM; in nic_send_packet()
2471 dma_addr = dma_map_single(&adapter->pdev->dev, in nic_send_packet()
2472 skb->data, in nic_send_packet()
2475 if (dma_mapping_error(&adapter->pdev->dev, in nic_send_packet()
2477 return -ENOMEM; in nic_send_packet()
2484 dma_addr = dma_map_single(&adapter->pdev->dev, in nic_send_packet()
2485 skb->data + in nic_send_packet()
2489 if (dma_mapping_error(&adapter->pdev->dev, in nic_send_packet()
2498 desc[frag].len_vlan = skb_frag_size(&frags[i - 1]); in nic_send_packet()
2499 dma_addr = skb_frag_dma_map(&adapter->pdev->dev, in nic_send_packet()
2500 &frags[i - 1], in nic_send_packet()
2504 if (dma_mapping_error(&adapter->pdev->dev, dma_addr)) in nic_send_packet()
2513 if (phydev && phydev->speed == SPEED_1000) { in nic_send_packet()
2514 if (++tx_ring->since_irq == PARM_TX_NUM_BUFS_DEF) { in nic_send_packet()
2516 desc[frag - 1].flags = in nic_send_packet()
2518 tx_ring->since_irq = 0; in nic_send_packet()
2520 desc[frag - 1].flags = TXDESC_FLAG_LASTPKT; in nic_send_packet()
2523 desc[frag - 1].flags = in nic_send_packet()
2529 tcb->index_start = tx_ring->send_idx; in nic_send_packet()
2530 tcb->stale = 0; in nic_send_packet()
2532 thiscopy = NUM_DESC_PER_RING_TX - INDEX10(tx_ring->send_idx); in nic_send_packet()
2538 remainder = frag - thiscopy; in nic_send_packet()
2541 memcpy(tx_ring->tx_desc_ring + INDEX10(tx_ring->send_idx), in nic_send_packet()
2545 add_10bit(&tx_ring->send_idx, thiscopy); in nic_send_packet()
2547 if (INDEX10(tx_ring->send_idx) == 0 || in nic_send_packet()
2548 INDEX10(tx_ring->send_idx) == NUM_DESC_PER_RING_TX) { in nic_send_packet()
2549 tx_ring->send_idx &= ~ET_DMA10_MASK; in nic_send_packet()
2550 tx_ring->send_idx ^= ET_DMA10_WRAP; in nic_send_packet()
2554 memcpy(tx_ring->tx_desc_ring, in nic_send_packet()
2558 add_10bit(&tx_ring->send_idx, remainder); in nic_send_packet()
2561 if (INDEX10(tx_ring->send_idx) == 0) { in nic_send_packet()
2562 if (tx_ring->send_idx) in nic_send_packet()
2563 tcb->index = NUM_DESC_PER_RING_TX - 1; in nic_send_packet()
2565 tcb->index = ET_DMA10_WRAP|(NUM_DESC_PER_RING_TX - 1); in nic_send_packet()
2567 tcb->index = tx_ring->send_idx - 1; in nic_send_packet()
2570 spin_lock(&adapter->tcb_send_qlock); in nic_send_packet()
2572 if (tx_ring->send_tail) in nic_send_packet()
2573 tx_ring->send_tail->next = tcb; in nic_send_packet()
2575 tx_ring->send_head = tcb; in nic_send_packet()
2577 tx_ring->send_tail = tcb; in nic_send_packet()
2579 WARN_ON(tcb->next != NULL); in nic_send_packet()
2581 tx_ring->used++; in nic_send_packet()
2583 spin_unlock(&adapter->tcb_send_qlock); in nic_send_packet()
2586 writel(tx_ring->send_idx, &adapter->regs->txdma.service_request); in nic_send_packet()
2589 * timer to wake us up if this packet isn't followed by N more. in nic_send_packet()
2591 if (phydev && phydev->speed == SPEED_1000) { in nic_send_packet()
2593 &adapter->regs->global.watchdog_timer); in nic_send_packet()
2599 while (--i) { in nic_send_packet()
2600 frag--; in nic_send_packet()
2603 dma_unmap_page(&adapter->pdev->dev, dma_addr, in nic_send_packet()
2609 while (frag--) { in nic_send_packet()
2612 dma_unmap_single(&adapter->pdev->dev, dma_addr, in nic_send_packet()
2616 return -ENOMEM; in nic_send_packet()
2622 struct tcb *tcb; in send_packet() local
2624 struct tx_ring *tx_ring = &adapter->tx_ring; in send_packet()
2627 if (skb->len < ETH_HLEN) in send_packet()
2628 return -EIO; in send_packet()
2630 spin_lock_irqsave(&adapter->tcb_ready_qlock, flags); in send_packet()
2632 tcb = tx_ring->tcb_qhead; in send_packet()
2634 if (tcb == NULL) { in send_packet()
2635 spin_unlock_irqrestore(&adapter->tcb_ready_qlock, flags); in send_packet()
2636 return -ENOMEM; in send_packet()
2639 tx_ring->tcb_qhead = tcb->next; in send_packet()
2641 if (tx_ring->tcb_qhead == NULL) in send_packet()
2642 tx_ring->tcb_qtail = NULL; in send_packet()
2644 spin_unlock_irqrestore(&adapter->tcb_ready_qlock, flags); in send_packet()
2646 tcb->skb = skb; in send_packet()
2647 tcb->next = NULL; in send_packet()
2649 status = nic_send_packet(adapter, tcb); in send_packet()
2652 spin_lock_irqsave(&adapter->tcb_ready_qlock, flags); in send_packet()
2654 if (tx_ring->tcb_qtail) in send_packet()
2655 tx_ring->tcb_qtail->next = tcb; in send_packet()
2658 tx_ring->tcb_qhead = tcb; in send_packet()
2660 tx_ring->tcb_qtail = tcb; in send_packet()
2661 spin_unlock_irqrestore(&adapter->tcb_ready_qlock, flags); in send_packet()
2664 WARN_ON(tx_ring->used > NUM_TCB); in send_packet()
2668 /* free_send_packet - Recycle a struct tcb */
2670 struct tcb *tcb) in free_send_packet() argument
2674 struct net_device_stats *stats = &adapter->netdev->stats; in free_send_packet()
2675 struct tx_ring *tx_ring = &adapter->tx_ring; in free_send_packet()
2678 if (tcb->skb) { in free_send_packet()
2679 stats->tx_bytes += tcb->skb->len; in free_send_packet()
2686 desc = tx_ring->tx_desc_ring + in free_send_packet()
2687 INDEX10(tcb->index_start); in free_send_packet()
2689 dma_addr = desc->addr_lo; in free_send_packet()
2690 dma_addr |= (u64)desc->addr_hi << 32; in free_send_packet()
2692 dma_unmap_single(&adapter->pdev->dev, in free_send_packet()
2694 desc->len_vlan, DMA_TO_DEVICE); in free_send_packet()
2696 add_10bit(&tcb->index_start, 1); in free_send_packet()
2697 if (INDEX10(tcb->index_start) >= in free_send_packet()
2699 tcb->index_start &= ~ET_DMA10_MASK; in free_send_packet()
2700 tcb->index_start ^= ET_DMA10_WRAP; in free_send_packet()
2702 } while (desc != tx_ring->tx_desc_ring + INDEX10(tcb->index)); in free_send_packet()
2704 dev_kfree_skb_any(tcb->skb); in free_send_packet()
2707 memset(tcb, 0, sizeof(struct tcb)); in free_send_packet()
2709 /* Add the TCB to the Ready Q */ in free_send_packet()
2710 spin_lock_irqsave(&adapter->tcb_ready_qlock, flags); in free_send_packet()
2712 stats->tx_packets++; in free_send_packet()
2714 if (tx_ring->tcb_qtail) in free_send_packet()
2715 tx_ring->tcb_qtail->next = tcb; in free_send_packet()
2717 tx_ring->tcb_qhead = tcb; in free_send_packet()
2719 tx_ring->tcb_qtail = tcb; in free_send_packet()
2721 spin_unlock_irqrestore(&adapter->tcb_ready_qlock, flags); in free_send_packet()
2722 WARN_ON(tx_ring->used < 0); in free_send_packet()
2725 /* et131x_free_busy_send_packets - Free and complete the stopped active sends */
2728 struct tcb *tcb; in et131x_free_busy_send_packets() local
2731 struct tx_ring *tx_ring = &adapter->tx_ring; in et131x_free_busy_send_packets()
2733 /* Any packets being sent? Check the first TCB on the send list */ in et131x_free_busy_send_packets()
2734 spin_lock_irqsave(&adapter->tcb_send_qlock, flags); in et131x_free_busy_send_packets()
2736 tcb = tx_ring->send_head; in et131x_free_busy_send_packets()
2738 while (tcb != NULL && freed < NUM_TCB) { in et131x_free_busy_send_packets()
2739 struct tcb *next = tcb->next; in et131x_free_busy_send_packets()
2741 tx_ring->send_head = next; in et131x_free_busy_send_packets()
2744 tx_ring->send_tail = NULL; in et131x_free_busy_send_packets()
2746 tx_ring->used--; in et131x_free_busy_send_packets()
2748 spin_unlock_irqrestore(&adapter->tcb_send_qlock, flags); in et131x_free_busy_send_packets()
2751 free_send_packet(adapter, tcb); in et131x_free_busy_send_packets()
2753 spin_lock_irqsave(&adapter->tcb_send_qlock, flags); in et131x_free_busy_send_packets()
2755 tcb = tx_ring->send_head; in et131x_free_busy_send_packets()
2760 spin_unlock_irqrestore(&adapter->tcb_send_qlock, flags); in et131x_free_busy_send_packets()
2762 tx_ring->used = 0; in et131x_free_busy_send_packets()
2767 * Re-claim the send resources, complete sends and get more to send from
2774 struct tcb *tcb; in et131x_handle_send_pkts() local
2776 struct tx_ring *tx_ring = &adapter->tx_ring; in et131x_handle_send_pkts()
2778 serviced = readl(&adapter->regs->txdma.new_service_complete); in et131x_handle_send_pkts()
2784 spin_lock_irqsave(&adapter->tcb_send_qlock, flags); in et131x_handle_send_pkts()
2786 tcb = tx_ring->send_head; in et131x_handle_send_pkts()
2788 while (tcb && in et131x_handle_send_pkts()
2789 ((serviced ^ tcb->index) & ET_DMA10_WRAP) && in et131x_handle_send_pkts()
2790 index < INDEX10(tcb->index)) { in et131x_handle_send_pkts()
2791 tx_ring->used--; in et131x_handle_send_pkts()
2792 tx_ring->send_head = tcb->next; in et131x_handle_send_pkts()
2793 if (tcb->next == NULL) in et131x_handle_send_pkts()
2794 tx_ring->send_tail = NULL; in et131x_handle_send_pkts()
2796 spin_unlock_irqrestore(&adapter->tcb_send_qlock, flags); in et131x_handle_send_pkts()
2797 free_send_packet(adapter, tcb); in et131x_handle_send_pkts()
2798 spin_lock_irqsave(&adapter->tcb_send_qlock, flags); in et131x_handle_send_pkts()
2801 tcb = tx_ring->send_head; in et131x_handle_send_pkts()
2803 while (tcb && in et131x_handle_send_pkts()
2804 !((serviced ^ tcb->index) & ET_DMA10_WRAP) && in et131x_handle_send_pkts()
2805 index > (tcb->index & ET_DMA10_MASK)) { in et131x_handle_send_pkts()
2806 tx_ring->used--; in et131x_handle_send_pkts()
2807 tx_ring->send_head = tcb->next; in et131x_handle_send_pkts()
2808 if (tcb->next == NULL) in et131x_handle_send_pkts()
2809 tx_ring->send_tail = NULL; in et131x_handle_send_pkts()
2811 spin_unlock_irqrestore(&adapter->tcb_send_qlock, flags); in et131x_handle_send_pkts()
2812 free_send_packet(adapter, tcb); in et131x_handle_send_pkts()
2813 spin_lock_irqsave(&adapter->tcb_send_qlock, flags); in et131x_handle_send_pkts()
2816 tcb = tx_ring->send_head; in et131x_handle_send_pkts()
2819 /* Wake up the queue when we hit a low-water mark */ in et131x_handle_send_pkts()
2820 if (tx_ring->used <= NUM_TCB / 3) in et131x_handle_send_pkts()
2821 netif_wake_queue(adapter->netdev); in et131x_handle_send_pkts()
2823 spin_unlock_irqrestore(&adapter->tcb_send_qlock, flags); in et131x_handle_send_pkts()
2836 struct address_map __iomem *aregs = adapter->regs; in et131x_get_regs()
2843 regs->version = (1 << 24) | (adapter->pdev->revision << 16) | in et131x_get_regs()
2844 adapter->pdev->device; in et131x_get_regs()
2911 regs_buff[num++] = readl(&aregs->global.txq_start_addr); in et131x_get_regs()
2912 regs_buff[num++] = readl(&aregs->global.txq_end_addr); in et131x_get_regs()
2913 regs_buff[num++] = readl(&aregs->global.rxq_start_addr); in et131x_get_regs()
2914 regs_buff[num++] = readl(&aregs->global.rxq_end_addr); in et131x_get_regs()
2915 regs_buff[num++] = readl(&aregs->global.pm_csr); in et131x_get_regs()
2916 regs_buff[num++] = adapter->stats.interrupt_status; in et131x_get_regs()
2917 regs_buff[num++] = readl(&aregs->global.int_mask); in et131x_get_regs()
2918 regs_buff[num++] = readl(&aregs->global.int_alias_clr_en); in et131x_get_regs()
2919 regs_buff[num++] = readl(&aregs->global.int_status_alias); in et131x_get_regs()
2920 regs_buff[num++] = readl(&aregs->global.sw_reset); in et131x_get_regs()
2921 regs_buff[num++] = readl(&aregs->global.slv_timer); in et131x_get_regs()
2922 regs_buff[num++] = readl(&aregs->global.msi_config); in et131x_get_regs()
2923 regs_buff[num++] = readl(&aregs->global.loopback); in et131x_get_regs()
2924 regs_buff[num++] = readl(&aregs->global.watchdog_timer); in et131x_get_regs()
2927 regs_buff[num++] = readl(&aregs->txdma.csr); in et131x_get_regs()
2928 regs_buff[num++] = readl(&aregs->txdma.pr_base_hi); in et131x_get_regs()
2929 regs_buff[num++] = readl(&aregs->txdma.pr_base_lo); in et131x_get_regs()
2930 regs_buff[num++] = readl(&aregs->txdma.pr_num_des); in et131x_get_regs()
2931 regs_buff[num++] = readl(&aregs->txdma.txq_wr_addr); in et131x_get_regs()
2932 regs_buff[num++] = readl(&aregs->txdma.txq_wr_addr_ext); in et131x_get_regs()
2933 regs_buff[num++] = readl(&aregs->txdma.txq_rd_addr); in et131x_get_regs()
2934 regs_buff[num++] = readl(&aregs->txdma.dma_wb_base_hi); in et131x_get_regs()
2935 regs_buff[num++] = readl(&aregs->txdma.dma_wb_base_lo); in et131x_get_regs()
2936 regs_buff[num++] = readl(&aregs->txdma.service_request); in et131x_get_regs()
2937 regs_buff[num++] = readl(&aregs->txdma.service_complete); in et131x_get_regs()
2938 regs_buff[num++] = readl(&aregs->txdma.cache_rd_index); in et131x_get_regs()
2939 regs_buff[num++] = readl(&aregs->txdma.cache_wr_index); in et131x_get_regs()
2940 regs_buff[num++] = readl(&aregs->txdma.tx_dma_error); in et131x_get_regs()
2941 regs_buff[num++] = readl(&aregs->txdma.desc_abort_cnt); in et131x_get_regs()
2942 regs_buff[num++] = readl(&aregs->txdma.payload_abort_cnt); in et131x_get_regs()
2943 regs_buff[num++] = readl(&aregs->txdma.writeback_abort_cnt); in et131x_get_regs()
2944 regs_buff[num++] = readl(&aregs->txdma.desc_timeout_cnt); in et131x_get_regs()
2945 regs_buff[num++] = readl(&aregs->txdma.payload_timeout_cnt); in et131x_get_regs()
2946 regs_buff[num++] = readl(&aregs->txdma.writeback_timeout_cnt); in et131x_get_regs()
2947 regs_buff[num++] = readl(&aregs->txdma.desc_error_cnt); in et131x_get_regs()
2948 regs_buff[num++] = readl(&aregs->txdma.payload_error_cnt); in et131x_get_regs()
2949 regs_buff[num++] = readl(&aregs->txdma.writeback_error_cnt); in et131x_get_regs()
2950 regs_buff[num++] = readl(&aregs->txdma.dropped_tlp_cnt); in et131x_get_regs()
2951 regs_buff[num++] = readl(&aregs->txdma.new_service_complete); in et131x_get_regs()
2952 regs_buff[num++] = readl(&aregs->txdma.ethernet_packet_cnt); in et131x_get_regs()
2955 regs_buff[num++] = readl(&aregs->rxdma.csr); in et131x_get_regs()
2956 regs_buff[num++] = readl(&aregs->rxdma.dma_wb_base_hi); in et131x_get_regs()
2957 regs_buff[num++] = readl(&aregs->rxdma.dma_wb_base_lo); in et131x_get_regs()
2958 regs_buff[num++] = readl(&aregs->rxdma.num_pkt_done); in et131x_get_regs()
2959 regs_buff[num++] = readl(&aregs->rxdma.max_pkt_time); in et131x_get_regs()
2960 regs_buff[num++] = readl(&aregs->rxdma.rxq_rd_addr); in et131x_get_regs()
2961 regs_buff[num++] = readl(&aregs->rxdma.rxq_rd_addr_ext); in et131x_get_regs()
2962 regs_buff[num++] = readl(&aregs->rxdma.rxq_wr_addr); in et131x_get_regs()
2963 regs_buff[num++] = readl(&aregs->rxdma.psr_base_hi); in et131x_get_regs()
2964 regs_buff[num++] = readl(&aregs->rxdma.psr_base_lo); in et131x_get_regs()
2965 regs_buff[num++] = readl(&aregs->rxdma.psr_num_des); in et131x_get_regs()
2966 regs_buff[num++] = readl(&aregs->rxdma.psr_avail_offset); in et131x_get_regs()
2967 regs_buff[num++] = readl(&aregs->rxdma.psr_full_offset); in et131x_get_regs()
2968 regs_buff[num++] = readl(&aregs->rxdma.psr_access_index); in et131x_get_regs()
2969 regs_buff[num++] = readl(&aregs->rxdma.psr_min_des); in et131x_get_regs()
2970 regs_buff[num++] = readl(&aregs->rxdma.fbr0_base_lo); in et131x_get_regs()
2971 regs_buff[num++] = readl(&aregs->rxdma.fbr0_base_hi); in et131x_get_regs()
2972 regs_buff[num++] = readl(&aregs->rxdma.fbr0_num_des); in et131x_get_regs()
2973 regs_buff[num++] = readl(&aregs->rxdma.fbr0_avail_offset); in et131x_get_regs()
2974 regs_buff[num++] = readl(&aregs->rxdma.fbr0_full_offset); in et131x_get_regs()
2975 regs_buff[num++] = readl(&aregs->rxdma.fbr0_rd_index); in et131x_get_regs()
2976 regs_buff[num++] = readl(&aregs->rxdma.fbr0_min_des); in et131x_get_regs()
2977 regs_buff[num++] = readl(&aregs->rxdma.fbr1_base_lo); in et131x_get_regs()
2978 regs_buff[num++] = readl(&aregs->rxdma.fbr1_base_hi); in et131x_get_regs()
2979 regs_buff[num++] = readl(&aregs->rxdma.fbr1_num_des); in et131x_get_regs()
2980 regs_buff[num++] = readl(&aregs->rxdma.fbr1_avail_offset); in et131x_get_regs()
2981 regs_buff[num++] = readl(&aregs->rxdma.fbr1_full_offset); in et131x_get_regs()
2982 regs_buff[num++] = readl(&aregs->rxdma.fbr1_rd_index); in et131x_get_regs()
2983 regs_buff[num++] = readl(&aregs->rxdma.fbr1_min_des); in et131x_get_regs()
2991 strscpy(info->driver, DRIVER_NAME, sizeof(info->driver)); in et131x_get_drvinfo()
2992 strscpy(info->bus_info, pci_name(adapter->pdev), in et131x_get_drvinfo()
2993 sizeof(info->bus_info)); in et131x_get_drvinfo()
3005 /* et131x_hwaddr_init - set up the MAC Address */
3012 if (is_zero_ether_addr(adapter->rom_addr)) { in et131x_hwaddr_init()
3017 get_random_bytes(&adapter->addr[5], 1); in et131x_hwaddr_init()
3022 ether_addr_copy(adapter->rom_addr, adapter->addr); in et131x_hwaddr_init()
3028 ether_addr_copy(adapter->addr, adapter->rom_addr); in et131x_hwaddr_init()
3043 dev_err(&pdev->dev, "Missing PCIe capabilities\n"); in et131x_pci_init()
3048 max_payload = pdev->pcie_mpss; in et131x_pci_init()
3056 dev_err(&pdev->dev, in et131x_pci_init()
3062 dev_err(&pdev->dev, in et131x_pci_init()
3063 "Could not write PCI config space for Replay Timer\n"); in et131x_pci_init()
3072 dev_err(&pdev->dev, in et131x_pci_init()
3079 dev_err(&pdev->dev, in et131x_pci_init()
3087 if (!adapter->has_eeprom) { in et131x_pci_init()
3094 adapter->rom_addr + i)) { in et131x_pci_init()
3095 dev_err(&pdev->dev, "Could not read PCI config space for MAC address\n"); in et131x_pci_init()
3099 ether_addr_copy(adapter->addr, adapter->rom_addr); in et131x_pci_init()
3103 rc = -EIO; in et131x_pci_init()
3108 * @data: timer-specific variable; here a pointer to our adapter structure
3110 * The routine called when the error timer expires, to track the number of
3117 struct phy_device *phydev = adapter->netdev->phydev; in et131x_error_timer_handler()
3125 adapter->boot_coma = 20; in et131x_error_timer_handler()
3130 if (!phydev->link && adapter->boot_coma < 11) in et131x_error_timer_handler()
3131 adapter->boot_coma++; in et131x_error_timer_handler()
3133 if (adapter->boot_coma == 10) { in et131x_error_timer_handler()
3134 if (!phydev->link) { in et131x_error_timer_handler()
3136 /* NOTE - This was originally a 'sync with in et131x_error_timer_handler()
3145 /* This is a periodic timer, so reschedule */ in et131x_error_timer_handler()
3146 mod_timer(&adapter->error_timer, jiffies + in et131x_error_timer_handler()
3162 dev_err(&adapter->pdev->dev, in et131x_adapter_memory_alloc()
3170 dev_err(&adapter->pdev->dev, in et131x_adapter_memory_alloc()
3178 dev_err(&adapter->pdev->dev, "et131x_init_recv FAILED\n"); in et131x_adapter_memory_alloc()
3187 struct phy_device *phydev = netdev->phydev; in et131x_adjust_link()
3191 if (phydev->link == adapter->link) in et131x_adjust_link()
3201 adapter->link = phydev->link; in et131x_adjust_link()
3204 if (phydev->link) { in et131x_adjust_link()
3205 adapter->boot_coma = 20; in et131x_adjust_link()
3206 if (phydev->speed == SPEED_10) { in et131x_adjust_link()
3211 et131x_mii_write(adapter, phydev->mdio.addr, in et131x_adjust_link()
3214 et131x_mii_write(adapter, phydev->mdio.addr, in et131x_adjust_link()
3216 et131x_mii_write(adapter, phydev->mdio.addr, in et131x_adjust_link()
3218 et131x_mii_write(adapter, phydev->mdio.addr, in et131x_adjust_link()
3224 if (phydev->speed == SPEED_1000 && in et131x_adjust_link()
3225 adapter->registry_jumbo_packet > 2048) { in et131x_adjust_link()
3231 et131x_mii_write(adapter, phydev->mdio.addr, in et131x_adjust_link()
3238 adapter->boot_coma = 0; in et131x_adjust_link()
3240 if (phydev->speed == SPEED_10) { in et131x_adjust_link()
3245 et131x_mii_write(adapter, phydev->mdio.addr, in et131x_adjust_link()
3248 et131x_mii_write(adapter, phydev->mdio.addr, in et131x_adjust_link()
3250 et131x_mii_write(adapter, phydev->mdio.addr, in et131x_adjust_link()
3252 et131x_mii_write(adapter, phydev->mdio.addr, in et131x_adjust_link()
3261 * way, when we get the auto-neg complete interrupt, in et131x_adjust_link()
3278 phydev = phy_find_first(adapter->mii_bus); in et131x_mii_probe()
3280 dev_err(&adapter->pdev->dev, "no PHY found\n"); in et131x_mii_probe()
3281 return -ENODEV; in et131x_mii_probe()
3288 dev_err(&adapter->pdev->dev, "Could not attach to PHY\n"); in et131x_mii_probe()
3294 if (adapter->pdev->device != ET131X_PCI_DEVICE_ID_FAST) in et131x_mii_probe()
3297 phydev->autoneg = AUTONEG_ENABLE; in et131x_mii_probe()
3312 adapter->pdev = pci_dev_get(pdev); in et131x_adapter_init()
3313 adapter->netdev = netdev; in et131x_adapter_init()
3315 spin_lock_init(&adapter->tcb_send_qlock); in et131x_adapter_init()
3316 spin_lock_init(&adapter->tcb_ready_qlock); in et131x_adapter_init()
3317 spin_lock_init(&adapter->rcv_lock); in et131x_adapter_init()
3319 adapter->registry_jumbo_packet = 1514; /* 1514-9216 */ in et131x_adapter_init()
3321 ether_addr_copy(adapter->addr, default_mac); in et131x_adapter_init()
3332 netif_napi_del(&adapter->napi); in et131x_pci_remove()
3333 phy_disconnect(netdev->phydev); in et131x_pci_remove()
3334 mdiobus_unregister(adapter->mii_bus); in et131x_pci_remove()
3335 mdiobus_free(adapter->mii_bus); in et131x_pci_remove()
3338 iounmap(adapter->regs); in et131x_pci_remove()
3349 phy_start(netdev->phydev); in et131x_up()
3357 phy_stop(netdev->phydev); in et131x_down()
3399 struct address_map __iomem *iomem = adapter->regs; in et131x_isr()
3400 struct rx_ring *rx_ring = &adapter->rx_ring; in et131x_isr()
3401 struct tx_ring *tx_ring = &adapter->tx_ring; in et131x_isr()
3412 status = readl(&adapter->regs->global.int_status); in et131x_isr()
3414 if (adapter->flow == FLOW_TXONLY || adapter->flow == FLOW_BOTH) in et131x_isr()
3428 struct tcb *tcb = tx_ring->send_head; in et131x_isr() local
3430 if (tcb) in et131x_isr()
3431 if (++tcb->stale > 1) in et131x_isr()
3434 if (rx_ring->unfinished_receives) in et131x_isr()
3436 else if (tcb == NULL) in et131x_isr()
3437 writel(0, &adapter->regs->global.watchdog_timer); in et131x_isr()
3444 napi_schedule(&adapter->napi); in et131x_isr()
3454 u32 txdma_err = readl(&iomem->txdma.tx_dma_error); in et131x_isr()
3456 dev_warn(&adapter->pdev->dev, in et131x_isr()
3470 * returned to the ET1310 for re-use. This interrupt is one in et131x_isr()
3477 if (adapter->flow == FLOW_TXONLY || adapter->flow == FLOW_BOTH) { in et131x_isr()
3482 writel(3, &iomem->txmac.bp_ctrl); in et131x_isr()
3498 /* The rxdma_error interrupt is sent when a time-out on a in et131x_isr()
3500 * returned with an un-successful status. In both cases the in et131x_isr()
3502 * automatically re-try the request in question. Normally in et131x_isr()
3507 * global resources. The JAGCore will do a re-try on the in et131x_isr()
3514 dev_warn(&adapter->pdev->dev, "RxDMA_ERR interrupt, error %x\n", in et131x_isr()
3515 readl(&iomem->txmac.tx_test)); in et131x_isr()
3524 dev_err(&adapter->pdev->dev, "WAKE_ON_LAN interrupt\n"); in et131x_isr()
3528 u32 err = readl(&iomem->txmac.err); in et131x_isr()
3533 * from the on-chip Tx Q. All of these errors are catastrophic in et131x_isr()
3536 * and re-configured afterwards. in et131x_isr()
3538 dev_warn(&adapter->pdev->dev, "TXMAC interrupt, error 0x%08x\n", in et131x_isr()
3551 dev_warn(&adapter->pdev->dev, in et131x_isr()
3553 readl(&iomem->rxmac.err_reg)); in et131x_isr()
3555 dev_warn(&adapter->pdev->dev, in et131x_isr()
3557 readl(&iomem->rxmac.ctrl), in et131x_isr()
3558 readl(&iomem->rxmac.rxq_diag)); in et131x_isr()
3566 /* This means at least one of the un-masked counters in the in et131x_isr()
3578 * addressed module is in a power-down state and can't respond. in et131x_isr()
3598 napi_complete_done(&adapter->napi, work_done); in et131x_poll()
3605 /* et131x_stats - Return the current device statistics */
3609 struct net_device_stats *stats = &adapter->netdev->stats; in et131x_stats()
3610 struct ce_stats *devstat = &adapter->stats; in et131x_stats()
3612 stats->rx_errors = devstat->rx_length_errs + in et131x_stats()
3613 devstat->rx_align_errs + in et131x_stats()
3614 devstat->rx_crc_errs + in et131x_stats()
3615 devstat->rx_code_violations + in et131x_stats()
3616 devstat->rx_other_errs; in et131x_stats()
3617 stats->tx_errors = devstat->tx_max_pkt_errs; in et131x_stats()
3618 stats->multicast = devstat->multicast_pkts_rcvd; in et131x_stats()
3619 stats->collisions = devstat->tx_collisions; in et131x_stats()
3621 stats->rx_length_errors = devstat->rx_length_errs; in et131x_stats()
3622 stats->rx_over_errors = devstat->rx_overflows; in et131x_stats()
3623 stats->rx_crc_errors = devstat->rx_crc_errs; in et131x_stats()
3624 stats->rx_dropped = devstat->rcvd_pkts_dropped; in et131x_stats()
3627 /* stats->rx_frame_errors = devstat->; */ in et131x_stats()
3628 /* stats->rx_fifo_errors = devstat->; */ in et131x_stats()
3629 /* stats->rx_missed_errors = devstat->; */ in et131x_stats()
3631 /* stats->tx_aborted_errors = devstat->; */ in et131x_stats()
3632 /* stats->tx_carrier_errors = devstat->; */ in et131x_stats()
3633 /* stats->tx_fifo_errors = devstat->; */ in et131x_stats()
3634 /* stats->tx_heartbeat_errors = devstat->; */ in et131x_stats()
3635 /* stats->tx_window_errors = devstat->; */ in et131x_stats()
3642 struct pci_dev *pdev = adapter->pdev; in et131x_open()
3643 unsigned int irq = pdev->irq; in et131x_open()
3646 /* Start the timer to track NIC errors */ in et131x_open()
3647 timer_setup(&adapter->error_timer, et131x_error_timer_handler, 0); in et131x_open()
3648 adapter->error_timer.expires = jiffies + in et131x_open()
3650 add_timer(&adapter->error_timer); in et131x_open()
3653 IRQF_SHARED, netdev->name, netdev); in et131x_open()
3655 dev_err(&pdev->dev, "could not register IRQ %d\n", irq); in et131x_open()
3659 adapter->flags |= FMP_ADAPTER_INTERRUPT_IN_USE; in et131x_open()
3661 napi_enable(&adapter->napi); in et131x_open()
3673 napi_disable(&adapter->napi); in et131x_close()
3675 adapter->flags &= ~FMP_ADAPTER_INTERRUPT_IN_USE; in et131x_close()
3676 free_irq(adapter->pdev->irq, netdev); in et131x_close()
3678 /* Stop the error timer */ in et131x_close()
3679 return timer_delete_sync(&adapter->error_timer); in et131x_close()
3682 /* et131x_set_packet_filter - Configures the Rx Packet filtering */
3685 int filter = adapter->packet_filter; in et131x_set_packet_filter()
3689 ctrl = readl(&adapter->regs->rxmac.ctrl); in et131x_set_packet_filter()
3690 pf_ctrl = readl(&adapter->regs->rxmac.pf_ctrl); in et131x_set_packet_filter()
3702 * possible - (1) we have a multi-cast list, (2) we receive ALL in et131x_set_packet_filter()
3728 /* Setup the receive mac configuration registers - Packet in et131x_set_packet_filter()
3732 writel(pf_ctrl, &adapter->regs->rxmac.pf_ctrl); in et131x_set_packet_filter()
3733 writel(ctrl, &adapter->regs->rxmac.ctrl); in et131x_set_packet_filter()
3745 /* Before we modify the platform-independent filter flags, store them in et131x_multicast()
3749 packet_filter = adapter->packet_filter; in et131x_multicast()
3761 if (netdev->flags & IFF_PROMISC) in et131x_multicast()
3762 adapter->packet_filter |= ET131X_PACKET_TYPE_PROMISCUOUS; in et131x_multicast()
3764 adapter->packet_filter &= ~ET131X_PACKET_TYPE_PROMISCUOUS; in et131x_multicast()
3766 if ((netdev->flags & IFF_ALLMULTI) || in et131x_multicast()
3768 adapter->packet_filter |= ET131X_PACKET_TYPE_ALL_MULTICAST; in et131x_multicast()
3771 adapter->packet_filter &= ~ET131X_PACKET_TYPE_ALL_MULTICAST; in et131x_multicast()
3772 adapter->packet_filter &= ~ET131X_PACKET_TYPE_MULTICAST; in et131x_multicast()
3774 adapter->packet_filter |= ET131X_PACKET_TYPE_MULTICAST; in et131x_multicast()
3782 ether_addr_copy(adapter->multicast_list[i++], ha->addr); in et131x_multicast()
3784 adapter->multicast_addr_count = i; in et131x_multicast()
3789 * NOTE - This block will always update the multicast_list with the in et131x_multicast()
3792 if (packet_filter != adapter->packet_filter) in et131x_multicast()
3799 struct tx_ring *tx_ring = &adapter->tx_ring; in et131x_tx()
3804 if (unlikely(skb_shinfo(skb)->nr_frags > MAX_TX_DESC_PER_PKT - 2)) { in et131x_tx()
3809 if (tx_ring->used >= NUM_TCB - 1 && !netif_queue_stopped(netdev)) in et131x_tx()
3815 /* TCB is not available */ in et131x_tx()
3816 if (tx_ring->used >= NUM_TCB) in et131x_tx()
3819 if ((adapter->flags & FMP_ADAPTER_FAIL_SEND_MASK) || in et131x_tx()
3830 adapter->netdev->stats.tx_dropped++; in et131x_tx()
3834 /* et131x_tx_timeout - Timeout handler
3843 struct tx_ring *tx_ring = &adapter->tx_ring; in et131x_tx_timeout()
3844 struct tcb *tcb; in et131x_tx_timeout() local
3848 if (!(adapter->flags & FMP_ADAPTER_INTERRUPT_IN_USE)) in et131x_tx_timeout()
3852 * Checks adapter->flags for any failure in phy reading in et131x_tx_timeout()
3854 if (adapter->flags & FMP_ADAPTER_NON_RECOVER_ERROR) in et131x_tx_timeout()
3858 if (adapter->flags & FMP_ADAPTER_HARDWARE_ERROR) { in et131x_tx_timeout()
3859 dev_err(&adapter->pdev->dev, "hardware error - reset\n"); in et131x_tx_timeout()
3864 spin_lock_irqsave(&adapter->tcb_send_qlock, flags); in et131x_tx_timeout()
3865 tcb = tx_ring->send_head; in et131x_tx_timeout()
3866 spin_unlock_irqrestore(&adapter->tcb_send_qlock, flags); in et131x_tx_timeout()
3868 if (tcb) { in et131x_tx_timeout()
3869 tcb->count++; in et131x_tx_timeout()
3871 if (tcb->count > NIC_SEND_HANG_THRESHOLD) { in et131x_tx_timeout()
3872 dev_warn(&adapter->pdev->dev, in et131x_tx_timeout()
3873 "Send stuck - reset. tcb->WrIndex %x\n", in et131x_tx_timeout()
3874 tcb->index); in et131x_tx_timeout()
3876 adapter->netdev->stats.tx_errors++; in et131x_tx_timeout()
3892 WRITE_ONCE(netdev->mtu, new_mtu); in et131x_change_mtu()
3897 adapter->registry_jumbo_packet = new_mtu + 14; in et131x_change_mtu()
3902 dev_warn(&adapter->pdev->dev, in et131x_change_mtu()
3903 "Change MTU failed; couldn't re-alloc DMA memory\n"); in et131x_change_mtu()
3909 eth_hw_addr_set(netdev, adapter->addr); in et131x_change_mtu()
3940 dev_err(&pdev->dev, "pci_enable_device() failed\n"); in et131x_pci_setup()
3946 dev_err(&pdev->dev, "Can't find PCI device's base address\n"); in et131x_pci_setup()
3947 rc = -ENODEV; in et131x_pci_setup()
3953 dev_err(&pdev->dev, "Can't get PCI resources\n"); in et131x_pci_setup()
3960 rc = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64)); in et131x_pci_setup()
3962 dev_err(&pdev->dev, "No usable DMA addressing method\n"); in et131x_pci_setup()
3968 dev_err(&pdev->dev, "Couldn't alloc netdev struct\n"); in et131x_pci_setup()
3969 rc = -ENOMEM; in et131x_pci_setup()
3973 netdev->watchdog_timeo = ET131X_TX_TIMEOUT; in et131x_pci_setup()
3974 netdev->netdev_ops = &et131x_netdev_ops; in et131x_pci_setup()
3975 netdev->min_mtu = ET131X_MIN_MTU; in et131x_pci_setup()
3976 netdev->max_mtu = ET131X_MAX_MTU; in et131x_pci_setup()
3978 SET_NETDEV_DEV(netdev, &pdev->dev); in et131x_pci_setup()
3979 netdev->ethtool_ops = &et131x_ethtool_ops; in et131x_pci_setup()
3987 /* Map the bus-relative registers to system virtual memory */ in et131x_pci_setup()
3988 adapter->regs = pci_ioremap_bar(pdev, 0); in et131x_pci_setup()
3989 if (!adapter->regs) { in et131x_pci_setup()
3990 dev_err(&pdev->dev, "Cannot map device registers\n"); in et131x_pci_setup()
3991 rc = -ENOMEM; in et131x_pci_setup()
3996 writel(ET_PMCSR_INIT, &adapter->regs->global.pm_csr); in et131x_pci_setup()
4003 dev_err(&pdev->dev, "Could not alloc adapter memory (DMA)\n"); in et131x_pci_setup()
4009 netif_napi_add(netdev, &adapter->napi, et131x_poll); in et131x_pci_setup()
4011 eth_hw_addr_set(netdev, adapter->addr); in et131x_pci_setup()
4013 rc = -ENOMEM; in et131x_pci_setup()
4015 adapter->mii_bus = mdiobus_alloc(); in et131x_pci_setup()
4016 if (!adapter->mii_bus) { in et131x_pci_setup()
4017 dev_err(&pdev->dev, "Alloc of mii_bus struct failed\n"); in et131x_pci_setup()
4021 adapter->mii_bus->name = "et131x_eth_mii"; in et131x_pci_setup()
4022 snprintf(adapter->mii_bus->id, MII_BUS_ID_SIZE, "%x", pci_dev_id(adapter->pdev)); in et131x_pci_setup()
4023 adapter->mii_bus->priv = netdev; in et131x_pci_setup()
4024 adapter->mii_bus->read = et131x_mdio_read; in et131x_pci_setup()
4025 adapter->mii_bus->write = et131x_mdio_write; in et131x_pci_setup()
4027 rc = mdiobus_register(adapter->mii_bus); in et131x_pci_setup()
4029 dev_err(&pdev->dev, "failed to register MII bus\n"); in et131x_pci_setup()
4035 dev_err(&pdev->dev, "failed to probe MII bus\n"); in et131x_pci_setup()
4042 adapter->boot_coma = 0; in et131x_pci_setup()
4047 * NOTE - Because registration of interrupt handler is done in the in et131x_pci_setup()
4054 dev_err(&pdev->dev, "register_netdev() failed\n"); in et131x_pci_setup()
4067 phy_disconnect(netdev->phydev); in et131x_pci_setup()
4069 mdiobus_unregister(adapter->mii_bus); in et131x_pci_setup()
4071 mdiobus_free(adapter->mii_bus); in et131x_pci_setup()
4075 iounmap(adapter->regs); in et131x_pci_setup()